Special-shaped memory chip packaging structure

Abstract

The utility model relates to a special-shaped memory chip packaging structure. The structure comprises a substrate which is of a special-shaped structure and is provided with ball grid welding spots; the bare core Flash is arranged in the substrate, and the Pad of the bare core Flash is connected with the ball grid welding spot; and the protective adhesive layer wraps the substrate, so that the bare chip Flash is covered below the protective adhesive layer, and the ball grid welding spot part is exposed out of the protective adhesive layer. According to the method, the single bare core Flash is packaged by adopting the BGA packaging, so that compared with the packaging of double bare core Flash in the related technology, the packaging cost can be effectively reduced. In addition, the BGA package can provide good and stable signal transmission for the bare core Flash.

Description

Technical Field

[0001] The present application relates to the field of packaging technology, and in particular to a special-shaped memory chip packaging structure. Background Art

[0002] NAND Flash (abbreviated as Flash, the same below) is a storage medium used for data storage. Storage products such as USB flash drives, SD cards, and SSDs all use Flash to act as the "role" of data storage.

[0003] Flash memory in its bare die state is easily damaged and requires packaging. This packaging process uses polymer materials to protect the Flash memory, substrate (or lead frame), and bonding wires, forming a user-friendly integrated circuit product or module. There are many different types of Flash memory packages, but BGA packaging is a common and expensive option, as it provides excellent signal transmission stability.

[0004] Flash memory is differentiated by quality. GoodDie Flash, due to its high quality and strong stability, can be packaged in the same package. InkDie Flash, however, due to its lower quality and poor stability, cannot be packaged in the same package. Otherwise, a faulty Flash memory could cause the other Flash memory to malfunction. However, the advantages of BGA packaging are unmatched by other packages. For cost reasons, Flash memory in the InkDie market will not choose BGA packaging for Flash memory. Therefore, there is an urgent need to design a package compatible with InkDie Flash. Utility Model Content

[0005] In order to solve or partially solve the problems existing in the related art, the present application provides a special-shaped memory chip packaging structure, which can provide Flash with good and stable signal transmission performance while ensuring the packaging cost.

[0006] A first aspect of the present application provides a heterogeneous memory chip packaging structure, comprising:

[0007] A substrate having a special-shaped structure and provided with ball grid welding points;

[0008] A bare core Flash, wherein the bare core Flash is provided in the substrate, and a pad of the bare core Flash is connected to the ball grid solder joint;

[0009] A protective adhesive layer is provided, wherein the protective adhesive layer wraps the substrate so that the bare core Flash is covered under the protective adhesive layer and the ball grid solder joints are partially exposed outside the protective adhesive layer.

[0010] In one preferred embodiment, the substrate comprises: a substrate plate, lead contacts, ball grid pads and bonding wires;

[0011] The substrate plate has a special-shaped structure;

[0012] The number of the lead contacts is the same as the number of the ball grid pads, the lead contacts are located on one side of the substrate board, the ball grid pads are located on the other side of the substrate board, and the lead contacts are connected to the ball grid pads through internal wiring of the substrate board;

[0013] The bare core Flash is arranged in the substrate board, and the Pad of the bare core Flash is bonded to the lead contact through a bonding wire, so that the Pad of the bare core Flash is connected to the ball grid welding point.

[0014] In one preferred embodiment, a groove is provided on the bottom edge of the substrate plate, and the groove gives the substrate plate a special-shaped structure.

[0015] In one preferred embodiment, the groove is an L-shaped groove.

[0016] In one preferred embodiment, the groove extends to a position close to the midline of the substrate plate so that the ball grid solder joints located on the substrate plate are divided into two parts, left and right, wherein the number of the ball grid solder joints in the left half is greater than the number of the ball grid solder joints in the right half.

[0017] In one preferred embodiment, a gap area is provided between the ball grid solder joints in the left half and the ball grid solder joints in the right half, and the gap area is in a "T"-shaped structure.

[0018] In one preferred embodiment, a first guiding portion is provided at one of the corners of the other side surface of the protective adhesive layer.

[0019] In one preferred embodiment, a second guiding portion is provided at a corner position of one side surface of the protective adhesive layer, and the second guiding portion corresponds to the first guiding portion.

[0020] In one preferred embodiment, the first guiding portion is triangular in shape.

[0021] In one preferred embodiment, the second guiding portion is circular.

[0022] The technical solution of the present application includes: a substrate having a special-shaped structure and provided with ball grid solder joints; a bare core Flash, wherein the bare core Flash is provided in the substrate, and the pad of the bare core Flash is connected to the ball grid solder joints; and a protective adhesive layer, wherein the protective adhesive layer wraps the substrate so that the bare core Flash is covered under the protective adhesive layer and the ball grid solder joints are partially exposed outside the protective adhesive layer. Since the present application uses BGA packaging for a single bare core Flash, compared to the packaging of two bare core Flashes in the related art, the present application can effectively reduce the packaging cost. In addition, the BGA package can provide the bare core Flash with good and stable signal transmission performance.

[0023] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above and other objects, features and advantages of the present application will become more apparent by describing in more detail exemplary embodiments of the present application in conjunction with the accompanying drawings, wherein the same reference numerals generally represent the same components in the exemplary embodiments of the present application.

[0025] Figure 1 1 is a front view of a special-shaped memory chip packaging structure shown in an embodiment of the present application;

[0026] Figure 2 This is a back view of a special-shaped memory chip packaging structure shown in an embodiment of the present application;

[0027] Figure 3 is a three-dimensional diagram of a special-shaped memory chip packaging structure shown in one embodiment of the present application;

[0028] Figure 4 This is a diagram of the internal structure of a special-shaped memory chip packaging structure shown in one embodiment of the present application;

[0029] Figure 5 This is a reference diagram of a first usage state of a heterogeneous memory chip packaging structure shown in an embodiment of the present application;

[0030] Figure 6 This is a reference diagram of a second usage state of a heterogeneous memory chip packaging structure shown in an embodiment of the present application;

[0031] Figure 7 This is a reference diagram of a third usage state of a heterogeneous memory chip packaging structure shown in an embodiment of the present application;

[0032] Figure 8 This is a reference diagram of a fourth usage state of a heterogeneous memory chip packaging structure shown in an embodiment of the present application;

[0033] Figure 9This is a reference diagram of a fifth usage state of a heterogeneous memory chip packaging structure shown in an embodiment of the present application;

[0034] Figure 10 This is a schematic diagram of the pin definition of the BGA packaged Flash in the related art. DETAILED DESCRIPTION

[0035] The following describes embodiments of the present application in more detail with reference to the accompanying drawings. Although the accompanying drawings illustrate embodiments of the present application, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments described herein. Rather, these embodiments are provided to make the present application more thorough and complete, and to fully convey the scope of the present application to those skilled in the art.

[0036] It should be understood that although the terms "first", "second", "third", etc. may be used in this application to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0037] In the description of this application, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0038] Unless otherwise expressly specified or limited, the terms "mounted," "connected," "connect," "fixed," and the like should be interpreted broadly. For example, they may refer to fixed connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0039] In related technologies, the advantages of BGA packaging are unmatched by other packaging. However, due to cost considerations, the Flash in the InkDie market will not choose BGA to encapsulate Flash. Therefore, it is urgent to design a package that is suitable for InkDieFlash.

[0040] In order to solve the above technical problems, the present application provides a special-shaped memory chip packaging structure, which can provide Flash with good and stable signal transmission performance while ensuring the packaging cost.

[0041] The technical solution of this application is described in detail below with reference to the accompanying drawings.

[0042] Before formally introducing the technical solution of this application, let's first explain the principle behind the technical solution. The technical solution of this application essentially uses BGA packaging to package a single InkDieFlash, thereby controlling the overall packaging cost. At the same time, BGA packaging can also provide the InkDieFlash with good and stable signal transmission, thereby improving the storage performance of the Flash.

[0043] Figure 10 The figure shows the pin definition diagram of the Flash packaged in BGA in the related art. Figure 10 The same package contains two GoodDieFlash chips.

[0044] As mentioned in the background technology above, for InkDieFlash, two InkDieFlash cannot be integrated into the same package, otherwise the two InkDieFlash will affect each other. Once a problem occurs in one of the Flashes, the other Flash will not be able to be used normally. In addition, the packaging cost of BGA packaging is more expensive than other packaging forms. Therefore, for cost considerations, InkDieFlash will not be packaged using BGA packaging. However, the advantages of BGA packaging are unmatched by other packages. InkDieFlash itself is a Flash with weak stability. To fully realize the residual value of this type of Flash, it is necessary to ensure the performance stability of this type of Flash as much as possible, so as to improve the storage performance of this type of Flash.

[0045] By observation Figure 10 It can be seen that the pins under the package are divided into two parts (double horizontal lines in the figure). The pins in the upper part correspond to one of the GoodDieFlash, and the pins in the lower part correspond to the other GoodDieFlash. The pins in the upper part and the pins in the lower part are 180° rotationally symmetrical with the double horizontal lines in the figure. Then, you can try to follow the double horizontal lines in the figure to move Figure 10The package is divided into two parts, realizing a single BGA package for Flash. The double horizontal lines in the figure refer to "R" (reserved pins, generally not connected), "Wp", and "Vpp". These three types of pins can be used to perform the same functions as other Flash pins and can be omitted.

[0046] It should be noted that if a single InkDieFlash package is to be realized, wouldn't it be sufficient to package it directly in the existing rectangular format? Why go to the trouble of designing a special-shaped structure? This is because Flash, as a mature storage medium with many years of development, has a basically fixed BGA test socket structure for Flash mass production on the market. In order to be compatible with as many of these BGA test sockets as possible, designing it into a special-shaped structure can achieve perfect adaptation without changing the BGA test socket structure and pin definition, saving storage product manufacturers a lot of mass production costs. Otherwise, storage product manufacturers will have to open a mold and produce a new BGA test socket for this special-shaped BGA packaged Flash.

[0047] The above is a detailed introduction to the background of the technical solution of this application. The following is a discussion of the principle of the heterogeneous memory chip packaging structure of this application.

[0048] The technical solution of this application is described in detail below with reference to the accompanying drawings.

[0049] See also Figure 1 、 Figure 2 、 Figure 3 and Figure 4 A special-shaped memory chip packaging structure 100 includes: a substrate 110, a bare core Flash 120 and a protective adhesive layer 130.

[0050] Substrate 110 is a multilayer board with different layers, each serving a different function and made of different materials. Bare-die Flash 120 is located within the substrate, with its pads connected to ball grid pads 113. Ball grid pads 113 function as external pins for the bare-die Flash 120 on substrate 110, allowing the bare-die Flash 120 to communicate with the outside world through these pads.

[0051] Furthermore, in this embodiment, the substrate 110 may include: a substrate plate 111, lead contacts 112, ball grid pads 113, and bonding wires 114. The substrate plate 111 has a special-shaped structure; the number of lead contacts 112 and ball grid pads 113 is the same, the lead contacts 112 are located on one side of the substrate plate 111, and the ball grid pads 113 are located on the other side of the substrate plate 111. The lead contacts 112 are connected to the ball grid pads 113 via internal wiring of the substrate plate 111; the bare die Flash 120 is disposed in the substrate plate 111, and the pads of the bare die Flash 120 are bonded to the lead contacts 112 via bonding wires 114, thereby connecting the pads of the bare die Flash 120 to the ball grid pads 113. It should be emphasized that the number of lead contacts 112, ball grid pads 113, and bonding wires 114 is at least two.

[0052] The bare core Flash 120 is a core component that stores data. The bare core Flash 120 is provided with several pads (not shown in the figure). The pads are equivalent to the pins of the bare core Flash 120. These pads are electrically connected to the lead contacts 112 through bonding wires 114. The lead contacts 112 are connected to the ball grid solder joints 113 through the internal routing of the substrate board 111. In this way, when the packaged chip is mounted on the PCB board, the signal can be transmitted to the bare core Flash 120 through the ball grid solder joints 113 to complete the data interaction with the bare core Flash 120.

[0053] The protective layer 130 wraps the substrate 110 , so that the bare die Flash 120 is covered under the protective layer 130 and the ball grid pads 113 are partially exposed outside the protective layer 130 .

[0054] It should be noted that protective adhesive layer 130 serves a protective purpose. Protective adhesive layer 130 is used to wrap substrate 110, effectively preventing bonding wires 114 from being damaged by external impurities, which could prevent bare die Flash 120 from properly communicating with external devices or equipment. Furthermore, protective adhesive layer 130 also protects bare die Flash 120 from being affected by external forces, impurities, and the like. In this embodiment, protective adhesive layer 130 can be made of a polymer material.

[0055] Since the technical solution of this application is to package a single bare die Flash using BGA packaging, compared with the packaging of two bare die Flash in the related art, the packaging structure of this application can effectively reduce the packaging cost. In addition, BGA packaging can provide good and stable signal transmission for bare die Flash.

[0056] In addition, the special-shaped memory chip packaging structure 100 of the present application can be well adapted to the BGA test sockets already circulating on the market for mass production of Flash. It can achieve perfect adaptation without changing the structure and pin definition of the BGA test sockets, saving mass production costs for mass producers of storage products. Storage product manufacturers that adopt the special-shaped memory chip packaging structure of the present application do not need to open a mold to produce a corresponding new BGA test socket for the special-shaped BGA package Flash.

[0057] Furthermore, the special-shaped memory chip packaging structure of the present application is applicable not only to InkDieFlash, but also to GoodDieFlash. That is, under the condition that the bare die Flash 120 is GoodDieFlash, the packaging structure of the present application can also be used for packaging. The change is that only one Good Die bare die Flash 120 can be packaged under this package, and two GoodDieFlashes cannot be packaged.

[0058] See also Figure 3 Furthermore, in this embodiment, a groove 115 is provided on the bottom edge of the substrate plate 111, and the groove 115 makes the substrate plate 111 present a special-shaped structure.

[0059] It should be noted that the special-shaped structure is an asymmetrical polygonal structure. In this embodiment, an "L"-shaped groove is provided on the bottom edge of the substrate plate 111, so that the substrate plate 111 can be a special-shaped structure, so as to achieve the same Figure 10 The package is divided into two parts, and the two parts of the package structure are 180° rotationally symmetrical.

[0060] In this embodiment, the groove 115 extends to a position near the midline of the substrate 111, thereby dividing the BGR pads on the substrate 111 into a left and a right portion. The left portion has a greater number of BGR pads 113 than the right portion. A gap region 116 is defined between the left and right BGR pads 113, forming a "T"-shaped structure.

[0061] It should be noted that according to Figure 10 The pin definition diagram of the Flash packaged in the BGA related art shown in the figure (note Figure 10 The number of the ball grid solder joints 113 on the left half is greater than that on the right half. Therefore, in this embodiment, the distribution design and number of the ball grid solder joints 113 on the substrate plate 111 should also be the same as those on the right half. Figure 10 Correspondingly, this is done to meet the requirements of adapting to the BGA test socket.

[0062] See also Figure 1Furthermore, in this embodiment, a first guiding portion 131 is provided at one of the corners of a side surface of the protective adhesive layer 130 .

[0063] It should be noted that the first indicator portion 131 serves as a reminder, indicating that the ball grid pad 113 near the current position is the first pin of the chip. The shape of the first indicator portion 131 is not specifically limited. In this embodiment, the first indicator portion 131 is triangular in shape. In other embodiments, other shapes can also be used to manufacture the first indicator portion 131.

[0064] See also Figure 2 Furthermore, in this embodiment, a second guiding portion 132 is provided at one of the corner positions of the other side surface of the protective adhesive layer 130 , and the second guiding portion 132 corresponds to the first guiding portion 131 .

[0065] It should be noted that the second guiding portion 132 serves the same function as the first guiding portion 131, except that the first guiding portion 131 is located on one side of the protective rubber layer 130, while the second guiding portion 132 is located on the other side of the protective rubber layer 130. The shape of the second guiding portion 132 is not specifically limited. In this embodiment, the second guiding portion 132 is circular. In other embodiments, the second guiding portion 132 may also be manufactured in other shapes.

[0066] Practical application of the technical solution of this application:

[0067] 1) If the memory product uses a single-chip heterogeneous memory chip package structure 100, find the first guide portion 131, align the side with the ball grid solder joint 113 with the pad of the PCB board, melt the solder paste on the pad, and then the memory chip can be mounted on the PCB board. The heterogeneous memory chip package structure 100 after mounting has been completed can be placed in four different positions, see Figures 5 to 8 , that is, a single chip is placed horizontally or vertically. The specific placement state is selected according to the design of the PCB board.

[0068] 2) If the storage product uses a dual-chip heterogeneous memory chip packaging structure 100, the patch process is similar to 1) and will not be repeated here. The difference is that the final effect of the patch dual-chip heterogeneous memory chip packaging structure 100 is similar to a "jigsaw puzzle" design, where the two chips are "pieced together" into one piece, and there is a gap between the two adjacent heterogeneous memory chip packaging structures 100. The gap is Figure 10 The double horizontal line width is shown in the figure. For the specific placement status, please refer to Figure 9 .

[0069] The scheme of the present application has been described in detail above with reference to the accompanying drawings. In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. Those skilled in the art should also be aware that the actions and modules involved in the description are not necessarily required for this application. In addition, it is understood that the steps in the method of the embodiment of the present application can be adjusted in sequence, merged and deleted according to actual needs, and the modules in the device of the embodiment of the present application can be merged, divided and deleted according to actual needs.

[0070] The embodiments of the present application have been described above. The above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or improvements to the technology in the market, or to enable other persons skilled in the art to understand the embodiments disclosed herein.

Claims

1. A special-shaped memory chip packaging structure, characterized in that: include: A substrate comprising a substrate plate, lead contacts, ball grid solder joints, and bonding wires, wherein the lead contacts are equal in number to the ball grid solder joints, the lead contacts are located on one side of the substrate plate, and the ball grid solder joints are located on another side of the substrate plate, the lead contacts are connected to the ball grid solder joints via internal wiring of the substrate plate, a groove is formed on the bottom edge of the substrate plate, the groove gives the substrate plate a special-shaped structure, and the substrate plate is provided with ball grid solder joints; A bare core Flash, wherein the bare core Flash is provided in the substrate board, and the pad of the bare core Flash is bonded to the lead contact through the bonding wire, so that the pad of the bare core Flash is connected to the ball grid pad; A protective adhesive layer, wherein the protective adhesive layer wraps the substrate board so that the bare die Flash is covered under the protective adhesive layer and the ball grid solder joints are partially exposed outside the protective adhesive layer; The groove extends to a position close to the midline of the substrate plate, so that the ball grid welding points on the substrate are divided into left and right parts, wherein the number of the ball grid welding points in the left half is greater than that in the right half.

2. The heterogeneous memory chip packaging structure according to claim 1, characterized in that: The groove is an "L"-shaped groove.

3. The heterogeneous memory chip packaging structure according to claim 1, wherein: A gap area is provided between the ball grid welding point on the left half and the ball grid welding point on the right half, and the gap area is in a "T"-shaped structure.

4. The heterogeneous memory chip packaging structure according to claim 1, wherein: A first guiding portion is provided at one corner position of one side surface of the protective adhesive layer.

5. The heterogeneous memory chip packaging structure according to claim 4, characterized in that: A second guiding portion is provided at one corner position of the other side surface of the protective adhesive layer, and the second guiding portion corresponds to the first guiding portion.

6. The heterogeneous memory chip packaging structure according to claim 5, characterized in that: The first guiding portion is triangular in shape.

7. The heterogeneous memory chip packaging structure according to claim 5, characterized in that: The second guiding portion is circular.

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