Silicon carbide device packaging circuit, electronic equipment and silicon carbide device packaging structure

Abstract

The utility model provides a silicon carbide device packaging circuit, electronic equipment and a silicon carbide device packaging structure. A first crosstalk suppression module is added in a silicon carbide device packaging circuit to suppress crosstalk suffered by a first silicon carbide device, that is, devices needing to suppress the crosstalk suffered by the first silicon carbide device in a driving circuit are arranged in the silicon carbide device packaging circuit, so that the number of the devices of the driving circuit is reduced, and the cost of the driving circuit is reduced. Therefore, the complexity of the driving circuit is reduced, the wiring complexity of the driving circuit is reduced, and the problem that the wiring complexity of the driving circuit is increased on the basis of inhibiting crosstalk of the SiC MOSFET in the prior art is solved.

Description

Technical Field

[0001] The present application relates to the technical field of silicon carbide devices, and in particular to a silicon carbide device packaging circuit, electronic equipment, and a silicon carbide device packaging structure. Background Art

[0002] A prominent challenge facing high-frequency SiC MOSFET applications is high-frequency crosstalk between complementary transistors in a bridge circuit. If crosstalk is not mitigated, it can cause devices that should be off to falsely trigger and then turn on, leading to shoot-through in the entire bridge circuit, ultimately increasing power loss and even device damage. A common experimental approach to addressing high-frequency crosstalk is to connect capacitors in parallel across the device's gate-source terminals to increase the gate-source capacitance. This approach essentially reduces the impedance between the gate and source terminals, increasing the crosstalk current flowing through the gate-source capacitance and reducing the crosstalk current flowing through the driver resistor when crosstalk occurs. This, in turn, reduces the crosstalk voltage across the driver resistor, which in turn reduces the crosstalk voltage across the gate-source terminals connected in parallel with the driver resistor. However, this crosstalk mitigation approach presents two significant issues. First, the upper and lower transistors in a bridge circuit are often complementary. In the previous stage, the high-side transistor may function as a shutdown transistor, susceptible to crosstalk. If a capacitor is connected across its gate and source to mitigate the crosstalk, then when the high-side transistor functions as a switch in the next stage, this connection will significantly reduce the switching speed of the device. Furthermore, connecting a capacitor across the device's external gate and source increases the complexity of the driver circuit wiring. Furthermore, the capacitance value must be independently calculated by the user based on the degree of crosstalk, making it difficult to use.

[0003] That is, the existing solution increases the complexity of the drive circuit wiring on the basis of suppressing crosstalk of SiC MOSFET. Utility Model Content

[0004] The main purpose of the present application is to provide a silicon carbide device packaging circuit, electronic equipment and silicon carbide device packaging structure, so as to at least solve the problem that the existing solution increases the complexity of the drive circuit wiring on the basis of suppressing crosstalk of SiC MOSFET.

[0005] To achieve the above objectives, according to one aspect of the present application, a silicon carbide device packaging circuit is provided, the method comprising:

[0006] a first silicon carbide device, wherein a drain and a source of the first silicon carbide device are respectively used to be electrically connected to a silicon carbide device power chip, and a gate of the first silicon carbide device is used to be electrically connected to a driving circuit;

[0007] A first crosstalk suppression module has a first end and a second end, the first end of the first crosstalk suppression module is electrically connected to the gate of the first silicon carbide device, and the first end of the first crosstalk suppression module is electrically connected to the driving circuit, the second end of the first crosstalk suppression module can be electrically connected to the source of the first silicon carbide device, and the first crosstalk suppression module is used to suppress crosstalk suffered by the first silicon carbide device.

[0008] Optionally, the silicon carbide device packaging circuit also includes: a first capacitor, a second capacitor and a third capacitor, the first capacitor is electrically connected between the gate and the drain of the first silicon carbide device, the second capacitor is electrically connected between the gate and the source of the first silicon carbide device, and the third capacitor is electrically connected between the source and the drain of the first silicon carbide device.

[0009] Optionally, the first crosstalk suppression module includes: a first resistor, a second resistor, a third resistor, a first power switching device and a fourth capacitor, the first end of the first resistor is electrically connected to the driving circuit, the emitter of the first power switching device is electrically connected to the second end of the first resistor and the gate of the first silicon carbide device, respectively, the first end of the second resistor is electrically connected to the first end of the first resistor and the first end of the third resistor, respectively, the base of the first power switching device is electrically connected to the second end of the second resistor, the first end of the fourth capacitor is electrically connected to the collector of the first power switching device, and the second end of the third resistor is electrically connected to the source of the first silicon carbide device and the second end of the fourth capacitor, respectively.

[0010] Optionally, the first power switch device is a triode structure.

[0011] Optionally, the silicon carbide device packaging circuit further includes: a square wave pulse power supply electrically connected between the first end of the first crosstalk suppression module and the source of the first silicon carbide device.

[0012] Optionally, the silicon carbide device packaging circuit further includes: a protection resistor electrically connected between the square wave pulse power supply and the first end of the first crosstalk suppression module.

[0013] Optionally, the silicon carbide device packaging circuit further includes:

[0014] a second silicon carbide device, wherein the drain and source of the second silicon carbide device are respectively used to be electrically connected to the silicon carbide device power chip, the gate of the second silicon carbide device is used to be electrically connected to the drive circuit, and the drain of the second silicon carbide device is electrically connected to the source of the first silicon carbide device;

[0015] A second crosstalk suppression module has a first end and a second end, the first end of the second crosstalk suppression module is electrically connected to the gate of the second silicon carbide device, and the first end of the second crosstalk suppression module is electrically connected to the driving circuit, the second end of the second crosstalk suppression module can be electrically connected to the source of the second silicon carbide device, and the second crosstalk suppression module is used to suppress crosstalk suffered by the second silicon carbide device.

[0016] Optionally, the silicon carbide device packaging circuit also includes: a fifth capacitor, a sixth capacitor and a seventh capacitor, the fifth capacitor is electrically connected between the gate and the drain of the second silicon carbide device, the sixth capacitor is electrically connected between the gate and the source of the second silicon carbide device, and the seventh capacitor is electrically connected between the source and the drain of the second silicon carbide device.

[0017] Optionally, the second crosstalk suppression module includes: a fourth resistor, a fifth resistor, a sixth resistor, a second power switching device and an eighth capacitor, the first end of the fourth resistor is electrically connected to the driving circuit, the emitter of the second power switching device is electrically connected to the second end of the fourth resistor and the gate of the second silicon carbide device, respectively, the first end of the fifth resistor is electrically connected to the first end of the fourth resistor and the first end of the sixth resistor, respectively, the base of the second power switching device is electrically connected to the second end of the fifth resistor, the first end of the eighth capacitor is electrically connected to the collector of the second power switching device, and the second end of the sixth resistor is electrically connected to the source of the second silicon carbide device and the second end of the eighth capacitor, respectively.

[0018] Optionally, the first silicon carbide device and the second silicon carbide device are both NMOS.

[0019] Optionally, the second power switch device is a triode structure.

[0020] Optionally, the silicon carbide device packaging circuit also includes: a reverse voltage source and a main voltage source, the reverse voltage source is electrically connected between the first end of the second crosstalk suppression module and the gate of the second silicon carbide device, and the main voltage source is electrically connected between the drain of the first silicon carbide device and the source of the second silicon carbide device.

[0021] Optionally, the silicon carbide device packaging circuit also includes: a voltage-stabilizing inductor, a voltage-stabilizing capacitor and a load, the first end of the voltage-stabilizing inductor is electrically connected to the source of the first silicon carbide device, the second end of the voltage-stabilizing inductor is electrically connected to the first end of the voltage-stabilizing capacitor and the first end of the load, respectively, and the second end of the voltage-stabilizing capacitor is electrically connected to the second end of the load and the source of the second silicon carbide device, respectively.

[0022] According to another aspect of the present application, an electronic device is provided, comprising: any one of the silicon carbide device packaging circuits.

[0023] According to another aspect of the present application, a silicon carbide device packaging structure is provided, which includes: any one of the silicon carbide device packaging circuits and silicon carbide device power chips, and the silicon carbide device packaging circuit is connected to the silicon carbide device power chip through bonding wires.

[0024] By applying the technical solution of the present application, the crosstalk experienced by the first silicon carbide device is suppressed by adding a first crosstalk suppression module to the silicon carbide device packaging circuit. That is, the device in the driving circuit that needs to suppress the crosstalk experienced by the first silicon carbide device is arranged in the silicon carbide device packaging circuit, thereby reducing the number of devices in the driving circuit, that is, reducing the complexity of the driving circuit, thereby reducing the complexity of the driving circuit wiring, and thus solving the problem that the existing solution increases the complexity of the driving circuit wiring on the basis of suppressing crosstalk of SiCMOSFET. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The drawings that constitute part of this application are used to provide a further understanding of this application. The illustrative embodiments of this application and their descriptions are used to explain this application and do not constitute an improper limitation on this application. In the drawings:

[0026] Figure 1 A schematic diagram of a silicon carbide device packaging circuit provided in an embodiment of the present application is shown;

[0027] Figure 2 A schematic diagram of a conventional packaging circuit provided according to an embodiment of the present application is shown;

[0028] Figure 3 A packaging schematic diagram of a silicon carbide device packaging structure provided according to an embodiment of the present application is shown.

[0029] The above drawings include the following reference numerals:

[0030] 100. First crosstalk suppression module; 200. Second crosstalk suppression module. DETAILED DESCRIPTION

[0031] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments in this application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0032] In order to enable those skilled in the art to better understand the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of this application.

[0033] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0034] For ease of description, some nouns or terms involved in the embodiments of the present application are explained below:

[0035] Crosstalk refers to the phenomenon in wireless communication systems where signals are affected by other wireless signals or electromagnetic interference during transmission, resulting in signal quality degradation or data transmission errors. Crosstalk can be categorized as intra-channel crosstalk, where signals at the same frequency interfere with each other, while inter-channel crosstalk occurs between signals at different frequencies. Crosstalk can affect the performance and stability of communication systems, requiring appropriate interference suppression and signal processing techniques to mitigate its impact.

[0036] As mentioned in the background, a prominent challenge facing SiC MOSFETs in achieving high-frequency applications is high-frequency crosstalk between complementary transistors in a bridge circuit. If crosstalk is not mitigated, it can cause devices that should be off to falsely trigger and then turn on, leading to shoot-through in the entire bridge circuit, ultimately increasing circuit power loss and even device damage. A common experimental approach to addressing high-frequency crosstalk is to connect capacitors in parallel across the device's external gate-source electrodes to increase the gate-source capacitance. This approach essentially reduces the impedance between the gate and source electrodes, increasing the crosstalk current flowing through the gate-source capacitance and reducing the crosstalk current flowing through the drive resistor when crosstalk occurs. This reduces the corresponding crosstalk voltage across the drive resistor, thereby reducing the crosstalk voltage across the gate-source electrode connected in parallel with the drive resistor. However, these crosstalk mitigation methods present two significant issues. First, the upper and lower transistors in a bridge circuit are often complementary. The upper transistor in the previous stage may act as a shutoff transistor affected by crosstalk. If a capacitor is connected in parallel across its gate and source to suppress the crosstalk, then when the upper transistor acts as a switch transistor in the next stage, the operation of connecting the capacitor in parallel across the gate and source will greatly reduce the switching speed of the device. Secondly, the method of connecting capacitors in parallel across the gate and source of the device increases the complexity of the drive circuit wiring; and the capacitance value must be independently calculated by the user based on the degree of crosstalk impact, which increases the user's difficulty in use. To address the problem that existing solutions increase the complexity of the drive circuit wiring while suppressing crosstalk in SiC MOSFETs, embodiments of the present application provide a silicon carbide device packaging circuit, electronic equipment, and silicon carbide device packaging structure.

[0037] The technical solutions in the embodiments of the present invention will be described clearly and completely below with reference to the accompanying drawings in the embodiments of the present invention.

[0038] The present application provides a silicon carbide device packaging circuit, such as Figure 1 As shown, the method includes:

[0039] A first silicon carbide device NMOS1, wherein the drain and source of the first silicon carbide device are respectively used to be electrically connected to the silicon carbide device power chip, and the gate of the first silicon carbide device is used to be electrically connected to the driving circuit;

[0040] The first crosstalk suppression module 100 has a first end and a second end. The first end of the first crosstalk suppression module is electrically connected to the gate of the first silicon carbide device, and the first end of the first crosstalk suppression module is electrically connected to the driving circuit. The second end of the first crosstalk suppression module can be electrically connected to the source of the first silicon carbide device. The first crosstalk suppression module is used to suppress the crosstalk suffered by the first silicon carbide device.

[0041] In the above-mentioned silicon carbide device packaging circuit, the crosstalk experienced by the above-mentioned first silicon carbide device is suppressed by adding a first crosstalk suppression module to the silicon carbide device packaging circuit. That is, the device in the driving circuit that needs to suppress the crosstalk experienced by the above-mentioned first silicon carbide device is arranged in the silicon carbide device packaging circuit, thereby reducing the number of devices in the driving circuit, that is, reducing the complexity of the driving circuit, thereby reducing the complexity of the driving circuit wiring, and thus solving the problem that the existing solution increases the complexity of the driving circuit wiring on the basis of suppressing crosstalk of SiC MOSFET.

[0042] In one embodiment of the present application, Figure 1 As shown, the above-mentioned silicon carbide device packaging circuit also includes: a first capacitor Cgd_H, a second capacitor Cgs_H and a third capacitor Cds_H, the above-mentioned first capacitor is electrically connected between the gate and the drain of the above-mentioned first silicon carbide device, the above-mentioned second capacitor is electrically connected between the gate and the source of the above-mentioned first silicon carbide device, and the above-mentioned third capacitor is electrically connected between the source and the drain of the above-mentioned first silicon carbide device.

[0043] In one embodiment of the present application, Figure 1 As shown, the first crosstalk suppression module 100 includes: a first resistor R1_H, a second resistor R2_H, a third resistor R3_H, a first power switching device Q1 and a fourth capacitor C_H, the first end of the first resistor is electrically connected to the above-mentioned driving circuit, the emitter of the above-mentioned first power switching device is electrically connected to the second end of the above-mentioned first resistor and the gate of the above-mentioned first silicon carbide device, the first end of the above-mentioned second resistor is electrically connected to the first end of the above-mentioned first resistor and the first end of the above-mentioned third resistor, the base of the above-mentioned first power switching device is electrically connected to the second end of the above-mentioned second resistor, the first end of the above-mentioned fourth capacitor is electrically connected to the collector of the above-mentioned first power switching device, and the second end of the above-mentioned third resistor is electrically connected to the source of the above-mentioned first silicon carbide device and the second end of the above-mentioned fourth capacitor.

[0044] Specifically, the value of the fourth capacitor should be much larger than the gate-source parasitic capacitance of the NMOS power chip (i.e., the first capacitor Cgd_H, the second capacitor Cgs_H, and the third capacitor Cds_H), at least 10 times greater. The purpose of the above-mentioned capacitance values ​​is to make the Miller current generated by crosstalk flow more through the branch where the capacitor C is located, thereby flowing less into the gate-source parasitic capacitance of the NMOS power chip (i.e., the first capacitor Cgd_H, the second capacitor Cgs_H, and the third capacitor Cds_H).

[0045] The improved package circuit includes two gate terminals, one for crosstalk suppression and the other for normal switching. When the SiC MOSFET is used as a turn-off transistor affected by crosstalk, the G2_H terminal should be connected to the driver circuit. If crosstalk occurs, the current generated by the crosstalk on the Miller capacitor will flow through the second resistor R2_H. The voltage drop across R1 will cause the first power switch device Q1 to turn on, causing the fourth capacitor C_H to be connected to the gate and source of the NMOS power chip. Because the capacitance of the fourth capacitor C_H is much larger than the parasitic capacitance of the gate and source of the NMOS power chip, most of the Miller current caused by crosstalk will flow through the branch where capacitor C is located, greatly reducing the voltage rise across the gate and source of the NMOS power chip, thereby effectively preventing the turn-on of the turn-off transistor. When the SiC MOSFET is used as a normal switching transistor, the G1_H terminal should be connected to the driver circuit. At this time, the voltage drop of the driving current on the second resistor R2_H cannot turn on the first power switch device Q1, that is, the fourth capacitor C_H is not connected in parallel across the gate and source of the NMOS power chip, and will not affect the turn-on speed of the power device.

[0046] In one embodiment of the present application, the first power switch device is a triode structure.

[0047] In one embodiment of the present application, Figure 1 As shown, the silicon carbide device packaging circuit further includes: a square wave pulse power supply Vg_H, electrically connected between the first end of the first crosstalk suppression module and the source of the first silicon carbide device.

[0048] Specifically, when the square wave pulse power supply Vg_H provides a peak voltage, the first silicon carbide device is turned on and the second silicon carbide device is turned off. When the square wave pulse power supply Vg_H provides a valley voltage, the first silicon carbide device is turned off and the second silicon carbide device is turned on.

[0049] In one embodiment of the present application, the silicon carbide device packaging circuit further includes: a protection resistor electrically connected between the square wave pulse power supply and the first end of the first crosstalk suppression module.

[0050] Protection resistors are used to protect silicon carbide device packaging circuits.

[0051] In one embodiment of the present application, Figure 1 As shown, the above silicon carbide device packaging circuit also includes:

[0052] a second silicon carbide device NMOS2, wherein the drain and source of the second silicon carbide device are respectively electrically connected to the silicon carbide device power chip, the gate of the second silicon carbide device is electrically connected to the drive circuit, and the drain of the second silicon carbide device is electrically connected to the source of the first silicon carbide device;

[0053] The second crosstalk suppression module 200 has a first end and a second end. The first end of the second crosstalk suppression module is electrically connected to the gate of the second silicon carbide device, and the first end of the second crosstalk suppression module is electrically connected to the driving circuit. The second end of the second crosstalk suppression module can be electrically connected to the source of the second silicon carbide device. The second crosstalk suppression module is used to suppress the crosstalk suffered by the second silicon carbide device.

[0054] Specifically, when the square wave pulse power supply Vg_H provides the valley voltage, the first silicon carbide device is turned off and the second silicon carbide device is turned on. At this time, the second crosstalk suppression module is used to suppress the crosstalk suffered by the second silicon carbide device.

[0055] In one embodiment of the present application, Figure 1 As shown, the above-mentioned silicon carbide device packaging circuit also includes: a fifth capacitor Cgd_L, a sixth capacitor Cgs_L and a seventh capacitor Cds_L, the above-mentioned fifth capacitor is electrically connected between the gate and the drain of the above-mentioned second silicon carbide device, the above-mentioned sixth capacitor is electrically connected between the gate and the source of the above-mentioned second silicon carbide device, and the above-mentioned seventh capacitor is electrically connected between the source and the drain of the above-mentioned second silicon carbide device.

[0056] like Figure 1 As shown, the second crosstalk suppression module 200 includes: a fourth resistor R1_L, a fifth resistor R2_L, a sixth resistor R3_L, a second power switching device Q2 and an eighth capacitor C_L, the first end of the fourth resistor is electrically connected to the above-mentioned driving circuit, the emitter of the second power switching device is electrically connected to the second end of the fourth resistor and the gate of the second silicon carbide device, the first end of the fifth resistor is electrically connected to the first end of the fourth resistor and the first end of the sixth resistor, the base of the second power switching device is electrically connected to the second end of the fifth resistor, the first end of the eighth capacitor is electrically connected to the collector of the second power switching device, and the second end of the sixth resistor is electrically connected to the source of the second silicon carbide device and the second end of the eighth capacitor.

[0057] Specifically, similar to the fourth capacitor C_H, the eighth capacitor C_L should be much larger than the fifth capacitor Cgd_L, the sixth capacitor Cgs_L, and the seventh capacitor Cds_L, at least 10 times larger. The purpose of the above capacitance values ​​is to allow more of the Miller current generated by crosstalk to flow through the branch where the capacitor C is located, thereby less flowing into the fifth capacitor Cgd_L, the sixth capacitor Cgs_L, and the seventh capacitor Cds_L.

[0058] In one embodiment of the present application, the first silicon carbide device and the second silicon carbide device are both NMOS.

[0059] In one embodiment of the present application, the second power switch device is a triode structure.

[0060] In one embodiment of the present application, Figure 1 As shown, the above-mentioned silicon carbide device packaging circuit also includes: a reverse voltage source Vg_L and a main voltage source Vdc, the above-mentioned reverse voltage source is electrically connected between the first end of the above-mentioned second crosstalk suppression module and the gate of the above-mentioned second silicon carbide device, and the above-mentioned main voltage source is electrically connected between the drain of the above-mentioned first silicon carbide device and the source of the above-mentioned second silicon carbide device.

[0061] The reverse voltage source Vg_L provides a negative voltage to the second silicon carbide device to keep it in an off state, and the main voltage source Vdc provides an input voltage to the silicon carbide device packaging circuit.

[0062] In one embodiment of the present application, Figure 1 As shown, the above-mentioned silicon carbide device packaging circuit also includes: a voltage-stabilizing inductor L, a voltage-stabilizing capacitor C and a load R, the first end of the above-mentioned voltage-stabilizing inductor is electrically connected to the source of the above-mentioned first silicon carbide device, the second end of the above-mentioned voltage-stabilizing inductor is electrically connected to the first end of the above-mentioned voltage-stabilizing capacitor and the first end of the above-mentioned load, respectively, and the second end of the above-mentioned voltage-stabilizing capacitor is electrically connected to the second end of the above-mentioned load and the source of the above-mentioned second silicon carbide device.

[0063] Specifically, the voltage stabilizing inductor L and the voltage stabilizing capacitor C form a voltage stabilizing circuit.

[0064] According to the principle of improving the packaging circuit, users can flexibly select the corresponding gate terminal according to the working state of the device, which can effectively suppress the occurrence of crosstalk in the turn-off device without affecting the switching speed of the switching device.

[0065] When the upper tube is working in the switching state, the corresponding parameters are indicated by the suffix H; when the lower tube is working in the negative pressure shutdown state, the corresponding parameters are indicated by the suffix L. When the upper tube of the conventional packaging circuit is turned on, the crosstalk principle of the lower tube is as follows Figure 2 As shown in the figure. When the upper tube is turned on, the drain-source voltage Vds_L of the lower tube rises. Because the turn-on time is very short, a large voltage change rate dVds_L / dt will be generated between the drain and source. This voltage change rate will generate a displacement current on the Miller capacitor Cgd_L of the lower tube. When the displacement current flows through the gate-source capacitor of the lower tube and charges it, it will cause the gate-source voltage of the lower tube to rise. If the raised voltage is too high, it will cause the lower tube to be mis-turned on, causing Figure 2 The middle bridge arm is connected directly up and down, short-circuiting the power supply.

[0066] Improved packaging circuits for SiC MOSFETs with bridge arm crosstalk suppression (i.e., silicon carbide device packaging circuits), such as Figure 1As shown in the figure, because the top transistor is a switching transistor, the gate terminal G1_H must be connected to the driver circuit. When the top transistor is turned on, the driver power supply generates a voltage drop across the package's internal circuit R1_H, with a positive voltage on the right and a negative voltage on the left. At this point, transistor Q_H is turned off, without affecting the top transistor's turn-on speed. The bottom transistor is a shutdown transistor and, due to crosstalk, requires the gate terminal G2_H to be connected to the driver circuit. At this point, the Miller current generated by the bottom transistor's Miller capacitor Cgd_L, caused by the top transistor turning on, generates a voltage across R1_L with a negative voltage on the right and a positive voltage on the left. This voltage causes transistor Q_L to turn on, placing capacitor C_L in parallel with the bottom transistor's gate-source capacitor Cgs_L. Because the internal circuit design of the package selects a capacitor C_L with a capacitance value significantly greater than the gate-source capacitor Cgs_L, the majority of the Miller current caused by crosstalk will flow through the branch containing capacitor C_L, significantly reducing the voltage rise across the chip's gate and source, thus suppressing crosstalk. When the high-side transistor turn-on process is completed, the energy stored in capacitor C_L will gradually discharge through the PN junction of transistor Q_L and resistor R3_L.

[0067] According to another aspect of the present application, an electronic device is provided, comprising: any one of the aforementioned silicon carbide device packaging circuits. Crosstalk experienced by the aforementioned first silicon carbide device is suppressed by adding a first crosstalk suppression module to the silicon carbide device packaging circuit. Specifically, the components in the driving circuit that require crosstalk suppression for the aforementioned first silicon carbide device are disposed within the silicon carbide device packaging circuit, thereby reducing the number of components in the driving circuit, i.e., reducing the complexity of the driving circuit and thus reducing the complexity of the driving circuit wiring. This solves the problem that existing solutions increase the complexity of the driving circuit wiring while suppressing crosstalk for SiC MOSFETs.

[0068] According to another aspect of the present application, a silicon carbide device packaging structure is provided, comprising: any one of the above-mentioned silicon carbide device packaging circuits and a silicon carbide device power chip, wherein the silicon carbide device packaging circuit and the silicon carbide device power chip are connected via bonding wires. A first crosstalk suppression module is added to the silicon carbide device packaging circuit to suppress the crosstalk experienced by the first silicon carbide device. That is, the components in the driving circuit that need to suppress the crosstalk experienced by the first silicon carbide device are arranged in the silicon carbide device packaging circuit, thereby reducing the number of components in the driving circuit, that is, reducing the complexity of the driving circuit, thereby reducing the complexity of the driving circuit wiring, and thus solving the problem that the existing solution increases the complexity of the driving circuit wiring while suppressing crosstalk for SiC MOSFETs.

[0069] The packaging process of silicon carbide device packaging structure is as follows Figure 3 As shown, the crosstalk suppression circuit board is the first crosstalk suppression module, the NMOS chip is the first silicon carbide device, G1 and G2 correspond to G1_H and G2_H respectively, and D and S correspond to D_H and S_H respectively.

[0070] It should be noted that the above electrical connection can be a direct electrical connection or an indirect electrical connection. Direct electrical connection means that two devices are directly connected, and indirect electrical connection means that other devices such as capacitors and resistors are connected between the connected A and B.

[0071] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0072] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0073] 1) The silicon carbide device packaging circuit of the present application suppresses the crosstalk experienced by the above-mentioned first silicon carbide device by adding a first crosstalk suppression module to the silicon carbide device packaging circuit. That is, the device in the driving circuit that needs to suppress the crosstalk experienced by the above-mentioned first silicon carbide device is arranged in the silicon carbide device packaging circuit, thereby reducing the number of devices in the driving circuit, that is, reducing the complexity of the driving circuit, thereby reducing the complexity of the driving circuit wiring, and thus solving the problem that the existing solution increases the complexity of the driving circuit wiring on the basis of suppressing crosstalk of SiC MOSFET.

[0074] 2) The silicon carbide device packaging structure of the present application suppresses the crosstalk experienced by the above-mentioned first silicon carbide device by adding a first crosstalk suppression module to the silicon carbide device packaging circuit. That is, the device in the driving circuit that needs to suppress the crosstalk experienced by the above-mentioned first silicon carbide device is arranged in the silicon carbide device packaging circuit, thereby reducing the number of devices in the driving circuit, that is, reducing the complexity of the driving circuit, thereby reducing the complexity of the driving circuit wiring, and thus solving the problem that the existing solution increases the complexity of the driving circuit wiring on the basis of suppressing crosstalk of SiC MOSFET.

[0075] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A silicon carbide device packaging circuit, characterized in that: include: a first silicon carbide device, wherein a drain and a source of the first silicon carbide device are respectively used to be electrically connected to a silicon carbide device power chip, and a gate of the first silicon carbide device is used to be electrically connected to a driving circuit; a first crosstalk suppression module having a first end and a second end, wherein the first end of the first crosstalk suppression module is electrically connected to the gate of the first silicon carbide device, and the first end of the first crosstalk suppression module is electrically connected to the driving circuit, and the second end of the first crosstalk suppression module can be electrically connected to the source of the first silicon carbide device, and the first crosstalk suppression module is used to suppress crosstalk on the first silicon carbide device; The first crosstalk suppression module includes: a first resistor, a second resistor, a third resistor, a first power switching device and a fourth capacitor, the first end of the first resistor is electrically connected to the driving circuit, the emitter of the first power switching device is electrically connected to the second end of the first resistor and the gate of the first silicon carbide device, the first end of the second resistor is electrically connected to the first end of the first resistor and the first end of the third resistor, the base of the first power switching device is electrically connected to the second end of the second resistor, the first end of the fourth capacitor is electrically connected to the collector of the first power switching device, and the second end of the third resistor is electrically connected to the source of the first silicon carbide device and the second end of the fourth capacitor.

2. The silicon carbide device packaging circuit according to claim 1, characterized in that: The silicon carbide device packaging circuit also includes: a first capacitor, a second capacitor and a third capacitor, the first capacitor is electrically connected between the gate and the drain of the first silicon carbide device, the second capacitor is electrically connected between the gate and the source of the first silicon carbide device, and the third capacitor is electrically connected between the source and the drain of the first silicon carbide device.

3. The silicon carbide device packaging circuit according to claim 1, characterized in that: The first power switch device is a triode structure.

4. The silicon carbide device packaging circuit according to claim 1, characterized in that: The silicon carbide device packaging circuit further includes: a square wave pulse power supply electrically connected between the first end of the first crosstalk suppression module and the source of the first silicon carbide device.

5. The silicon carbide device packaging circuit according to claim 4, characterized in that: The silicon carbide device packaging circuit further includes: a protection resistor electrically connected between the square wave pulse power supply and the first end of the first crosstalk suppression module.

6. The silicon carbide device packaging circuit according to claim 1, characterized in that: The silicon carbide device packaging circuit further includes: a second silicon carbide device, wherein the drain and source of the second silicon carbide device are respectively used to be electrically connected to the silicon carbide device power chip, the gate of the second silicon carbide device is used to be electrically connected to the drive circuit, and the drain of the second silicon carbide device is electrically connected to the source of the first silicon carbide device; A second crosstalk suppression module has a first end and a second end, the first end of the second crosstalk suppression module is electrically connected to the gate of the second silicon carbide device, and the first end of the second crosstalk suppression module is electrically connected to the driving circuit, the second end of the second crosstalk suppression module can be electrically connected to the source of the second silicon carbide device, and the second crosstalk suppression module is used to suppress crosstalk suffered by the second silicon carbide device.

7. The silicon carbide device packaging circuit according to claim 6, characterized in that: The silicon carbide device packaging circuit also includes: a fifth capacitor, a sixth capacitor and a seventh capacitor, the fifth capacitor is electrically connected between the gate and the drain of the second silicon carbide device, the sixth capacitor is electrically connected between the gate and the source of the second silicon carbide device, and the seventh capacitor is electrically connected between the source and the drain of the second silicon carbide device.

8. The silicon carbide device packaging circuit according to claim 6, characterized in that: The second crosstalk suppression module includes: a fourth resistor, a fifth resistor, a sixth resistor, a second power switching device and an eighth capacitor, the first end of the fourth resistor is electrically connected to the drive circuit, the emitter of the second power switching device is electrically connected to the second end of the fourth resistor and the gate of the second silicon carbide device, the first end of the fifth resistor is electrically connected to the first end of the fourth resistor and the first end of the sixth resistor, the base of the second power switching device is electrically connected to the second end of the fifth resistor, the first end of the eighth capacitor is electrically connected to the collector of the second power switching device, and the second end of the sixth resistor is electrically connected to the source of the second silicon carbide device and the second end of the eighth capacitor.

9. The silicon carbide device packaging circuit according to claim 6, characterized in that: The first silicon carbide device and the second silicon carbide device are both NMOS.

10. The silicon carbide device packaging circuit according to claim 8, characterized in that: The second power switch device is a triode structure.

11. The silicon carbide device package circuit according to claim 6, characterized in that: The silicon carbide device packaging circuit also includes: a reverse voltage source and a main voltage source, the reverse voltage source is electrically connected between the first end of the second crosstalk suppression module and the gate of the second silicon carbide device, and the main voltage source is electrically connected between the drain of the first silicon carbide device and the source of the second silicon carbide device.

12. The silicon carbide device package circuit according to claim 6, characterized in that: The silicon carbide device packaging circuit also includes: a voltage-stabilizing inductor, a voltage-stabilizing capacitor and a load, wherein the first end of the voltage-stabilizing inductor is electrically connected to the source of the first silicon carbide device, the second end of the voltage-stabilizing inductor is electrically connected to the first end of the voltage-stabilizing capacitor and the first end of the load, respectively, and the second end of the voltage-stabilizing capacitor is electrically connected to the second end of the load and the source of the second silicon carbide device, respectively.

13. An electronic device, characterized in that: include: The silicon carbide device package circuit according to any one of claims 1 to 12.

14. A silicon carbide device packaging structure, characterized in that: include: The silicon carbide device packaging circuit and the silicon carbide device power chip according to any one of claims 1 to 12, wherein the silicon carbide device packaging circuit and the silicon carbide device power chip are connected to each other via bonding wires.

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