USB extension device, USB cable and USB extension system

Abstract

The embodiment of the utility model provides a USB extension device, a USB cable and a USB extension system. The USB extension device comprises a USB input port, a USB output port, a data signal optimization circuit and a power supply optimization circuit, a first data signal pin of the data signal optimization circuit is connected with a data signal pin of the USB input port, a second data signal pin of the data signal optimization circuit is connected with a data signal pin of the USB output port, and a power supply input end of the power supply optimization circuit is connected with a power supply pin of the USB input port. The power supply output end of the power supply optimization circuit is connected with the power supply pin of the USB output port. The extension of USB signal transmission is realized, the support for long-distance USB signal transmission is realized, and the flexibility of USB signal transmission is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of signal transmission, in particular to a USB extension device, a USB cable and a USB extension system. Background Art

[0002] Existing USB (Universal Serial Bus) signal transmission cables are usually short in length while ensuring USB signal transmission speed and minimal USB signal attenuation. For example, USB 3.2 (a high-speed data transmission standard) can only transmit USB signals over a distance of approximately 3 meters and does not support USB signal transmission between long-distance host devices and controlled devices, affecting the flexibility of USB signal transmission. Utility Model Content

[0003] The purpose of the present invention is to provide a USB extension device, a USB cable, and a USB extension system to improve the flexibility of USB signal transmission. The specific technical solution is as follows:

[0004] In a first aspect, an embodiment of the present invention provides a USB extension device, the device comprising:

[0005] USB input port, USB output port, data signal optimization circuit, power optimization circuit;

[0006] The first data signal pin of the data signal optimization circuit is connected to the data signal pin of the USB input port, the second data signal pin of the data signal optimization circuit is connected to the data signal pin of the USB output port, the power input end of the power optimization circuit is connected to the power pin of the USB input port, and the power output end of the power optimization circuit is connected to the power pin of the USB output port.

[0007] In one possible implementation,

[0008] The first data signal pin includes a first data signal sending pin and a first data signal receiving pin, the second data signal pin includes a second data signal sending pin and a second data signal receiving pin, and the data signal pin includes a data signal sending pin and a data signal receiving pin;

[0009] The first data signal receiving pin of the data signal optimization circuit is connected to the data signal sending pin of the USB input port, and the data signal sending pin of the USB input port is used to transmit the TX signal of the USB host;

[0010] The second data signal sending pin of the data signal optimization circuit is connected to the data signal receiving pin of the USB output port, and the data signal receiving pin of the USB output port is used to transmit the RX signal of the USB host;

[0011] The second data signal receiving pin of the data signal optimization circuit is connected to the data signal sending pin of the USB output port, and the data signal sending pin of the USB output port is used to transmit the TX signal of the USB controlled device;

[0012] The first data signal sending pin of the data signal optimization circuit is connected to the data signal receiving pin of the USB input port, and the data signal receiving pin of the USB input port is used to transmit the RX signal of the USB controlled device.

[0013] In a possible implementation, the data signal optimization circuit includes a first signal equalization subcircuit, a first clock recovery subcircuit, a first signal drive enhancement subcircuit, a second signal equalization subcircuit, a second clock recovery subcircuit, and a second signal drive enhancement subcircuit;

[0014] The input end of the first signal equalization subcircuit is connected to the data signal transmission pin of the USB input port, the output end of the first signal equalization subcircuit is connected to the input end of the first clock recovery subcircuit, the output end of the first clock recovery subcircuit is connected to the input end of the first signal drive enhancement subcircuit, and the output end of the first signal drive enhancement subcircuit is connected to the data signal receiving pin of the USB output port;

[0015] The input end of the second signal equalization sub-circuit is connected to the data signal sending pin of the USB output port, the output end of the second signal equalization sub-circuit is connected to the input end of the second clock recovery sub-circuit, the output end of the second clock recovery sub-circuit is connected to the input end of the second signal drive enhancement sub-circuit, and the output end of the second signal drive enhancement sub-circuit is connected to the data signal receiving pin of the USB input port.

[0016] In a possible implementation, the power optimization circuit includes a first voltage stabilization subcircuit, a voltage boost subcircuit, and a second voltage stabilization subcircuit;

[0017] The input end of the boost sub-circuit is connected to the power pin of the USB input port and the first voltage stabilizing sub-circuit respectively;

[0018] The output end of the voltage boost sub-circuit is connected to the power pin of the USB output port and the second voltage stabilization sub-circuit respectively.

[0019] In a possible implementation, the power optimization circuit further includes a linear voltage stabilization subcircuit;

[0020] The input end of the linear voltage stabilization sub-circuit is connected to the output end of the boost sub-circuit, and the output end of the linear voltage stabilization sub-circuit is connected to the power pin of the data signal optimization circuit.

[0021] In a possible implementation, the device further includes a first filtering subcircuit, a second filtering subcircuit, a first electrostatic protection subcircuit, and a second electrostatic protection subcircuit;

[0022] A first end of the first filtering subcircuit is connected to a data signal pin of the USB input port, and a second end of the first filtering subcircuit is connected to a first data signal pin of the data signal optimization circuit and the first electrostatic protection subcircuit respectively;

[0023] The first end of the second filtering subcircuit is connected to the data signal pin of the USB output port, and the second end of the second filtering subcircuit is respectively connected to the second data signal pin of the data signal optimization circuit and the second electrostatic protection subcircuit.

[0024] In a possible implementation manner, the first voltage stabilization subcircuit includes a first capacitor;

[0025] The first pin of the first capacitor is connected to the power pin of the USB input port and the input end of the boost sub-circuit respectively, and the second pin of the first capacitor is grounded.

[0026] In a possible implementation manner, the second voltage stabilization subcircuit includes a second capacitor;

[0027] The first pin of the second capacitor is connected to the power pin of the USB output port and the output end of the boost sub-circuit respectively, and the second pin of the second capacitor is grounded.

[0028] In a possible implementation, the boost subcircuit includes a voltage conversion unit, a third capacitor, and a fourth capacitor;

[0029] The input pin of the voltage conversion unit is connected to the first pin of the third capacitor and the input end of the boost sub-circuit respectively, and the second pin of the third capacitor is grounded;

[0030] The output pin of the voltage conversion unit is connected to the first pin of the fourth capacitor and the output end of the boost sub-circuit respectively, and the second pin of the fourth capacitor is grounded;

[0031] A ground pin of the voltage conversion unit is grounded.

[0032] In a second aspect, an embodiment of the present invention provides a USB cable, the cable comprising an input interface, an output interface, and at least one USB extension device as described in any one of the first aspects above;

[0033] Where the cable comprises a USB extension device,

[0034] The USB input port of the USB extension device is connected to the input interface via the wire of the cable, and the USB output port of the USB extension device is connected to the output interface via the wire of the cable;

[0035] In the case where the cable includes multiple USB extension devices,

[0036] The USB extension devices are connected via the conductors of the cable;

[0037] The USB input port of the USB extension device is connected to the input interface via the wire of the cable, or the USB input port of the USB extension device is connected to the USB output port of the upper-level USB extension device;

[0038] The USB output port of the USB extension device is connected to the output interface via the conductor of the cable, or the USB output port of the USB extension device is connected to the USB input port of the next-level USB extension device.

[0039] In a third aspect, an embodiment of the present invention provides a USB extension system, the system comprising a USB host device, a USB controlled device, and at least one USB extension device as described in any one of the first aspects above;

[0040] Where the system includes a USB extension device,

[0041] The USB input port of the USB extension device is connected to the USB host device through the wire of the system, and the USB output port of the USB extension device is connected to the USB controlled device through the wire of the system;

[0042] In the case where the system includes multiple USB extension devices,

[0043] The USB extension devices are connected via the wires of the system;

[0044] The USB input port of the USB extension device is connected to the USB host device, or the USB input port of the USB extension device is connected to the USB output port of the upper-level USB extension device;

[0045] The USB output port of the USB extension device is connected to the USB controlled device, or the USB output port of the USB extension device is connected to the USB input port of the next-level USB extension device.

[0046] The present invention provides a USB extension device, a USB cable, and a USB extension system. The USB extension device includes a USB input port, a USB output port, a data signal optimization circuit, and a power optimization circuit. A first data signal pin of the data signal optimization circuit is connected to a data signal pin of the USB input port, a second data signal pin of the data signal optimization circuit is connected to a data signal pin of the USB output port, a power input end of the power optimization circuit is connected to a power pin of the USB input port, and a power output end of the power optimization circuit is connected to a power pin of the USB output port. The data signal is optimized by the data signal optimization circuit, and the USB power signal is optimized by the power optimization circuit before being sent out. In other words, the attenuated data signal is optimized before being transmitted, and the attenuated USB power signal is optimized before being transmitted. This extends USB signal transmission, supports long-distance USB signal transmission, and improves the flexibility of USB signal transmission. Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0048] Figure 1 A schematic diagram of the first structure of the USB extension device provided by an embodiment of the present utility model;

[0049] Figure 2 A schematic diagram of the second structure of the USB extension device provided by an embodiment of the present utility model;

[0050] Figure 3 A schematic diagram of a third structure of a USB extension device provided by an embodiment of the present utility model;

[0051] Figure 4 A fourth structural diagram of a USB extension device provided by an embodiment of the present utility model;

[0052] Figure 5 A fifth structural diagram of the USB extension device provided by an embodiment of the present utility model;

[0053] Figure 6 A sixth structural diagram of a USB extension device provided by an embodiment of the present utility model;

[0054] Figure 7a A seventh structural diagram of a USB extension device provided by an embodiment of the present utility model;

[0055] Figure 7b A schematic structural diagram of a voltage boost subcircuit of a USB extension device provided by an embodiment of the present utility model;

[0056] Figure 7c A schematic diagram of transmitting USB 2.0 signals using the USB extension device provided by an embodiment of the present invention;

[0057] Figure 8 A schematic diagram of the first structure of a USB cable provided by an embodiment of the present utility model;

[0058] Figure 9 A schematic diagram of the second structure of a USB cable provided by an embodiment of the present utility model;

[0059] Figure 10 A schematic diagram of the first structure of the USB extension system provided by an embodiment of the present utility model;

[0060] Figure 11 A second structural diagram of the USB extension system provided by an embodiment of the present utility model;

[0061] Figure 12 A third structural diagram of the USB extension system provided by an embodiment of the present utility model;

[0062] Figure 13 This is a schematic diagram of the fourth structure of the USB extension system provided by an embodiment of the present utility model. DETAILED DESCRIPTION

[0063] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field based on this application are within the scope of protection of the present invention.

[0064] First, the professional terms that may be used in the embodiments of the present invention are explained:

[0065] USB (Universal Serial Bus): refers to data transmission and communication methods using universal serial bus technology. USB is an external bus standard used to regulate the connection and communication between computers and peripheral devices. It features fast transmission speeds, ease of use, hot-swappable support, flexible connections, and independent power supply.

[0066] USB2.0: It is the second generation standard of USB. USB 2.0 is a bus transmission protocol that adopts a one-master-multiple-slave structure, that is, one host can connect to multiple devices.

[0067] USB 3.2: A high-speed data transfer standard and the latest version of the USB specification. It is an incremental update based on USB 3.0 / 3.1, defining multi-channel operation to improve data transfer speed and efficiency.

[0068] Signal equalization: This refers to the process of conditioning and improving signals during transmission, either at the transmitter, during the transmission link, or before signal decision-making at the receiver. This reduces signal distortion and improves the receiver's ability to accurately interpret the signal. Equalization aims to create characteristics at the receiver that are opposite to those of the channel, thereby offsetting intersymbol interference caused by the channel's time-varying multipath propagation characteristics and ensuring signal integrity and accuracy.

[0069] Clock recovery is the process of retrieving the clock component from the received signal in a digital communication system. This process enables the receiver to extract the clock signal from the received signal, thereby maintaining synchronization with the transmitter and correctly sending and receiving data.

[0070] Signal drive enhancement: refers to enhancing the signal driving capability through technical means to improve the efficiency, quality and stability of signal transmission.

[0071] TX (Transmit) signal and RX (Receive) signal: In USB communication, TX stands for transmit signal and RX stands for receive signal.

[0072] USB TYPE-A interface: It is a common USB interface type, widely used in various electronic devices, and it usually has a rectangular shape.

[0073] MICRO USB interface: It is a portable version of the USB 2.0 standard and has a trapezoidal shape.

[0074] USB TYPE-C interface: It is a USB interface standard that has a smaller size than TYPE-A and TYPE-B.

[0075] Current USB signal transmission cables are usually short while ensuring USB signal transmission speed and minimal USB signal attenuation. For example, USB3.2 can only transmit USB signals over a distance of approximately 3 meters and does not support USB signal transmission between long-distance master and controlled devices, affecting the flexibility of USB signal transmission.

[0076] In order to solve the above problems, the embodiments of the present invention provide a USB extension device, a USB cable, and a USB extension system. The USB extension device provided by the embodiments of the present invention is described in detail below.

[0077] See also Figure 1 , is a schematic diagram of a first structure of a USB extension device 1 provided in an embodiment of the present invention, the USB extension device 1 comprises:

[0078] USB input port 11, USB output port 12, data signal optimization circuit 13, power optimization circuit 14;

[0079] The first data signal pin of the data signal optimization circuit 13 is connected to the data signal pin of the USB input port 11, and the data signal pin of the USB input port 11 is used to transmit the TX signal USB_TX1 of the USB master and the RX signal USB_RX1 of the USB slave;

[0080] The second data signal pin of the data signal optimization circuit 13 is connected to the data signal pin of the USB output port 12, and the data signal pin of the USB output port 12 is used to transmit the RX signal USB_RX2 of the USB master and the TX signal USB_TX2 of the USB slave;

[0081] The power input end of the power optimization circuit 14 is connected to the power pin VBUS1 of the USB input port 11, and the power pin of the USB input port 11 is used to transmit the USB power signal USB_VBUS1;

[0082] The power output end of the power optimization circuit 14 is connected to the power pin VBUS2 of the USB output port 12 , and the power pin of the USB output port 12 is used to transmit the USB power signal USB_VBUS2 .

[0083] The USB input port 11 may be a USB TYPE C interface. In one example, the USB input port 11 may support USB 3.2. In another example, the USB input port 11 may support USB 3.0.

[0084] The USB output port 12 may be a USB TYPE C interface, etc. In one example, the USB output port 12 may support USB 3.2. In another example, the USB output port 12 may support USB 3.0.

[0085] The data signal optimization circuit 13 may be an EQCO5X31 circuit with functions such as signal equalization, clock recovery, and signal drive enhancement. It is used to receive and optimize attenuated data signals before transmitting them to subsequent circuits. The first and second data signal pins are used to transmit data signals within the data signal optimization circuit 13.

[0086] When a USB power signal is transmitted through a USB cable, a voltage drop typically occurs on the cable, causing the voltage of the USB power signal to decay. This decay is more severe over long cables, potentially leading to power supply anomalies. The power optimization circuit 14 may include functional modules such as filtering, voltage stabilization, and power signal boosting (boosting). It is configured to receive the attenuated USB power signal, optimize it, and then transmit it to subsequent circuits.

[0087] For the USB input port 11, it can include a data signal sending pin TX1 and a data signal receiving pin RX1. The data signal sending pin TX1 is used to transmit the TX signal USB_TX1 of the USB host. The TX signal USB_TX1 of the USB host refers to the data signal transmitted by the TX1 pin and sent from the USB host to the USB slave. The data signal receiving pin RX1 is used to transmit the RX signal USB_RX1 of the USB slave. The RX signal USB_RX1 of the USB slave refers to the data signal transmitted by the RX1 pin and sent from the USB slave to the USB host.

[0088] For the USB output port 12, it can include a data signal sending pin TX2 and a data signal receiving pin RX2. The data signal sending pin TX2 is used to transmit the TX signal USB_TX2 of the USB controlled device. The TX signal USB_TX2 of the USB controlled device refers to the data signal transmitted by the TX2 pin and sent from the USB controlled device to the USB host. The data signal receiving pin RX2 is used to transmit the RX signal USB_RX2 of the USB host. The RX signal USB_RX2 of the USB host refers to the data signal transmitted by the RX2 pin and sent from the USB host to the USB controlled device.

[0089] In the embodiment of the present utility model, the data signal transmitted between the USB master and the USB slave is optimized by the data signal optimization circuit 13, and the USB power signal is optimized and then sent out via the power optimization circuit 14. That is to say, the attenuated data signal is optimized before being transmitted, and the attenuated USB power signal is optimized before being transmitted, thereby extending the USB signal transmission, supporting long-distance USB signal transmission, and improving the flexibility of USB signal transmission.

[0090] In one possible implementation, see Figure 2 , the first data signal pin includes a first data signal sending pin AO and a first data signal receiving pin BI, the second data signal pin includes a second data signal sending pin BO and a second data signal receiving pin AI, and the data signal pin includes a data signal sending pin and a data signal receiving pin;

[0091] The first data signal receiving pin BI of the data signal optimization circuit 13 is connected to the data signal sending pin TX1 of the USB input port 11, and the data signal sending pin TX1 of the USB input port 11 is used to transmit the TX signal USB_TX1 of the USB host;

[0092] The second data signal sending pin BO of the data signal optimization circuit 13 is connected to the data signal receiving pin RX2 of the USB output port 12, and the data signal receiving pin RX2 of the USB output port 12 is used to transmit the RX signal USB_RX2 of the USB host;

[0093] The second data signal receiving pin AI of the data signal optimization circuit 13 is connected to the data signal sending pin TX2 of the USB output port 12, and the data signal sending pin TX2 of the USB output port 12 is used to transmit the USB controlled TX signal USB_TX2;

[0094] The first data signal sending pin AO of the data signal optimization circuit 13 is connected to the data signal receiving pin RX1 of the USB input port 11 . The data signal receiving pin RX1 of the USB input port 11 is used to transmit the USB controlled RX signal USB_RX1 .

[0095] When the USB input port 11 receives a data signal from the USB host, it sends the data signal (USB_TX1) to the first data signal receiving pin BI of the data signal optimization circuit 13 through its own data signal sending pin TX1. After the data signal (USB_TX1) is optimized by the data signal optimization circuit 13, the optimized data signal (USB_RX2) is sent to the data signal receiving pin RX2 of the USB output port 12 through the second data signal sending pin BO of the data signal optimization circuit 13. The data signal receiving pin RX2 of the USB output port 12 is used to receive the optimized data signal (USB_RX2) and send the optimized data signal (USB_RX2) to the USB controlled device.

[0096] After the USB slave receives the data signal from the USB host, it will also return (send) the data signal to the USB host. When the USB output port 12 receives the data signal returned from the USB slave, it sends the data signal (USB_TX2) from the USB slave to the second data signal receiving pin AI of the data signal optimization circuit 13 through its own data signal sending pin TX2. After the data signal (USB_TX2) is optimized by the data signal optimization circuit 13, the optimized data signal (USB_RX1) is sent to the data signal receiving pin RX1 of the USB input port 11 through the first data signal sending pin AO of the data signal optimization circuit 13. The data signal receiving pin RX1 of the USB input port 11 is used to receive the optimized data signal (USB_RX1) and send the optimized data signal (USB_RX1) to the USB host.

[0097] In an embodiment of the present utility model, the data signal sent by the USB master to the USB slave is optimized by the data signal optimization circuit 13, and the data signal sent by the USB slave to the USB master is optimized by the data signal optimization circuit 13. That is to say, the attenuated data signal is optimized before being transmitted, thereby achieving the extension of USB data signal transmission.

[0098] In one possible implementation, see Figure 3 The data signal optimization circuit 13 includes a first signal equalization subcircuit 131, a first clock recovery subcircuit 132, a first signal drive enhancement subcircuit 133, a second signal equalization subcircuit 134, a second clock recovery subcircuit 135, and a second signal drive enhancement subcircuit 136;

[0099] The input end of the first signal equalization sub-circuit 131 is connected to the data signal transmission pin TX1 of the USB input port 11, the output end of the first signal equalization sub-circuit 131 is connected to the input end of the first clock recovery sub-circuit 132, the output end of the first clock recovery sub-circuit 132 is connected to the input end of the first signal drive enhancement sub-circuit 133, and the output end of the first signal drive enhancement sub-circuit 133 is connected to the data signal receiving pin RX2 of the USB output port 12;

[0100] The input end of the second signal equalization sub-circuit 134 is connected to the data signal sending pin TX2 of the USB output port 12, the output end of the second signal equalization sub-circuit 134 is connected to the input end of the second clock recovery sub-circuit 135, the output end of the second clock recovery sub-circuit 135 is connected to the input end of the second signal drive enhancement sub-circuit 136, and the output end of the second signal drive enhancement sub-circuit 136 is connected to the data signal receiving pin RX1 of the USB input port 11.

[0101] In an embodiment of the present utility model, the data signal sent by the USB master to the USB slave is optimized and processed by the first signal equalization subcircuit 131, the first clock recovery subcircuit 132, and the first signal drive enhancement subcircuit 133, and the data signal sent by the USB slave to the USB master is optimized and processed by the second signal equalization subcircuit 134, the second clock recovery subcircuit 135, and the second signal drive enhancement subcircuit 136, thereby achieving the extension of USB data signal transmission.

[0102] In one possible implementation, see Figure 4 , the power optimization circuit 14 includes a first voltage stabilizing sub-circuit 141, a voltage boosting sub-circuit 142, and a second voltage stabilizing sub-circuit 143;

[0103] The input end of the boost sub-circuit 142 is connected to the power pin VBUS1 of the USB input port 11 and the first voltage stabilizing sub-circuit 141 respectively;

[0104] The output end of the voltage boost sub-circuit 142 is connected to the power pin VBUS2 of the USB output port 12 and the second voltage stabilization sub-circuit 143 respectively.

[0105] The power signal input to the power pin VBUS1 of the USB input port 11 (the power signal transmitted from the USB host to the USB slave) is an unstable, attenuated low voltage. It is first filtered and stabilized by the first voltage stabilization sub-circuit 141, and then the stabilized low voltage is transmitted to the boost sub-circuit 142 for voltage raising. The boosted voltage output by the boost sub-circuit 142 is relatively stable, but considering the power extraction capacity of the USB post-load, a second voltage stabilization sub-circuit 143 is set to filter and stabilize the voltage output by the boost sub-circuit 142, and transmit the stable, raised voltage to the power pin VBUS2 of the USB output port 12.

[0106] In an embodiment of the present utility model, the power signal transmitted by the USB host is filtered, stabilized, and voltage-raised through the first voltage stabilizing sub-circuit 141, the boosting sub-circuit 142, and the second voltage stabilizing sub-circuit 143, and the stable, raised voltage is finally transmitted to the USB slave, thereby reducing problems such as power supply anomalies of the USB slave.

[0107] In one possible implementation, see Figure 5 , the power optimization circuit 14 further includes a linear voltage stabilization subcircuit (linear voltage regulator) 144;

[0108] The input end of the linear voltage stabilization sub-circuit 144 is connected to the output end of the boost sub-circuit 142 , and the output end of the linear voltage stabilization sub-circuit 144 is connected to the power pin VCC of the data signal optimization circuit 13 .

[0109] The function of the linear voltage stabilization sub-circuit 144 is to convert the relatively high voltage inputted thereto (the voltage outputted by the boost sub-circuit 142 ) into a stable relatively low voltage to supply power to the data signal optimization circuit 13 .

[0110] In order to reduce power consumption, a DCDC converter (DC-DC converter) may be provided to pass the voltage output by the boost sub-circuit 142 through the DCDC converter and then through the linear voltage regulator sub-circuit 144 to power the data signal optimization circuit 13 .

[0111] In the embodiment of the present invention, a stable voltage is generated by the linear voltage stabilization sub-circuit 144 to power the data signal optimization circuit 13 , and the data signal optimization circuit 13 does not need additional power supply.

[0112] In one possible implementation, see Figure 6 , the device 1 further includes a first filtering sub-circuit 15, a second filtering sub-circuit 16, a first electrostatic protection sub-circuit 17, and a second electrostatic protection sub-circuit 18;

[0113] A first end of the first filtering subcircuit 15 is connected to the data signal pin of the USB input port 11 , and a second end of the first filtering subcircuit 15 is connected to the first data signal pin of the data signal optimization circuit 13 and the first electrostatic protection subcircuit 17 , respectively;

[0114] The first end of the second filtering subcircuit 16 is connected to the data signal pin of the USB output port 12 , and the second end of the second filtering subcircuit 16 is connected to the second data signal pin of the data signal optimization circuit 13 and the second electrostatic protection subcircuit 18 .

[0115] The first filtering sub-circuit 15 may be a common-mode inductor, which plays the role of EMI (Electromagnetic Interference) filtering and is used to suppress the outward radiation of electromagnetic waves generated by the high-speed signal line.

[0116] The second filtering sub-circuit 16 may be a common-mode inductor, which functions as an EMI filter to suppress the outward radiation of electromagnetic waves generated by the high-speed signal line.

[0117] The first electrostatic protection sub-circuit 17 may be a TVS (Transient Voltage Suppressor) for electrostatic protection.

[0118] The second electrostatic protection sub-circuit 18 may be a TVS for electrostatic protection.

[0119] In the embodiment of the present utility model, signal protection for USB data signals is achieved by providing the first filtering sub-circuit 15 , the second filtering sub-circuit 16 , the first electrostatic protection sub-circuit 17 , and the second electrostatic protection sub-circuit 18 .

[0120] In one possible implementation, see Figure 7a , the first voltage stabilizing sub-circuit 141 includes a first capacitor C1;

[0121] A first pin of the first capacitor C1 is connected to the power pin VBUS1 of the USB input port 11 and the input end of the boost sub-circuit 142 , respectively. A second pin of the first capacitor C1 is grounded GND.

[0122] The first capacitor C1 is a filter capacitor, which is mainly used to filter out some noise. The capacitance value of the first capacitor C1 can be set according to actual conditions.

[0123] In one possible implementation, see Figure 7a , the second voltage stabilizing sub-circuit 143 includes a second capacitor C2;

[0124] A first pin of the second capacitor C2 is connected to the power pin VBUS2 of the USB output port and the output end of the boost sub-circuit 142 , respectively. A second pin of the second capacitor C2 is grounded GND.

[0125] The second capacitor C2 is a filter capacitor, which is mainly used to filter out some noise. The capacitance value of the second capacitor C2 can be set according to actual conditions.

[0126] In one possible implementation, see Figure 7b , the boost sub-circuit 142 includes a voltage conversion unit U, a third capacitor C3, and a fourth capacitor C4;

[0127] The input pin IN of the voltage conversion unit U is connected to the first pin of the third capacitor C3 and the input end of the boost sub-circuit 142 respectively, and the second pin of the third capacitor C3 is grounded GND;

[0128] The output pin OUT of the voltage conversion unit U is connected to the first pin of the fourth capacitor C4 and the output end of the boost sub-circuit 142 respectively, and the second pin of the fourth capacitor C4 is grounded GND;

[0129] A ground pin GND of the voltage conversion unit U is connected to the ground GND.

[0130] In one example, the voltage conversion unit U may be a buck-boost circuit (boost / step-down circuit).

[0131] In one example, the voltage conversion unit U may be a boost circuit.

[0132] For each capacitor included in the boost sub-circuit 142 , their capacitance values ​​can be set according to the actual situation of the circuit.

[0133] In one example, the power signal input to the power pin VBUS1 of the USB input port 11 (the power signal transmitted from the USB host to the USB slave) is an unstable, attenuated low voltage, such as 4.5V (the power signal output by the USB host is 5V). This signal is first filtered and stabilized by the first voltage stabilization sub-circuit 141. The stabilized low voltage is then transmitted to the boost sub-circuit 142 for voltage boosting (boost sub-circuit 142 can support voltage inputs ranging from 2.5V to 5.5V) to 5.2V. The 5.2V output by the boost sub-circuit 142 is relatively stable. However, considering the power draw capability of the USB downstream load, a second voltage stabilization sub-circuit 143 is provided to filter and stabilize the 5.2V output by the boost sub-circuit 142, transmitting the stable 5.2V to the power pin VBUS2 of the USB output port 12. In one example, the output of the linear voltage stabilization sub-circuit 144 can output 1.2V to power the data signal optimization circuit 13.

[0134] In one possible implementation, see Figure 7c The USB extension device 1 can support USB 2.0 signal transmission. The USB input port 11 can be a USB TYPE A interface, a MICRO USB interface, or a USB TYPE C interface. The USB output port 12 can be a USB TYPE A interface, a MICRO USB interface, or a USB TYPE C interface. DM stands for Data Minus, i.e., the negative data signal line; DP stands for Data Plus, i.e., the positive data signal line. In USB communication, data is transmitted in the form of a differential signal, which means that data is represented by the voltage difference between the two lines. The DM line and the DP line work together to form a complete signal. The USB 2.0 DM and USB 2.0 DP lines are not processed in any way and are connected between the USB 3.0 input port 11 and the USB 3.0 output port 12.

[0135] The embodiment of the present utility model further provides a USB cable 2, the cable 2 comprising an input interface 21, an output interface 22 and at least one USB extension device 1 as described in any one of the above embodiments;

[0136] In the case where the cable 2 comprises a USB extension device 1, see Figure 8 ,

[0137] The USB input port 11 of the USB extension device 1 is connected to the input interface 21 via the wire of the cable 2, and the USB output port 12 of the USB extension device 1 is connected to the output interface 22 via the wire of the cable 2;

[0138] In the case where the cable 2 includes multiple USB extension devices, see Figure 9 ,

[0139] The USB extension devices 1 are connected via the conductors of the cable 2;

[0140] The USB input port 11 of the USB extension device 1 is connected to the input interface 21 via the wire of the cable 2, or the USB input port 11 of the USB extension device is connected to the USB output port 12 of the upper-level USB extension device 1;

[0141] The USB output port 12 of the USB extension device 1 is connected to the output interface 22 via the wire of the cable 2 , or the USB output port 12 of the USB extension device 1 is connected to the USB input port 11 of the next-level USB extension device 1 .

[0142] Since the data signal optimization circuit 13 and the power optimization circuit 14 are very small and have low power consumption, the volume of the USB extension device 1 can be made very small. Therefore, the USB extension device 1 can be integrated into the USB cable when designing the USB cable.

[0143] It is understandable that Figure 9 In the figure, cable 2 includes two USB extension devices for illustration.

[0144] It can be understood that the conductors of the cable 2 include a transmitting data signal line, a receiving data signal line, and a power signal line.

[0145] In the embodiment of the present invention, by integrating the USB extension device 1 into the USB cable 2, signal transmission of a long USB cable is achieved, USB signal transmission is extended, and the transmission speed of the USB signal is guaranteed, and the USB signal attenuation is small.

[0146] The present invention also provides a USB extension system 3, which includes a USB host device 31, a USB controlled device 32, and at least one USB extension device 1 as described in any one of the above embodiments.

[0147] In the case where the system 3 includes a USB extension device 1,

[0148] The USB input port 11 of the USB extension device 1 is connected to the USB host device 31 through the wire of the system 3, and the USB output port 12 of the USB extension device 1 is connected to the USB controlled device 32 through the wire of the system 3;

[0149] In the case where the system 3 includes multiple USB extension devices 1,

[0150] The USB extension devices 1 are connected to each other via the wires of the system 3;

[0151] The USB input port 11 of the USB extension device 1 is connected to the USB host device 31, or the USB input port 11 of the USB extension device 1 is connected to the USB output port 12 of the upper-level USB extension device 1;

[0152] The USB output port 12 of the USB extension device 1 is connected to the USB controlled device 32 , or the USB output port 12 of the USB extension device 1 is connected to the USB input port 11 of the next-level USB extension device 1 .

[0153] It can be understood that the conductors of the cable 2 include a transmitting data signal line, a receiving data signal line, and a power signal line.

[0154] In the embodiment of the present invention, by providing the USB extension device 1 between the main control device 31 and the controlled device 32, the USB signal transmission is extended, and the transmission speed of the USB signal and the USB signal attenuation are guaranteed to be small.

[0155] In one possible implementation, see Figure 10 , in the case where the system 3 includes a USB extension device 1,

[0156] The USB input port 11 of the USB extension device 1 is connected to the USB host device 31 through a cable of the system 3 , and the USB output port 12 of the USB extension device 1 is connected to the USB controlled device 32 through a cable of the system 3 .

[0157] In one example, compared to the related art USB 3.2 which can only transmit USB signals for about 3 meters, the embodiments of the present invention can extend the signal transmission to about 6 meters.

[0158] In one possible implementation, see Figure 11 , in the case where the system 3 includes two USB extension devices 1, the two USB extension devices 1 are connected via the cable of the system 3;

[0159] The USB input port 11 of the first USB extension device 1 is connected to the interface of the USB host device 31, and the USB output port 12 of the first USB extension device 1 is connected to the USB input port 11 of the second USB extension device 1 via a cable;

[0160] The USB output port 12 of the second USB extension device 1 is connected to the interface of the USB controlled device 32 .

[0161] In one example, the signal transmission can be extended to about 16 m by using the embodiments of the present invention.

[0162] In one possible implementation, see Figure 12 , in the case where the system 3 includes two USB extension devices 1, the two USB extension devices 1 are connected via the cable of the system 3;

[0163] The USB input port 11 of the first USB extension device 1 is connected to the interface of the USB host device 31 via a cable, and the USB output port 12 of the first USB extension device 1 is connected to the USB input port 11 of the second USB extension device 1 via a cable;

[0164] The USB output port 12 of the second USB extension device 1 is connected to the interface of the USB controlled device 32 via a cable.

[0165] In one example, the signal transmission can be extended to about 21 m by using the embodiments of the present invention.

[0166] In one possible implementation, see Figure 13 , when the system 3 includes three USB extension devices 1, the three USB extension devices 1 are connected via the cables of the system 3;

[0167] The USB input port 11 of the first USB extension device 1 is connected to the interface of the USB host device 31, and the USB output port 12 of the first USB extension device 1 is connected to the USB input port 11 of the second USB extension device 1 via a cable;

[0168] The USB output port 12 of the second USB extension device 1 is connected to the USB input port 11 of the third USB extension device 1 through a cable. The USB output port 12 of the third USB extension device 1 is connected to the interface of the USB controlled device 32 .

[0169] In one example, the signal transmission can be extended to about 32 m by using the embodiments of the present invention.

[0170] In a possible implementation, in order to fix the cable, screw fixing holes, cable fixing devices, etc. can be designed on the outside of the USB extension device 1 to prevent the USB port from loosening in a device vibration environment.

[0171] The above description is only a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention are included in the scope of protection of the present invention.

Claims

1. A USB extension device, characterized in that: The device comprises: USB input port, USB output port, data signal optimization circuit, power optimization circuit; The first data signal pin of the data signal optimization circuit is connected to the data signal pin of the USB input port, the second data signal pin of the data signal optimization circuit is connected to the data signal pin of the USB output port, the power input end of the power optimization circuit is connected to the power pin of the USB input port, and the power output end of the power optimization circuit is connected to the power pin of the USB output port.

2. The device according to claim 1, characterized in that The first data signal pin includes a first data signal sending pin and a first data signal receiving pin, the second data signal pin includes a second data signal sending pin and a second data signal receiving pin, and the data signal pin includes a data signal sending pin and a data signal receiving pin; The first data signal receiving pin of the data signal optimization circuit is connected to the data signal sending pin of the USB input port, and the data signal sending pin of the USB input port is used to transmit the TX signal of the USB host; The second data signal sending pin of the data signal optimization circuit is connected to the data signal receiving pin of the USB output port, and the data signal receiving pin of the USB output port is used to transmit the RX signal of the USB host; The second data signal receiving pin of the data signal optimization circuit is connected to the data signal sending pin of the USB output port, and the data signal sending pin of the USB output port is used to transmit the TX signal of the USB controlled device; The first data signal sending pin of the data signal optimization circuit is connected to the data signal receiving pin of the USB input port, and the data signal receiving pin of the USB input port is used to transmit the RX signal of the USB controlled device.

3. The device according to claim 2, characterized in that The data signal optimization circuit includes a first signal equalization subcircuit, a first clock recovery subcircuit, a first signal drive enhancement subcircuit, a second signal equalization subcircuit, a second clock recovery subcircuit, and a second signal drive enhancement subcircuit; The input end of the first signal equalization subcircuit is connected to the data signal transmission pin of the USB input port, the output end of the first signal equalization subcircuit is connected to the input end of the first clock recovery subcircuit, the output end of the first clock recovery subcircuit is connected to the input end of the first signal drive enhancement subcircuit, and the output end of the first signal drive enhancement subcircuit is connected to the data signal receiving pin of the USB output port; The input end of the second signal equalization sub-circuit is connected to the data signal sending pin of the USB output port, the output end of the second signal equalization sub-circuit is connected to the input end of the second clock recovery sub-circuit, the output end of the second clock recovery sub-circuit is connected to the input end of the second signal drive enhancement sub-circuit, and the output end of the second signal drive enhancement sub-circuit is connected to the data signal receiving pin of the USB input port.

4. The device according to claim 1, characterized in that The power optimization circuit includes a first voltage stabilization subcircuit, a voltage boost subcircuit, and a second voltage stabilization subcircuit; The input end of the boost sub-circuit is connected to the power pin of the USB input port and the first voltage stabilizing sub-circuit respectively; The output end of the voltage boost sub-circuit is connected to the power pin of the USB output port and the second voltage stabilization sub-circuit respectively.

5. The device according to claim 4, characterized in that The power optimization circuit further includes a linear voltage stabilization subcircuit; The input end of the linear voltage stabilization sub-circuit is connected to the output end of the boost sub-circuit, and the output end of the linear voltage stabilization sub-circuit is connected to the power pin of the data signal optimization circuit.

6. The device according to claim 1, characterized in that The device further includes a first filtering subcircuit, a second filtering subcircuit, a first electrostatic protection subcircuit, and a second electrostatic protection subcircuit; A first end of the first filtering subcircuit is connected to a data signal pin of the USB input port, and a second end of the first filtering subcircuit is connected to a first data signal pin of the data signal optimization circuit and the first electrostatic protection subcircuit respectively; The first end of the second filtering subcircuit is connected to the data signal pin of the USB output port, and the second end of the second filtering subcircuit is respectively connected to the second data signal pin of the data signal optimization circuit and the second electrostatic protection subcircuit.

7. The device according to claim 4, characterized in that The first voltage stabilization subcircuit includes a first capacitor; The first pin of the first capacitor is connected to the power pin of the USB input port and the input end of the boost sub-circuit respectively, and the second pin of the first capacitor is grounded.

8. The device according to claim 7, characterized in that The second voltage stabilization subcircuit includes a second capacitor; The first pin of the second capacitor is connected to the power pin of the USB output port and the output end of the boost sub-circuit respectively, and the second pin of the second capacitor is grounded.

9. The device according to claim 8, characterized in that The boost subcircuit includes a voltage conversion unit, a third capacitor, and a fourth capacitor; The input pin of the voltage conversion unit is connected to the first pin of the third capacitor and the input end of the boost sub-circuit respectively, and the second pin of the third capacitor is grounded; The output pin of the voltage conversion unit is connected to the first pin of the fourth capacitor and the output end of the boost sub-circuit respectively, and the second pin of the fourth capacitor is grounded; A ground pin of the voltage conversion unit is grounded.

10. A USB cable, characterized in that: The cable comprises an input interface, an output interface and at least one USB extension device as described in any one of claims 1 to 9 above; Where the cable comprises a USB extension device, The USB input port of the USB extension device is connected to the input interface via the wire of the cable, and the USB output port of the USB extension device is connected to the output interface via the wire of the cable; In the case where the cable includes multiple USB extension devices, The USB extension devices are connected via the conductors of the cable; The USB input port of the USB extension device is connected to the input interface via the wire of the cable, or the USB input port of the USB extension device is connected to the USB output port of the upper-level USB extension device; The USB output port of the USB extension device is connected to the output interface via the conductor of the cable, or the USB output port of the USB extension device is connected to the USB input port of the next-level USB extension device.

11. A USB extension system, characterized in that: The system comprises a USB host device, a USB controlled device and at least one USB extension device as described in any one of claims 1 to 9 above; Where the system includes a USB extension device, The USB input port of the USB extension device is connected to the USB host device through the wire of the system, and the USB output port of the USB extension device is connected to the USB controlled device through the wire of the system; In the case where the system includes multiple USB extension devices, The USB extension devices are connected via the wires of the system; The USB input port of the USB extension device is connected to the USB host device, or the USB input port of the USB extension device is connected to the USB output port of the upper-level USB extension device; The USB output port of the USB extension device is connected to the USB controlled device, or the USB output port of the USB extension device is connected to the USB input port of the next-level USB extension device.

Images