Module packaging structure and electronic equipment
By setting up a heat dissipation channel inside the lead frame and using the flow of coolant to remove the heat from the chip, the problem of large parasitic thermal resistance caused by the long heat dissipation path is solved, and the performance of the module packaging structure is improved.
Patent Information
- Application Number
- CN202422867102.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-22
- Publication Date
- 2025-10-10
- Estimated Expiration
- 2034-11-22
AI Technical Summary
The existing semiconductor module packaging has a long heat dissipation path, resulting in large parasitic thermal resistance, which affects the performance of the module packaging structure.
A heat dissipation channel is set inside the lead frame, and the coolant flows through the heat dissipation channel to take away the heat emitted by the chip, shorten the heat dissipation path, and reduce parasitic thermal resistance.
It effectively reduces the parasitic thermal resistance of the module package, improves the performance of the module package structure, and increases the packaging density to achieve high power density.
Smart Images
Figure CN223427495U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductors, and in particular to a module packaging structure and electronic equipment. Background Art
[0002] Existing semiconductor module packaging typically uses a direct bonded copper (DBC) ceramic substrate as the chip carrier (lead frame), and is completed through traditional processes such as die bonding, wire bonding, and injection molding. The DBC ceramic substrate's side, which lacks die bonding, is exposed to the outside and connected to an external heat sink as the primary heat dissipation channel. However, this method results in a long heat dissipation path, resulting in a high parasitic thermal resistance within the module package, impacting the performance of the module package structure. Utility Model Content
[0003] The utility model provides a module packaging structure and an electronic device to solve the problem that the heat dissipation path in the current module packaging is long, thereby causing large parasitic thermal resistance.
[0004] In a first aspect, the present invention provides a module packaging structure, the module packaging structure comprising: a plurality of chips and a lead frame;
[0005] The chip is set on the lead frame; a heat dissipation channel is set inside the lead frame, and the heat dissipation channel includes an inlet and an outlet; the inlet of the heat dissipation channel is used for the flow of coolant, the heat dissipation channel is used to provide a flow space for the coolant, and the outlet of the heat dissipation channel is used for the flow out of the coolant.
[0006] Optionally, the lead frame includes a ceramic layer, a first copper layer, and a second copper layer;
[0007] The first copper layer and the second copper layer are respectively arranged on the first and second opposite surfaces of the ceramic layer; the chip is arranged on a side of the first copper layer away from the ceramic layer, and the chip is also arranged on a side of the second copper layer away from the ceramic layer.
[0008] Optionally, the lead frame includes a ceramic layer, and the ceramic layer includes a first surface and a second surface disposed opposite to each other;
[0009] A heat dissipation channel is provided in the ceramic layer, and a vertical projection of the heat dissipation channel on the first surface of the ceramic layer covers the vertical projections of all chips on the first surface of the ceramic layer.
[0010] Optionally, the diameter of the heat dissipation channel is smaller than the thickness of the ceramic layer.
[0011] Optionally, the cooling fluid comprises cooling water.
[0012] Optionally, the first copper layer includes a first pattern, and the second copper layer includes a second pattern; the chip disposed on a side of the first copper layer away from the ceramic layer is connected to the first copper layer via wire bonding; the chip disposed on a side of the second copper layer away from the ceramic layer is connected to the second copper layer via wire bonding;
[0013] The ceramic layer further includes a through hole, in which a conductive structure is arranged. The conductive structure is used to realize the interconnection between the first copper layer and the second copper layer.
[0014] Optionally, the conductive structure comprises a copper pillar.
[0015] Optionally, the module packaging structure further includes: a plastic package;
[0016] The plastic package is arranged on a side of the first copper layer away from the ceramic layer, and a vertical projection of the plastic package on the first surface of the ceramic layer covers vertical projections of all chips arranged on the side of the first copper layer away from the ceramic layer on the first surface of the ceramic layer;
[0017] The plastic package is also arranged on the side of the second copper layer away from the ceramic layer, and the vertical projection of the plastic package on the second surface of the ceramic layer covers the vertical projections of all chips arranged on the side of the second copper layer away from the ceramic layer on the second surface of the ceramic layer.
[0018] Optionally, the chip is welded on the lead frame; or, the chip is pasted on the lead frame.
[0019] In a second aspect, the present invention provides an electronic device, wherein the electronic device includes the module packaging structure provided in the first aspect.
[0020] The technical solution of this embodiment of the utility model is to provide a heat dissipation channel within the lead frame. Coolant flows into the heat dissipation channel through the heat dissipation channel inlet. The coolant flows within the heat dissipation channel, removing heat emitted by the chip. Finally, the coolant flows out through the outlet, achieving heat dissipation of the module packaging structure. The technical solution of this utility model directly implements liquid cooling within the module packaging structure, effectively shortening the heat dissipation path, greatly reducing the parasitic thermal resistance of the module package, and effectively improving the performance of the module packaging structure.
[0021] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0023] Figure 1 This is a cross-sectional schematic diagram of a module packaging structure provided by an embodiment of the present utility model;
[0024] Figure 2 This is a top view of a module packaging structure provided by an embodiment of the present utility model. DETAILED DESCRIPTION
[0025] In order to help those skilled in the art better understand the present invention, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.
[0026] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0027] Figure 1 This is a cross-sectional schematic diagram of a module packaging structure provided by an embodiment of the present utility model. Figure 2 This is a top view of a module packaging structure provided by an embodiment of the present utility model. Figure 1 Can be Figure 2 The cross-sectional diagram obtained after cutting along the red dotted line AB is as follows: Figure 1 and Figure 2As shown, the module packaging structure includes a plurality of chips 1 and a lead frame 2. The chips 1 are arranged on the lead frame 2. The lead frame 2 is internally provided with a heat dissipation channel 211, and the heat dissipation channel 211 includes an inlet and an outlet. The inlet of the heat dissipation channel 211 is used for flowing in the cooling liquid, the heat dissipation channel 211 is used for providing a flow space for the cooling liquid, and the outlet of the heat dissipation channel 211 is used for flowing out the cooling liquid.
[0028] Specifically, the module packaging structure can include chips 1 and a lead frame 2, and the chips 1 can be arranged on the surface of the lead frame 2 through a patch process. The chips 1 can include an insulated gate bipolar transistor (IGBT), a bipolar transistor (BJT), or a metal-oxide semiconductor field effect transistor (MOSFET), etc. The lead frame 2 can be internally provided with a heat dissipation channel 211, that is, the lead frame 2 can be internally provided with a cavity, and the cavity includes an inlet and an outlet. The inlet can flow in the cooling liquid, the cooling liquid flows through the cavity, and flows out from the outlet. The composition of the cooling liquid can be set according to actual needs. The inlet of the heat dissipation channel 211 can be externally connected to a liquid pump. The cooling liquid flows into the heat dissipation channel 211 through the inlet of the heat dissipation channel 211, flows in the heat dissipation channel 211, can take away the heat emitted by the chips 1, and finally flows out through the outlet, thereby achieving heat dissipation of the module packaging structure.
[0029] The technical scheme of the embodiment of the utility model, the cooling liquid flows into the heat dissipation channel through the inlet of the heat dissipation channel, flows in the heat dissipation channel, can take away the heat emitted by the chips, and finally flows out through the outlet, thereby achieving heat dissipation of the module packaging structure. The technical scheme of the utility model, liquid cooling heat dissipation is directly realized in the inside of the module packaging structure, the heat dissipation path is effectively shortened, the parasitic thermal resistance of the module packaging is greatly reduced, and the performance of the module packaging structure is effectively improved.
[0030] Optionally, on the basis of each of the above embodiments, continuing to refer to Figure 1 and Figure 2 , the lead frame 2 includes a ceramic layer 21, a first copper layer 22, and a second copper layer 23. The first copper layer 22 and the second copper layer 23 are respectively arranged on the opposite first surface and the second surface of the ceramic layer 21. The chips 1 are arranged on the side of the first copper layer 22 away from the ceramic layer 21, and the chips 1 are also arranged on the side of the second copper layer 23 away from the ceramic layer 21.
[0031] Specifically, the lead frame 2 includes a ceramic layer 21, and the first and second surfaces of the ceramic layer 21 are both copper-clad. That is, the first surface of the ceramic layer 21 is covered with a first copper layer 22, and the second surface of the ceramic layer 21 is covered with a second copper layer 23. Exemplarily, the lead frame 2 may include a DBC ceramic substrate. The chip 1 may be disposed on a side of the first copper layer 22 away from the ceramic layer 21, with the electrodes of the chip 1 connected to the first copper layer 22. The chip 1 may be disposed on a side of the second copper layer 23 away from the ceramic layer 21, with the electrodes of the chip 1 connected to the second copper layer 23.
[0032] Existing semiconductor module packaging places the chip on one side of a lead frame, leaving the other side exposed as the primary heat dissipation channel. This results in low module packaging density and an inability to achieve high power density. The technical solution of the present invention, however, places the chip 1 on both sides of the lead frame 2, allowing for chip placement on both sides. This increases the module packaging density, and the increased number of chips 1 effectively achieves high power density.
[0033] Optionally, based on the above embodiments, continue to refer to Figure 1 and Figure 2 A heat dissipation channel 211 is provided in the ceramic layer 21 , and the vertical projection of the heat dissipation channel 211 on the first surface of the ceramic layer 21 covers the vertical projection of all chips 1 on the first surface of the ceramic layer 21 .
[0034] Specifically, the heat dissipation channel 211 can be set inside the ceramic layer 21 of the lead frame 2, and the heat dissipation channel 211 can be set inside the ceramic layer 21 at the corresponding position of the chip 1, to ensure that the vertical projection of the heat dissipation channel 211 on the first surface of the ceramic layer 21 covers the vertical projection of all chips 1 on the first surface of the ceramic layer 21. In this way, the coolant flows into the heat dissipation channel 211 through the inlet of the heat dissipation channel 211, and its flow in the heat dissipation channel 211 can better take away the heat emitted by the chip 1. Finally, the coolant flows out through the outlet, thereby better realizing the heat dissipation of the module packaging structure.
[0035] Optionally, based on the above embodiments, continue to refer to Figure 1 and Figure 2 , the diameter h1 of the heat dissipation channel 211 is smaller than the thickness h2 of the ceramic layer 21 .
[0036] Specifically, the heat dissipation channel 211 is disposed within the ceramic layer 21, and the diameter h1 of the heat dissipation channel 211 is smaller than the thickness h2 of the ceramic layer 21. This configuration effectively prevents the coolant flowing within the heat dissipation channel 211 from contacting the first copper layer 22 and the second copper layer 23, thereby affecting the conductivity of the first copper layer 22 and the second copper layer 23, and thus affecting the performance of the entire module packaging structure.
[0037] Optionally, on the basis of the above embodiments, with reference to Figure 1 and Figure 2 the cooling liquid comprises cooling water.
[0038] Specifically, the inlet of the heat dissipation channel 211 can be connected with a water pump, and the cooling water flows into the heat dissipation channel 211 through the inlet, flows in the heat dissipation channel 211, takes away the heat emitted by the chip 1, and finally flows out through the outlet, so as to realize the heat dissipation of the module packaging structure. The inlet and the outlet of the heat dissipation channel 211 can be designed by using the relatively standard inlet and outlet in the industry, so as to facilitate the installation and use.
[0039] Optionally, on the basis of the above embodiments, with reference to Figure 1 and Figure 2 the first copper layer 22 comprises a first pattern, and the second copper layer 23 comprises a second pattern. The chip 1 arranged on the side of the first copper layer 22 away from the ceramic layer 21 is connected with the first copper layer 22 through wire bonding. The chip 1 arranged on the side of the second copper layer 23 away from the ceramic layer 21 is connected with the second copper layer 23 through wire bonding. The ceramic layer 21 further comprises a through hole, and a conductive structure 212 is arranged in the through hole, and the conductive structure 212 is used to realize the interconnection of the first copper layer 22 and the second copper layer 23.
[0040] Specifically, the double sides of the ceramic layer 21 of the lead frame 2 are covered with the first copper layer 22 and the second copper layer 23, the first copper layer 22 is formed with a first pattern through a process such as photoetching and etching, and the second copper layer 23 is formed with a second pattern through a process such as photoetching and etching. For example, the chip 1 can comprise a gate, a source and a drain, and the first copper layer 22 needs to be provided with at least three disconnected isolation regions, which are respectively connected with the gate, the source and the drain of the chip 1 arranged on the surface of the first copper layer 22. The second copper layer 23 also needs to be provided with at least three disconnected isolation regions, which are respectively connected with the gate, the source and the drain of the chip 1 arranged on the surface of the second copper layer 23.
[0041] The electrodes of the chip 1 can be connected with the first copper layer 22 or the second copper layer 23 through wire bonding, in the embodiment of the utility model, the wire bonding is a kind of technology using metal wire, and metal wire and lead frame pad are tightly welded by heat, pressure or ultrasonic energy etc., to realize the electrical interconnection between chip and lead frame and the information intercommunication between chips. The ceramic layer 21 of the lead frame 2 is further provided with a through hole, and a conductive structure 212 is arranged in the through hole, and the conductive structure 212 connects the same electrodes of the first copper layer 22 and the second copper layer 23.
[0042] Optionally, with reference to Figure 1 and Figure 2The manufacturing process of the module packaging structure provided by the embodiment of the present invention may include performing two steps of die bonding and wire bonding on both sides of the lead frame 2. That is, the chip 1 may be first placed on the side of the first copper layer 22 away from the ceramic layer 21, and then the electrodes of the chip 1 may be connected to the first copper layer 22 by wire bonding. Then, the chip 1 may be placed on the side of the second copper layer 23 away from the ceramic layer 21, and then the electrodes of the chip 1 may be connected to the second copper layer 23 by wire bonding. The entire manufacturing process of the module packaging structure provided by the embodiment of the present invention may include grinding, core mounting, wire bonding, and plastic encapsulation.
[0043] Optionally, based on the above embodiments, continue to refer to Figure 1 and Figure 2 , the conductive structure 212 includes a copper pillar.
[0044] Specifically, after the ceramic layer 21 is provided with a through hole, metal copper can be filled in the through hole to achieve connection between the same electrodes of the first copper layer 22 and the second copper layer 23. The conductive structure 212 can also include other conductive materials. For example, the conductive structure 212 can also include metal tungsten and other materials, which are not specifically limited here.
[0045] Optionally, based on the above embodiments, continue to refer to Figure 1 and Figure 2 The module packaging structure also includes: a plastic package body 3. Figure 2 The top view of the module packaging structure shown in FIG is a top view without the plastic encapsulation body 3. The plastic encapsulation body 3 is disposed on the side of the first copper layer 22 away from the ceramic layer 21. The vertical projection of the plastic encapsulation body 3 on the first surface of the ceramic layer 21 covers the vertical projections of all chips 1 disposed on the side of the first copper layer 22 away from the ceramic layer 21 on the first surface of the ceramic layer 21. The plastic encapsulation body 3 is also disposed on the side of the second copper layer 23 away from the ceramic layer 21. The vertical projection of the plastic encapsulation body 3 on the second surface of the ceramic layer 21 covers the vertical projections of all chips 1 disposed on the side of the second copper layer 23 away from the ceramic layer 21 on the second surface of the ceramic layer 21.
[0046] Specifically, a plastic encapsulation body 3 is further provided on the side of the first copper layer 22 away from the ceramic layer 21, and the plastic encapsulation body 3 encapsulates the chip 1 disposed on the side of the first copper layer 22 away from the ceramic layer 21. A plastic encapsulation body 3 is also provided on the side of the second copper layer 23 away from the ceramic layer 21, and the plastic encapsulation body 3 encapsulates the chip 1 disposed on the side of the second copper layer 23 away from the ceramic layer 21. The plastic encapsulation body 3 protects the chip 1 and the circuit connection structure between the chip 1 and the lead frame 2 from external forces and the external environment, thereby extending the service life of the module packaging structure. The plastic encapsulation body 3 also provides mechanical support, protecting the chip 1 from mechanical impact.
[0047] Optionally, based on the above embodiments, continue to refer to Figure 1and Figure 2 , the chip 1 is welded on the lead frame 2. Alternatively, the chip 1 is pasted on the lead frame 2.
[0048] Specifically, the chip 1 can be soldered to the surface of the first copper layer 22 or the second copper layer 23 by solder paste, or the chip 1 can be adhered to the surface of the first copper layer 22 or the second copper layer 23 by an organic adhesive. This arrangement can make the combination of the chip 1 and the lead frame 2 more secure.
[0049] An embodiment of the present invention provides an electronic device, wherein the electronic device includes any module packaging structure provided by any of the above embodiments of the present invention and has the beneficial effects of any module packaging structure provided by any of the above embodiments of the present invention.
[0050] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this utility model can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of this utility model can be achieved. This is not limited herein.
[0051] The above specific embodiments do not limit the scope of protection of this utility model. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model shall be included within the scope of protection of this utility model.
Claims
1. A module packaging structure, characterized in that: include: multiple chips and lead frames; The chip is arranged on the lead frame; a heat dissipation channel is arranged inside the lead frame, and the heat dissipation channel includes an inlet and an outlet; the inlet of the heat dissipation channel is used for the flow of coolant, the heat dissipation channel is used to provide a flow space for the coolant, and the outlet of the heat dissipation channel is used for the flow out of the coolant.
2. The module packaging structure according to claim 1, wherein: The lead frame includes a ceramic layer, a first copper layer and a second copper layer; The first copper layer and the second copper layer are respectively arranged on the opposite first and second surfaces of the ceramic layer; the chip is arranged on a side of the first copper layer away from the ceramic layer, and the chip is also arranged on a side of the second copper layer away from the ceramic layer.
3. The module packaging structure according to claim 1, wherein: The lead frame includes a ceramic layer, and the ceramic layer includes a first surface and a second surface disposed opposite to each other; The heat dissipation channel is provided in the ceramic layer, and the vertical projection of the heat dissipation channel on the first surface of the ceramic layer covers the vertical projections of all the chips on the first surface of the ceramic layer.
4. The module packaging structure according to claim 3, wherein: The diameter of the heat dissipation channel is smaller than the thickness of the ceramic layer.
5. The module packaging structure according to claim 1, wherein: The cooling liquid includes cooling water.
6. The module packaging structure according to claim 2, wherein: The first copper layer includes a first pattern, and the second copper layer includes a second pattern; the chip disposed on a side of the first copper layer away from the ceramic layer is connected to the first copper layer via wire bonding; the chip disposed on a side of the second copper layer away from the ceramic layer is connected to the second copper layer via wire bonding; The ceramic layer further includes a through hole, in which a conductive structure is disposed. The conductive structure is used to interconnect the first copper layer and the second copper layer.
7. The module packaging structure according to claim 6, wherein: The conductive structure includes a copper pillar.
8. The module packaging structure according to claim 2, wherein: Also includes: Plastic packaging; The plastic package body is arranged on a side of the first copper layer away from the ceramic layer, and a vertical projection of the plastic package body on the first surface of the ceramic layer covers the vertical projections of all the chips arranged on the side of the first copper layer away from the ceramic layer on the first surface of the ceramic layer; The plastic package is also arranged on the side of the second copper layer away from the ceramic layer, and the vertical projection of the plastic package on the second surface of the ceramic layer covers the vertical projections of all the chips arranged on the side of the second copper layer away from the ceramic layer on the second surface of the ceramic layer.
9. The module packaging structure according to claim 1, wherein: The chip is welded on the lead frame; or, the chip is pasted on the lead frame.
10. An electronic device, characterized in that: The invention comprises the module packaging structure according to any one of claims 1 to 9.