QFN packaging structure

By designing eighteen pins in the QFN package structure and increasing the pad area, the problem of pin requirements in a small area is solved, better heat dissipation and data transmission performance are achieved, and the packaging cost is reduced.

CN223427499UActive Publication Date: 2025-10-10HUAYUAN SEMICON SHENZHEN LTD
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Patent Information

Application Number
CN202422877861.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-11-25
Publication Date
2025-10-10
Estimated Expiration
2034-11-25

AI Technical Summary

Technical Problem

The existing QFN packaging structure is difficult to meet the requirement of eighteen pins in a smaller area, and the packaging cost is relatively high.

Method used

A QFN package structure is designed with an area of ​​2 mm × 2 mm, including a metal plate, a solder pad and a first chip. Eighteen pins are arranged on the metal plate, including five on the first side, four on the second side, five on the third side, and four on the fourth side, and are connected to the base island through supporting pins. The solder pad area is 1.2 mm × 1.2 mm to increase the heat dissipation area.

Benefits of technology

The requirement of eighteen pins is met in a smaller package area, which increases the heat dissipation area, increases the data transmission volume and speed, and reduces the packaging cost.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a QFN (Quad Flat No-lead) packaging structure, which comprises a metal plate, a bonding pad, a first chip and a packaging body, and the area of the packaging structure is 2mm * 2mm; wherein a lead frame is arranged in the metal plate, and the lead frame comprises a base island, eighteen first pins and two second supporting legs. According to the utility model, an eighteen-pin structure is realized in the 2mm * 2mm QFN packaging structure, so that compared with a 2mm * 2mm QFN packaging structure in the prior art, the 2mm * 2mm QFN packaging structure has more pins, and compared with a 3mm * 3mm QFN packaging structure in the prior art, the 2mm * 2mm QFN packaging structure has a smaller area; therefore, the requirements of more functional pins of market products are met on the basis of saving the packaging area.
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Description

Technical Field

[0001] The utility model relates to the field of chip packaging, in particular to a QFN packaging structure. Background Art

[0002] For display chips, a QFN (Quad Flat No-leads Package) type package is generally used in the prior art.

[0003] There are two commonly used QFN packaging structures in the prior art:

[0004] The first is a 2 mm × 2 mm QFN package structure, that is, its length and width are both 2 mm, the area is 4 square millimeters, and the number of pins is 12 or 14.

[0005] The second type is a 3 mm × 3 mm QFN package structure, that is, its length and width are both 3 mm, the area is 9 square millimeters, and the number of pins is eighteen.

[0006] However, since the packaging cost is positively correlated with the area, the 3 mm × 3 mm QFN packaging structure has a larger area than the 2 mm × 2 mm QFN packaging structure, resulting in a higher packaging cost. However, the 2 mm × 2 mm QFN packaging structure cannot meet the requirement of eighteen pins.

[0007] Therefore, providing a QFN package structure with a smaller area and meeting the requirement of eighteen pins has become a technology that the industry urgently needs to solve. Utility Model Content

[0008] The utility model provides a QFN package structure to solve the problem in the prior art that it is difficult to simultaneously meet the requirements of a smaller QFN package structure area and eighteen pins.

[0009] To solve the above technical problems, the present invention provides a QFN package structure, wherein the area of ​​the QFN package structure is 2 mm×2 mm, and the QFN package structure includes a metal plate, a pad, a first chip, and a package body; the metal plate, the pad, and the first chip are all packaged in the package body; wherein a lead frame is provided in the metal plate, and the lead frame includes:

[0010] a base island, the base island being located in a central area of ​​the metal plate;

[0011] Eighteen first pins, five of which are spaced apart on a first side of the metal plate, four of which are spaced apart on a second side of the metal plate, five of which are spaced apart on a third side of the metal plate, and four of which are spaced apart on a fourth side of the metal plate, wherein the first side and the third side of the metal plate are opposite, and the second side and the fourth side of the metal plate are opposite, and the eighteen first pins are symmetrical along a first centerline, which is a perpendicular centerline of the second side of the metal plate;

[0012] The eighteen first pins include at least one first supporting pin, and the first supporting pin is connected to the base island;

[0013] Two second supporting legs, each of which is bounded by a second center line and disposed on a second side or a fourth side opposite to the first supporting leg, and each of which is also connected to the base island; the second center line being a vertical center line of the first side of the metal plate, and the second center line being perpendicular to the first center line;

[0014] The pad is mounted on the second surface of the base island, so the first chip is mounted on the first surface of the base island.

[0015] Optionally, the center lines of the five first pins on the first side of the metal plate are offset by 0.1 mm along a first direction with respect to the second center line, where the first direction is used to represent a vertical direction from the two second support legs to the second center line.

[0016] Optionally, the area of ​​the pad is 1.2 mm×1.2 mm.

[0017] Optionally, the base island includes a base island structure and a first groove, the base island structure is arranged on the first surface of the metal plate, and the first groove is arranged on the second surface of the metal plate, wherein the base island structure and the first groove correspond to each other up and down, the bottom of the first groove is the second surface of the base island, the surface of the base island structure is the first surface of the base island, and the first surface and the second surface of the metal plate are opposite.

[0018] Optionally, each of the first pins includes a pin structure and a pin groove, the pin structure is arranged on the first surface of the metal plate, the pin groove is arranged on the second surface of the metal plate, and the pin structure and the pin groove correspond to each other up and down.

[0019] Optionally, the pin groove of the first supporting pin is connected to the first groove through the first supporting groove;

[0020] The second supporting foot includes a second supporting groove, the second supporting groove is arranged on the second surface of the metal plate, and the second supporting groove is connected to the first groove.

[0021] Optionally, the depths of the first groove, the pin groove, the first supporting groove, and the second supporting groove are all 30%-70% of the thickness of the metal plate.

[0022] Optionally, the distance between the eighteen first pins and the distance between the eighteen pins and the pad are at least 0.2 mm.

[0023] Optionally, the width of the first pins is 0.15 mm-0.25 mm.

[0024] Optionally, the eighteen first pins include:

[0025] two first supporting pins, wherein the first supporting pins are used to support the base island and are grounded;

[0026] A first signal pin, wherein the first signal pin is used for voltage input;

[0027] A second signal pin, the second signal pin is used for voltage output;

[0028] A third signal pin, a fourth signal pin, and a fifth signal pin, wherein the third signal pin, the fourth signal pin, and the fifth signal pin are all used for data input;

[0029] a sixth signal pin, a seventh signal pin, and an eighth signal pin, wherein the sixth signal pin, the seventh signal pin, and the eighth signal pin are all used for data output;

[0030] The ninth signal pin, the tenth signal pin, the eleventh signal pin, the twelfth signal pin, the thirteenth signal pin, the fourteenth signal pin, the fifteenth signal pin and the sixteenth signal pin, the ninth signal pin, the tenth signal pin, the eleventh signal pin, the twelfth signal pin, the thirteenth signal pin, the fourteenth signal pin, the fifteenth signal pin and the sixteenth signal pin are all used for LED drive output.

[0031] Compared with the prior art, the present invention has the following beneficial effects:

[0032] The utility model provides a QFN package structure, which realizes the arrangement of eighteen first pins in a QFN package structure with an area of ​​2 mm × 2 mm. Compared with the 2 mm × 2 mm QFN package structure in the prior art, the QFN package structure has more pins and has a smaller area than the 3 mm × 3 mm QFN package structure in the prior art. Therefore, the market demand for more functional pins of products is met on the basis of saving package area.

[0033] Furthermore, compared with the 1 square millimeter pad area of ​​the 2 mm × 2 mm QFN package structure in the prior art, the area of ​​the pad in the QFN package structure is 1.2 mm × 1.2 mm, which increases the heat dissipation area of ​​the QFN package structure and can meet greater heat dissipation requirements.

[0034] Furthermore, the pin groove of the first supporting pin is connected to the first groove through the first supporting groove, so that the first supporting pin can be used as a pin and can also support the base island.

[0035] Furthermore, compared with the 2 mm × 2 mm QFN packaging structure in the prior art, the present invention adds two pairs of data transmission pins, namely two data input pins and two data output pins, so that the data transmission volume and data transmission speed can be increased, thereby making the use of the QFN packaging structure provided by the present invention more flexible. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 This is a schematic diagram of the packaging structure provided by the utility model Figure 1 ;

[0037] Figure 2 This is a schematic diagram of the packaging structure provided by the utility model Figure 2 .

[0038] Reference numerals:

[0039] 1-base island;

[0040] 2- soldering pad;

[0041] 3-first pin;

[0042] 4- Second support leg;

[0043] 5-Metal plate;

[0044] 6-first chip;

[0045] 31-first supporting pin;

[0046] 32-pin groove;

[0047] 33-pin structure;

[0048] 311 - first support groove;

[0049] A1-A2 - first centerline;

[0050] B1-B2 - second centerline. DETAILED DESCRIPTION

[0051] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0052] In the description of the present application, it should be understood that the terms "upper", "lower", "upper end", "lower end", "lower surface", "upper surface" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0053] In the description of the present application, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more of the features.

[0054] In the description of the present application, the meaning of "multiple" is multiple, for example, two, three, four, etc., unless otherwise specifically limited.

[0055] In the description of the present application, unless otherwise specifically defined and limited, the terms "connection" and the like should be broadly understood, for example, it can be fixedly connected, or detachably connected, or integrated; it can be mechanically connected, or electrically connected or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, or the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0056] The technical solutions of the present application will be described in detail below with specific examples. The following specific examples can be combined with each other, and the same or similar concepts or processes can not be described in some embodiments.

[0057] As described in the background technology, the QFN package in the prior art is a 2 mm × 2 mm QFN package structure or a 3 mm × 3 mm QFN package structure, wherein the 2 mm × 2 mm QFN package structure has 12 or 14 pins, and the 3 mm × 3 mm QFN package structure has eighteen pins. Therefore, the QFN package structure in the prior art is difficult to simultaneously meet the QFN package structure's requirements for a small area and eighteen pins.

[0058] In view of this, the present invention creatively provides a QFN packaging structure.

[0059] in, Figure 1 This is a schematic diagram of the packaging structure provided by the utility model Figure 1 .

[0060] Please refer to Figure 1 An embodiment of the present invention provides a package structure, wherein the QFN package structure has an area of ​​2 mm×2 mm and includes a metal plate 5, a pad 2, a first chip, and a package body; the metal plate 5, the pad 2, and the first chip are all packaged in the package body; wherein a lead frame is provided in the metal plate 5, and the lead frame includes:

[0061] A base island 1, the base island 1 is located in the central area of ​​the metal plate 5;

[0062] Eighteen first pins 3, five of which are arranged at intervals on the first side of the metal plate 5, four of which are arranged at intervals on the second side of the metal plate 5, five of which are arranged at intervals on the third side of the metal plate 5, and four of which are arranged at intervals on the fourth side of the metal plate 5, wherein the first side and the third side of the metal plate 5 are opposite, and the second side and the fourth side of the metal plate 5 are opposite, and the eighteen first pins 3 are symmetrical along a first center line, which is a perpendicular center line of the second side of the metal plate 5;

[0063] Among them, the eighteen first pins 3 include at least one first supporting pin 31, and the first supporting pin 31 is connected to the base island 1;

[0064] Two second supporting legs 4, both of which are bounded by a second center line and disposed on a second side or a fourth side opposite to the first supporting pin 31, and are also connected to the base island 1; the second center line is a vertical center line of the first side of the metal plate 5, and the second center line is perpendicular to the first center line;

[0065] The pad 2 is mounted on the second surface of the base island 1 , so the first chip is mounted on the first surface of the base island 1 .

[0066] The package structure provided by the present invention provides eighteen first pins 3 in a 2 mm×2 mm QFN package structure, so that the QFN package structure of the present invention can meet the requirement of eighteen pins on the basis of a smaller QFN package structure.

[0067] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0068] As a specific embodiment, the center lines of the five first pins 3 on the first side of the metal plate 5 are offset by 0.1 mm along the first direction with respect to the second center line B1-B2. The first direction is used to represent the vertical direction from the two second support legs 4 to the second center line B1-B2.

[0069] It should be noted that the present invention does not specifically limit the offset distance in the first direction between the center line of the five pins on the first side of the metal plate 5 and the second center line B1-B2. Those skilled in the art can set it according to actual conditions. As long as a QFN packaging structure with five first pins 3 can be set on the first side of the metal plate 5, it is within the protection scope of the present invention.

[0070] In a specific embodiment, the pad 2 has an area of ​​1.2 mm x 1.2 mm and is connected to the ground for heat dissipation. Compared to the 1 mm square pad 2 in the existing 2 mm x 2 mm QFN package structure, the package structure provided by the utility model has a 44% larger pad area, which increases the heat dissipation area, thereby enabling the QFN package structure to meet greater heat dissipation requirements. The larger pad 2 area also facilitates soldering ground wires to the surrounding pads 2 of the first chip.

[0071] As a specific embodiment, the width of each of the first pins 3 may be 0.15-0.25 mm.

[0072] As a specific embodiment, the distance between the eighteen first pins 3 and the distance between the eighteen first pins 3 and the pad 2 are at least 0.2 mm.

[0073] As a specific embodiment, the base island 1 includes a base island structure and a first groove, the base island structure is arranged on the first surface of the metal plate 5, and the first groove is arranged on the second surface of the metal plate 5, wherein the base island structure and the first groove correspond to each other up and down, the bottom of the first groove is the second surface of the base island, the surface of the base island structure is the first surface of the base island 1, and the first surface and the second surface of the metal plate 5 are opposite.

[0074] As a specific embodiment, each of the first pins 3 includes a pin structure 33 and a pin groove 32. The pin structure 33 is provided on the first surface of the metal plate, and the pin groove 32 is provided on the second surface of the metal plate, and the pin structure 33 corresponds to the pin groove 32 in a vertical manner. The pin groove 32 can improve welding performance, thereby ensuring welding quality.

[0075] As a specific embodiment, the pin groove 32 of the first supporting pin 31 is connected to the first groove through the first supporting groove 311; the second supporting foot 4 includes a second supporting groove, the second supporting groove is arranged on the second surface of the metal plate, and the second supporting groove is connected to the first groove, further increasing the heat dissipation area of ​​the QFN packaging structure and enhancing the overcurrent capacity.

[0076] The first groove, the pin groove 32, the first support groove 311, and the second support groove are all formed by back-side half-etching, and the depths of the first groove, the pin groove 32, the first support groove 311, and the second support groove are all 30%-70% of the thickness of the metal plate 5. Back-side half-etching can increase the bonding strength between the package and the lead frame.

[0077] As a specific embodiment, the thickness of the lead frame is 0.102 mm or 0.127 mm, so that the thickness of the QFN package structure is between 0.37 mm and 0.55 mm, making the thickness of the QFN package structure thinner than the existing QFN package structure.

[0078] in, Figure 2 This is a schematic diagram of the packaging structure provided by the utility model Figure 2 .

[0079] Please refer to Figure 2 As a specific implementation, the eighteen first pins 3 include:

[0080] Two first supporting pins 31, the first supporting pins 31 are used to support the base island 1 and are grounded; wherein, the two first supporting pins 31 are respectively located on the first side and the third side of the metal plate 5 near the fourth side;

[0081] a first signal pin, which is used for voltage input and is disposed on the first side of the metal plate 5 near the first supporting pin 31;

[0082] a second signal pin, which is used for voltage output and is disposed on the fourth side of the metal plate 5 near the first side; wherein one of the first support pins 31 is located between the first signal pin and the second signal pin to facilitate the design and arrangement of the terminal circuit;

[0083] a third signal pin, a fourth signal pin, and a fifth signal pin, wherein the third signal pin, the fourth signal pin, and the fifth signal pin are all used for data input and are respectively provided at three positions on the first side of the metal plate 5 close to the second side;

[0084] The sixth signal pin, the seventh signal pin, and the eighth signal pin are all used for data output and are respectively provided at three locations on the fourth side of the metal plate 5 near the third side. The three first pins for data output and the three first pins for data input are provided on adjacent sides of the metal plate 5 to facilitate the arrangement design of the terminal circuit.

[0085] The ninth signal pin, the tenth signal pin, the eleventh signal pin, the twelfth signal pin, the thirteenth signal pin, the fourteenth signal pin, the fifteenth signal pin and the sixteenth signal pin, the ninth signal pin, the tenth signal pin, the eleventh signal pin, the twelfth signal pin, the thirteenth signal pin, the fourteenth signal pin, the fifteenth signal pin and the sixteenth signal pin are all used for LED drive output; wherein, the ninth signal pin, the tenth signal pin, the eleventh signal pin and the twelfth signal pin are arranged on the second side of the metal plate 5, and the thirteenth signal pin, the fourteenth signal pin, the fifteenth signal pin and the sixteenth signal pin are arranged on the third side of the metal plate 5.

[0086] Among them, the eighteen first pins include three pairs of data transmission pins, which adds two pairs of data transmission pins compared to the 2 mm × 2 mm QFN packaging structure in the prior art, thereby increasing the transmission volume and transmission speed, making the QFN packaging structure more flexible to use.

[0087] The first chip 6 is electrically connected to the eighteen first pins 3 , and is also electrically connected to the base island 1 , serving as a ground wire, so that the first chip 6 can dissipate heat better.

[0088] It should be noted that the functional arrangement of the eighteen first pins is not fixed, and those skilled in the art can set the functions of the eighteen first pins according to actual conditions, and the present invention is not limited thereto.

[0089] In summary, the QFN package structure provided by the present invention can meet the requirement of eighteen pins at a relatively low package cost by setting eighteen first pins in a 2 mm×2 mm QFN package structure.

[0090] Furthermore, compared with the 1 square millimeter pad area of ​​the 2 mm × 2 mm QFN package structure in the prior art, the area of ​​the pad in the QFN package structure is 1.2 mm × 1.2 mm, which increases the heat dissipation area of ​​the QFN package structure and can meet greater heat dissipation requirements.

[0091] Furthermore, the pin groove of the first supporting pin is connected to the first groove through the first supporting groove, so that the first supporting pin can be used as a pin and can also support the base island.

[0092] Furthermore, compared with the 2 mm × 2 mm QFN packaging structure in the prior art, the present invention adds two pairs of data transmission pins, namely two data input pins and two data output pins, so that the data transmission volume and data transmission speed can be increased, thereby making the use of the QFN packaging structure provided by the present invention more flexible.

[0093] Although the present invention is disclosed as above, it is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope defined by the claims.

Claims

1. A QFN package structure, characterized in that: The QFN package structure has an area of ​​2 mm×2 mm and includes a metal plate, a pad, a first chip, and a package body; the metal plate, the pad, and the first chip are all packaged in the package body; wherein a lead frame is provided in the metal plate, and the lead frame includes: a base island, the base island being located in a central area of ​​the metal plate; Eighteen first pins, five of which are spaced apart on a first side of the metal plate, four of which are spaced apart on a second side of the metal plate, five of which are spaced apart on a third side of the metal plate, and four of which are spaced apart on a fourth side of the metal plate, wherein the first side and the third side of the metal plate are opposite, and the second side and the fourth side of the metal plate are opposite, and the eighteen first pins are symmetrical along a first centerline, which is a perpendicular centerline of the second side of the metal plate; The eighteen first pins include at least one first supporting pin, and the first supporting pin is connected to the base island; Two second supporting legs, each of which is bounded by a second center line and disposed on a second side or a fourth side opposite to the first supporting leg, and each of which is also connected to the base island; the second center line being a vertical center line of the first side of the metal plate, and the second center line being perpendicular to the first center line; The pad is mounted on the second surface of the base island, so the first chip is mounted on the first surface of the base island.

2. The QFN package structure according to claim 1, wherein: The center lines of the five first pins on the first side of the metal plate are offset by 0.1 mm along a first direction with respect to the second center line. The first direction is used to represent a vertical direction from the two second supporting legs to the second center line.

3. The QFN package structure according to claim 1, wherein: The pad has an area of ​​1.2 mm×1.2 mm.

4. The QFN package structure according to claim 1, wherein: The base island includes a base island structure and a first groove, the base island structure is arranged on the first surface of the metal plate, and the first groove is arranged on the second surface of the metal plate, wherein the base island structure and the first groove correspond to each other up and down, the bottom of the first groove is the second surface of the base island, the surface of the base island structure is the first surface of the base island, and the first surface and the second surface of the metal plate are opposite.

5. The QFN package structure according to claim 4, wherein: Each of the first pins includes a pin structure and a pin groove. The pin structure is arranged on the first surface of the metal plate, and the pin groove is arranged on the second surface of the metal plate. The pin structure and the pin groove correspond to each other vertically.

6. The QFN package structure according to claim 5, wherein: The pin groove of the first supporting pin is connected to the first groove through the first supporting groove; The second supporting foot includes a second supporting groove, the second supporting groove is arranged on the second surface of the metal plate, and the second supporting groove is connected to the first groove.

7. The QFN package structure according to claim 6, wherein: The depths of the first groove, the pin groove, the first supporting groove, and the second supporting groove are all 30% to 70% of the thickness of the metal plate.

8. The QFN package structure according to claim 1, wherein: The distances between the eighteen first pins and the distances between the eighteen pins and the pad are at least 0.2 mm.

9. The QFN package structure according to claim 1, wherein: The width of the first pins is 0.15 mm to 0.25 mm.

10. The QFN package structure according to any one of claims 1 to 9, wherein: The eighteen first pins include: two first supporting pins, wherein the first supporting pins are used to support the base island and are grounded; A first signal pin, wherein the first signal pin is used for voltage input; A second signal pin, the second signal pin is used for voltage output; A third signal pin, a fourth signal pin, and a fifth signal pin, wherein the third signal pin, the fourth signal pin, and the fifth signal pin are all used for data input; a sixth signal pin, a seventh signal pin, and an eighth signal pin, wherein the sixth signal pin, the seventh signal pin, and the eighth signal pin are all used for data output; The ninth signal pin, the tenth signal pin, the eleventh signal pin, the twelfth signal pin, the thirteenth signal pin, the fourteenth signal pin, the fifteenth signal pin and the sixteenth signal pin, the ninth signal pin, the tenth signal pin, the eleventh signal pin, the twelfth signal pin, the thirteenth signal pin, the fourteenth signal pin, the fifteenth signal pin and the sixteenth signal pin are all used for LED drive output.