Constant-current transient pulse suppression circuit
By designing a constant current transient pulse suppression circuit and using a constant current circuit composed of components such as transistors and capacitors, the circuit is optimized to suppress surge current, solving the problem of improper transient current suppression in existing circuits, and achieving the stability of current recovery time and the safety of equipment.
Patent Information
- Application Number
- CN202422844544.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-21
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2034-11-21
AI Technical Summary
Existing transient current suppression circuits generally use a constant voltage method, which cannot effectively suppress transient current and has a long recovery time, resulting in power failure and equipment damage.
A constant current transient pulse suppression circuit is adopted. The constant current circuit composed of components such as transistors, capacitors, and diodes is used to charge the capacitor with a constant current through the constant current circuit composed of transistors. The NMOS tube briefly works in the linear area, and the diode is used to release the electrical energy stored in the capacitor. The circuit is optimized to suppress surge current.
It effectively suppresses the recovery time change of surge current, meets the circuit load characteristic requirements, extends the service life of the equipment, and reduces power network interference.
Smart Images
Figure CN223451633U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to switching power supply technical field, specifically related to a constant current type transient pulse suppression circuit. BACKGROUND
[0002] In electronic systems, inrush current refers to the large current input at the moment of device startup, especially in inductive loads. It can cause power failure, voltage drop or device damage. To avoid these problems, designers will use inrush current protection circuits such as resistance current limiting, NTC thermistor and soft start circuit. Considering factors such as load capacitance, steady-state current and switching time, it is crucial to choose the right inrush current limiting method.
[0003] In power input filtering, large energy storage capacitors are often used for filtering and voltage stabilization. At the moment of device power-on, the capacitor voltage cannot change abruptly, so a large charging current will be generated, i.e. the capacitor is short-circuited in a short time. According to the zero-state response model of the first-order circuit, the initial current value is equivalent to the short-circuit current of the filter capacitor. That is, the input inrush current depends on the amplitude of the input voltage and the total inductance and capacitance in the circuit.
[0004] Although the inrush current is very short, if not handled, it will shorten the service life of the capacitor and other components in the device, and it will also affect other devices in the power network and cause instantaneous voltage drop in the same power network, causing interference. In the inrush current specification requirements in DC / DC power supply characteristic testing, not only the size of the inrush current is specified, but also the recovery time of the current is specified. Therefore, how to effectively suppress the instantaneous current and recovery time has become a very prominent problem.
[0005] In summary, the existing transient current suppression circuit generally uses constant voltage to suppress transient current, which cannot effectively suppress the instantaneous current and recovery time. SUMMARY
[0006] Therefore, the utility model aims at providing a constant current type transient pulse suppression circuit to solve the recovery time variation problem caused by the existing circuit in transient suppression, so as to meet the load characteristic requirements of the circuit.
[0007] To achieve the above purpose, the utility model adopts the following technical solutions:
[0008] A constant current transient pulse suppression circuit, comprising a transistor Q1, a transistor Q2, a resistor R1, a resistor R2, a capacitor C1, a capacitor C2, a diode D1, a voltage stabilizing diode D2, and a MOS tube U1, wherein the emitter of the transistor Q1, one end of the resistor R1, the cathode of the diode D1, and one end of the capacitor C2 are connected to a power input terminal Vin; the base of the transistor Q1 and the emitter of the transistor Q2 are connected together; the collector of the transistor Q1 is connected to the base of the transistor Q2; the collector of the transistor Q2 is connected to one end of the capacitor C1, the cathode of the voltage stabilizing diode D2, the anode of the diode D1, one end of the resistor R2, and the G terminal of the NMOS tube U1; the anode of the diode D2, the other end of the capacitor C1, the other end of the resistor R2, and the D terminal of the NMOS tube U1 are connected to GND; and the other end of the capacitor C2 is connected to the S terminal of the NMOS tube.
[0009] Further, the transistor Q1 and the transistor Q2 are both PNP transistors.
[0010] Further, the diode D1 is 1N4148, the voltage stabilizing diode D2 is ZPD8.2, and the NMOS tube U1 is 2N6755.
[0011] Further, the resistor R1 is 510Ω, the capacitor C1 is 2.2UF, the resistor R2 is 10KΩ, and the capacitor C2 is 470UF.
[0012] In summary, the design principle of the surge current suppression circuit of the utility model is to use capacitors, transistors, diodes and other components to suppress surge current. The circuit is optimized from the original constant voltage mode and uses a constant current circuit to suppress transient current. Among them, the constant current circuit composed of transistors charges the capacitor with constant current, so that the NMOS tube works temporarily in the linear region, and is used to simulate the current size generated in the opening moment of the switch. The diode can be used to release the electrical energy stored in the capacitor to the bus, and to prepare for the opening of the switch in the next cycle. The utility model can simulate the time of transient current within a certain range without being affected by the change of input voltage. The recovery time variation problem caused by the transient suppression problem of the existing circuit is effectively solved to meet the load characteristic requirements of the circuit. BRIEF DESCRIPTION OF DRAWINGS
[0013] Figure 1 is a schematic diagram of the constant current transient pulse suppression circuit of the utility model;
[0014] The utility model is further explained and described below in combination with the drawings and specific embodiments. DETAILED DESCRIPTION
[0015] As Figure 1The utility model discloses a constant current type transient pulse suppression circuit, including triode Q1, triode Q2, resistance R1, resistance R2, electric capacity C1, electric capacity C2, diode D1 and MOS tube U1. Among them, the 2 foot (emitter) of triode Q1 with resistance R1 one end, the cathode of diode D1, electric capacity C2 one end common connection power input Vin, the 1 foot (base) of triode Q1 with resistance R1 other end, the 2 foot (emitter) of triode Q2 common connection, the 3 foot (collector) of triode Q1 connects the 1 foot (base) of triode Q2, the 3 foot (collector) of triode Q2 with electric capacity C1 one end, the cathode of voltage stabilizing diode D2, the anode of diode D1, resistance R2 one end, the G pole of NMOS tube U1, the anode of diode D2 with electric capacity C1 other end, resistance R2 other end, the D pole of NMOS tube U1 common connection GND, electric capacity C2 other end connects the S pole of NMOS tube.
[0016] In the above technical solution, the role of each part is as follows:
[0017] The main functions of triode Q1 and triode Q2 are as follows: (1) limiting current; (2) constant current control.
[0018] The function of electric capacity C1 is to turn on NMOS tube U1 through the charging of electric capacity C1, and voltage stabilizing diode D2 is used to limit the voltage reaching electric capacity C1 within the set safety range and protect the G pole voltage of NMOS tube U1.
[0019] The working principle of the utility model is as follows:
[0020] When the power supply has input, current flows in the base of triode Q1, collector current flows in triode Q1, and emitter current of triode Q1 flows through resistance R1, so that a voltage drop is generated at both ends of resistance R1. When the voltage drop at both ends of resistance R1 reaches 0.6V, triode Q2 is turned on, collector current of triode Q2 flows through resistance R2, and the base current of triode Q1 is shunted, so that the base current of triode Q1 and the collector current are reduced. Therefore, after triode Q2 is turned on, the base current of triode Q1 is limited, the output current of the circuit is constant, the charging current of electric capacity C1 is in the form of constant current, the charging time is a fixed value, and when the voltage of electric capacity C1 reaches the opening voltage of NMOS tube U1, the voltage in this period of time is used to make the circuit achieve the function of suppressing transient current after the voltage of electric capacity reaches the set voltage of voltage stabilizing diode D2.
[0021] In summary, the design principle of the surge current suppression circuit of the utility model is to use capacitors, transistors, diodes and other components to suppress the surge current. The circuit is optimized on the original constant voltage mode, and a constant current circuit is used to suppress the transient current. Among them, the constant current circuit composed of transistors charges the capacitor with constant current, so that the NMOS tube works in the linear region for a short time, and is used to simulate the current generated in the opening moment of the switch. The diode can be used to release the electrical energy stored in the capacitor to the bus, and to prepare for the opening of the switch in the next cycle. The utility model can affect the simulation time of the transient current within a certain range due to the change of the input voltage.
[0022] In this embodiment, the selection of each component is as follows:
[0023] The transistor Q1 and the transistor Q2 are both PNP transistors, specifically 12A02CH-TL-E.
[0024] The diode D1 is 1N4148, the voltage stabilizing diode D2 is ZPD8.2, and the NMOS tube U1 is 2N6755.
[0025] The resistance R1 is 510Ω, the capacitor C1 is 2.2UF, the resistance R2 is 10KΩ, and the capacitor C2 is 470UF.
[0026] The above is only the preferred embodiment of the utility model, and it should be pointed out that the above preferred embodiment should not be regarded as the limitation of the utility model. For ordinary skilled persons in the technical field, some improvements can be made without departing from the scope of the utility model, and the improvement of the transient current suppression circuit should also be regarded as the protection scope of the utility model.
Claims
1. A constant current transient pulse suppression circuit, characterized in that: The device comprises a transistor Q1, a transistor Q2, a resistor R1, a resistor R2, a capacitor C1, a capacitor C2, a diode D1, a voltage-stabilizing diode D2, and a MOS transistor U1; wherein the emitter of the transistor Q1, one end of the resistor R1, the cathode of the diode D1, and one end of the capacitor C2 are commonly connected to a power input terminal Vin; the base of the transistor Q1, the other end of the resistor R1, and the emitter of the transistor Q2 are commonly connected; the collector of the transistor Q1 is connected to the base of the transistor Q2; the collector of the transistor Q2, one end of the capacitor C1, the cathode of the voltage-stabilizing diode D2, the anode of the diode D1, one end of the resistor R2, and the G electrode of the NMOS transistor U1; the anode of the diode D2, the other end of the capacitor C1, the other end of the resistor R2, and the D electrode of the NMOS transistor U1 are commonly connected to GND; and the other end of the capacitor C2 is connected to the S electrode of the NMOS transistor.
2. The constant current transient pulse suppression circuit according to claim 1, wherein: The transistor Q1 and the transistor Q2 are both PNP transistors.
3. The constant current transient pulse suppression circuit according to claim 1, wherein: The diode D1 is 1N4148, the voltage regulator diode D2 is ZPD8.2, and the NMOS tube U1 is 2N6755.
4. The constant current transient pulse suppression circuit according to claim 1, wherein: The resistor R1 is 510Ω, the capacitor C1 is 2.2UF, the resistor R2 is 10KΩ, and the capacitor C2 is 470UF.