Quick-response over-current detection protection circuit
By designing a current mirror circuit and a common source cascode architecture, the problem of slow response in existing overcurrent detection circuits is solved, achieving fast and accurate current detection and protection, and improving the circuit's response speed and accuracy.
Patent Information
- Application Number
- CN202422629662.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-30
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2034-10-30
AI Technical Summary
Existing overcurrent detection and protection circuits are limited by actual circuit conditions, making it difficult to quickly and accurately complete current detection and response. Component mismatch and parasitic inductance and trace resistance affect performance.
By employing a combination of a current mirror circuit, a comparator circuit, and transistor M5, and utilizing a common source cascode architecture and current mirror technology, the power supply circuit is directly sampled. The current is then compared with a reference voltage to ensure that the circuit remains operational when protection is not triggered, thereby improving response speed and accuracy.
It effectively avoids the effects of component mismatch and parasitic inductance, improves the accuracy and speed of overcurrent detection, and ensures that the circuit responds quickly and provides protection during overcurrent.
Smart Images
Figure CN223462730U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to general circuit technical field especially relates to a quick response overcurrent detection protection circuit. BACKGROUND
[0002] At present, current detection protection circuit usually adopts the form of current sampling, carries out current detection to the circuit that possibly flows through big current, then carries out current comparison through comparison circuit and reference current, or carries out voltage comparison with reference voltage in the form such as converting current into voltage signal, judges the size of the current signal detected, triggers overcurrent protection signal when current is big, thereby limiting or closing the current path output current's ability in the circuit through control circuit to play the role of protecting circuit.
[0003] But in the prior art, overcurrent detection protection circuit because of the limitation of actual circuit itself, it is difficult to quickly and accurately complete current detection and fast response function, the mismatch of circuit device itself, parasitic inductance wiring resistance can have great influence on the performance of overcurrent detection protection circuit. UTILITY MODEL CONTENTS
[0004] The utility model discloses a kind of quick response overcurrent detection protection circuit, to solve the technical problem that overcurrent detection protection circuit in prior art because of the limitation of actual circuit itself, it is difficult to quickly and accurately complete current detection and fast response function, the mismatch of circuit device itself, parasitic inductance wiring resistance can have great influence on the performance of overcurrent detection protection circuit.
[0005] To achieve the above object, a kind of quick response overcurrent detection protection circuit is used in the utility model, including current mirror circuit, current mirror, comparison circuit and transistor M5, the current mirror circuit with the current mirror is communicated by the transistor M5, and the current mirror circuit, the current mirror and the transistor M5 are mutually adapted, the input of the comparison circuit is communicated with the current mirror, and the output of the comparison circuit is communicated with the current mirror circuit.
[0006] The current mirror circuit comprises a resistor R1, a transistor M1, a transistor M2, a current source I1, a capacitor C, a control logic module and a load circuit, a pin 1 of the transistor M1 is communicated with the resistor R1, a pin 2 and a pin 3 of the transistor M1 are communicated, the current source I1 is communicated with the pin 2 of the transistor M1, the capacitor C is communicated with the current source I1, a pin 2 of the transistor M2 is communicated with the capacitor C, a pin 3 of the transistor M2 is communicated with the pin 3 of the transistor M1, a pin 2 of the transistor M5 is communicated with a pin 1 of the transistor M2, a pin 1 of the transistor M5 is communicated with the resistor R1, a pin 2 and a pin 3 of the transistor M5 are communicated, the load circuit is communicated between the pin 2 of the transistor M2 and the capacitor C, and the control logic module is communicated with the load circuit.
[0007] The current mirror comprises a transistor M3, a transistor M4, a transistor M6 and a current source I2, a pin 1 of the transistor M6 is communicated with the resistor R1 and a pin 1 of the transistor M5, a pin 3 of the transistor M6 is communicated with a pin 3 of the transistor M5, a pin 1 of the transistor M4 is communicated with a pin 2 of the transistor M6, a pin 1 of the transistor M3 is communicated with a pin 3 of the transistor M5, a pin 3 of the transistor M3 is communicated with a pin 3 of the transistor M4, a pin 2 and a pin 3 of the transistor M3 are communicated, the current source I2 is communicated with the pin 2 of the transistor M3, the comparison circuit is communicated with the pin 2 of the transistor M4 and the current source I2, a power supply end is connected between the pin 1 of the transistor M6 and the pin 1 of the transistor M5, and a grounding end is connected between the comparison circuit and the current source I2.
[0008] The comparison circuit comprises a resistor R2 and a reference voltage VREF, two ends of the resistor R2 are communicated with the pin 2 of the transistor M4 and the current source I2 respectively, the reference voltage VREF is connected between the resistor R2 and the pin 2 of the transistor M4, and the reference voltage VREF is communicated with the control logic module.
[0009] The comparison circuit comprises a current source I3 and a Schmitt trigger, two ends of the current source I3 are communicated with the current source I2 and the pin 2 of the transistor M4 respectively, the Schmitt trigger is connected between the current source I3 and the pin 2 of the transistor M4, and the Schmitt trigger is communicated with the control logic module.
[0010] The quick response overcurrent detection protection circuit has the following beneficial effects:
[0011] 1. The sampling circuit directly samples the power supply circuit, effectively avoiding the influence of parasitic and matching on sampling accuracy.
[0012] 2. The comparison circuit adopts a common-source common-gate architecture, which can effectively improve the accuracy of the comparison circuit. At the same time, when the overcurrent detection protection circuit does not trigger protection, the comparison circuit is also in a working state, and is subjected to the voltage clamping effect of the common-source common-gate, which can ensure that the circuit can respond quickly when protection is not triggered, improve the speed of overcurrent detection protection, and improve the accuracy of overcurrent detection protection from the side. BRIEF DESCRIPTION OF DRAWINGS
[0013] In order to more clearly illustrate the technical scheme in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiment or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creative labor.
[0014] Figure 1 is a circuit diagram of the first embodiment of the present application.
[0015] Figure 2 is a circuit diagram of the second embodiment of the present application.
[0016] 1-current mirror circuit, 2-current mirror, 3-comparison circuit, 4-control logic module, 5-load circuit, 6-Schmitt trigger. DETAILED DESCRIPTION
[0017] The first embodiment of the present application is:
[0018] Please refer to Figure 1 The utility model provides a kind of fast response overcurrent detection protection circuit: including current mirror circuit 1, current mirror 2, comparison circuit 3 and transistor M5, the current mirror circuit 1 with the current mirror 2 is communicated by the transistor M5, and the current mirror circuit 1, the current mirror 2 and the transistor M5 are mutually adapted, the input of the comparison circuit 3 with the current mirror 2 is communicated, and the output of the comparison circuit 3 with the current mirror circuit 1 is communicated.
[0019] The current mirror circuit 1 comprises a resistor R1, a transistor M1, a transistor M2, a current source I1, a capacitor C, a control logic module 4 and a load circuit 5. The pin 1 of the transistor M1 is connected with the resistor R1, and the pin 2 and the pin 3 of the transistor M1 are connected with each other. The current source I1 is connected with the pin 2 of the transistor M1. The capacitor C is connected with the current source I1. The pin 2 of the transistor M2 is connected with the capacitor C. The pin 3 of the transistor M2 is connected with the pin 3 of the transistor M1. The pin 2 of the transistor M5 is connected with the pin 1 of the transistor M2. The pin 1 of the transistor M5 is connected with the resistor R1. The pin 2 and the pin 3 of the transistor M5 are connected with each other. The load circuit 5 is connected between the pin 2 of the transistor M2 and the capacitor C. The control logic module 4 is connected with the load circuit 5.
[0020] Secondly, the current mirror 2 comprises a transistor M3, a transistor M4, a transistor M6 and a current source I2. The pin 1 of the transistor M6 is connected with the resistor R1 and the pin 1 of the transistor M5. The pin 3 of the transistor M6 is connected with the pin 3 of the transistor M5. The pin 1 of the transistor M4 is connected with the pin 2 of the transistor M6. The pin 1 of the transistor M3 is connected with the pin 3 of the transistor M5. The pin 3 of the transistor M3 is connected with the pin 3 of the transistor M4. The pin 2 and the pin 3 of the transistor M3 are connected with each other. The current source I2 is connected with the pin 2 of the transistor M3. The comparison circuit 3 is connected with the pin 2 of the transistor M4 and the current source I2. The pin 1 of the transistor M6 and the pin 1 of the transistor M5 are connected with a power supply end. The comparison circuit 3 and the current source I2 are connected with a ground end.
[0021] Meanwhile, the comparison circuit 3 comprises a resistor R2 and a reference voltage VREF. The two ends of the resistor R2 are connected with the pin 2 of the transistor M4 and the current source I2, respectively. The resistor R2 and the pin 2 of the transistor M4 are connected with the reference voltage VREF. The reference voltage VREF is connected with the control logic module 4.
[0022] When the fast response overcurrent detection protection circuit of the embodiment is used, the current source I1 provides current bias, the transistor M2 is larger in size than the transistor M1, the transistor M2 can be ensured to have a strong load carrying capacity and cannot limit the output current, can quickly provide charges for the load and the capacitor C, and can ensure that the output voltage does not fluctuate sharply, in addition, the transistor M2 can also serve as an isolation between the output voltage and the comparison circuit 3, can prevent the output fluctuation or the output being pulled down by a strong current from affecting the comparison circuit 3, the transistor M2 can clamp the gate voltage of the transistor M5 and cannot be reduced to be very low, which is helpful for the fast response of the current mirror 2, the sum of the sampling current Idec and the current source I2 in the current mirror 2 is mirrored to the transistor M6 to perform comparison, the mirror current passes through the resistor R2, so that the sampling current is converted into a voltage to be compared with the reference voltage VREF to obtain an overcurrent detection signal OC_DEC, the overcurrent detection signal OC_DEC passes through the control logic module 4 to limit or shut down the current of the load circuit 5, and serves as an overcurrent protection function, the common source and common gate structure can ensure that the source-drain voltages of the transistor M5 and the transistor M6 in the current mirror 2 are consistent, can greatly reduce the influence of the channel length modulation effect, can ensure that the mirror current can be accurately converted, in addition, the transistor M3 and the transistor M4 in combination with the current source I2 can ensure that the transistors M5 and M6 can still pass through the current of the current source I2 to be in a working state, and the gate voltages of the transistors M5 and M6 are clamped at a suitable voltage and will not be too high, so that the current mirror 2 can quickly respond when the overcurrent protection is triggered.
[0023] The second embodiment of the application is:
[0024] Please refer to Figure 2 The utility model provides a kind of fast response overcurrent detection protection circuit: including current mirror circuit 1, current mirror 2, comparison circuit 3 and transistor M5, the current mirror circuit 1 with the current mirror 2 is communicated by the transistor M5, and the current mirror circuit 1, the current mirror 2 and the transistor M5 are mutually adapted, the input of the comparison circuit 3 is communicated with the current mirror 2, and the output of the comparison circuit 3 is communicated with the current mirror circuit 1.
[0025] The current mirror circuit 1 comprises a resistor R1, a transistor M1, a transistor M2, a current source I1, a capacitor C, a control logic module 4 and a load circuit 5. The pin 1 of the transistor M1 is connected with the resistor R1, and the pin 2 and the pin 3 of the transistor M1 are connected with each other. The current source I1 is connected with the pin 2 of the transistor M1. The capacitor C is connected with the current source I1. The pin 2 of the transistor M2 is connected with the capacitor C. The pin 3 of the transistor M2 is connected with the pin 3 of the transistor M1. The pin 2 of the transistor M5 is connected with the pin 1 of the transistor M2. The pin 1 of the transistor M5 is connected with the resistor R1. The pin 2 and the pin 3 of the transistor M5 are connected with each other. The load circuit 5 is connected between the pin 2 of the transistor M2 and the capacitor C. The control logic module 4 is connected with the load circuit 5.
[0026] Secondly, the current mirror 2 comprises a transistor M3, a transistor M4, a transistor M6 and a current source I2. The pin 1 of the transistor M6 is connected with the resistor R1 and the pin 1 of the transistor M5. The pin 3 of the transistor M6 is connected with the pin 3 of the transistor M5. The pin 1 of the transistor M4 is connected with the pin 2 of the transistor M6. The pin 1 of the transistor M3 is connected with the pin 3 of the transistor M5. The pin 3 of the transistor M3 is connected with the pin 3 of the transistor M4. The pin 2 and the pin 3 of the transistor M3 are connected with each other. The current source I2 is connected with the pin 2 of the transistor M3. The comparison circuit 3 is connected with the pin 2 of the transistor M4 and the current source I2. The pin 1 of the transistor M6 and the pin 1 of the transistor M5 are connected with a power supply end. The comparison circuit 3 and the current source I2 are connected with a ground end.
[0027] Meanwhile, the comparison circuit 3 comprises a current source I3 and a Schmitt trigger 6. The two ends of the current source I3 are connected with the current source I2 and the pin 2 of the transistor M4, respectively. The current source I3 and the pin 2 of the transistor M4 are connected with the Schmitt trigger 6. The Schmitt trigger 6 is connected with the control logic module 4.
[0028] When the fast response over-current detection protection circuit of the embodiment is used, the current source I1 provides current bias, the size of the transistor M2 is greater than that of the transistor M1, the transistor M2 can ensure that it has strong load capacity and will not limit the output current, and can quickly provide charge for the load and the capacitor C, so as to ensure that the output voltage will not fluctuate sharply. In addition, the transistor M2 can also serve as an isolation between the output voltage and the comparison circuit 3, which can prevent the output fluctuation or the output being pulled down by strong current from affecting the comparison circuit 3. The transistor M2 can clamp the gate voltage of the transistor M5 to prevent it from being too low, which helps the fast response of the current mirror 2. In the current mirror 2, the sum of the sampling current Idec and the current source I2 is mirrored to the transistor M6 for comparison, and the mirrored current is directly compared with the current source I3 to obtain the over-current detection signal OC_DEC. The over-current detection signal OC_DEC is sent to the control logic module 4 to limit or shut down the current of the load circuit 5, thereby playing a role in over-current protection. The common source and common gate structure can ensure that the source-drain voltages of the transistor M5 and the transistor M6 are consistent, which can greatly reduce the influence of the channel length modulation effect and ensure that the current can be accurately converted. In addition, the transistor M3 and the transistor M4 in combination with the current source I2 can ensure that the transistors M5 and M6 can still pass through the current of the current source I2 when there is no load current or light load, so that they are consistently in working state, and the gate voltages of the transistors M5 and M6 are clamped at a suitable voltage without being too high, thereby ensuring that the current mirror 2 can quickly respond when the over-current protection is triggered.
[0029] The above only discloses a preferred embodiment of the utility model, and of course cannot limit the scope of the utility model. Those skilled in the art can understand that all or part of the above-mentioned embodiments can be implemented, and equivalent changes made according to the utility model claims still belong to the scope of the utility model.
Claims
1. A fast response over-current detection protection circuit, characterized in that, it comprises a current mirror circuit, a current mirror, a comparison circuit and a transistor M5, the current mirror circuit and the current mirror are communicated through the transistor M5, and the current mirror circuit, the current mirror and the transistor M5 are adapted to each other, the input end of the comparison circuit is communicated with the current mirror, and the output end of the comparison circuit is communicated with the current mirror circuit.
2. The fast response over-current detection protection circuit of claim 1, characterized in that, the current mirror circuit comprises a resistor R1, a transistor M1, a transistor M2, a current source I1, a capacitor C, a control logic module and a load circuit, the pin 1 of the transistor M1 is communicated with the resistor R1, and the pin 2 and pin 3 of the transistor M1 are communicated, the current source I1 is communicated with the pin 2 of the transistor M1, the capacitor C is communicated with the current source I1, the pin 2 of the transistor M2 is communicated with the capacitor C, the pin 3 of the transistor M2 is communicated with the pin 3 of the transistor M1, the pin 2 of the transistor M5 is communicated with the pin 1 of the transistor M2, the pin 1 of the transistor M5 is communicated with the resistor R1, the pin 2 and pin 3 of the transistor M5 are communicated, the load circuit is communicated between the pin 2 of the transistor M2 and the capacitor C, and the control logic module is communicated with the load circuit.
3. The fast response over-current detection protection circuit of claim 2, characterized in that, the current mirror comprises a transistor M3, a transistor M4, a transistor M6 and a current source I2, the pin 1 of the transistor M6 is communicated with the resistor R1 and the pin 1 of the transistor M5, the pin 3 of the transistor M6 is communicated with the pin 3 of the transistor M5, the pin 1 of the transistor M4 is communicated with the pin 2 of the transistor M6, the pin 1 of the transistor M3 is communicated with the pin 3 of the transistor M5, the pin 3 of the transistor M3 is communicated with the pin 3 of the transistor M4, the pin 2 and pin 3 of the transistor M3 are communicated, the current source I2 is communicated with the pin 2 of the transistor M3, the comparison circuit is communicated with the pin 2 of the transistor M4 and the current source I2, the pin 1 of the transistor M6 and the pin 1 of the transistor M5 are connected with a power supply end, and the comparison circuit and the current source I2 are connected with a ground end.
4. The fast response over-current detection protection circuit of claim 3, characterized in that, the comparison circuit comprises a resistor R2 and a reference voltage VREF, the two ends of the resistor R2 are respectively communicated with the pin 2 of the transistor M4 and the current source I2, the resistor R2 and the pin 2 of the transistor M4 are connected with the reference voltage VREF, and the reference voltage VREF is communicated with the control logic module.
5. The fast response over-current detection protection circuit of claim 3, characterized in that, The comparison circuit comprises a current source I3 and a Schmitt trigger, two ends of the current source I3 are communicated with the current source I2 and a pin 2 of the transistor M4 respectively, the Schmitt trigger is connected between the current source I3 and the pin 2 of the transistor M4, and the Schmitt trigger is communicated with the control logic module.