Chip type low-natural capacitance piezoresistor

Abstract

The utility model discloses a chip type low inherent capacitance pressure sensitive resistor, including: resistor body, shell and foot sleeve, shell is graphene shell, the shell wraps the outer wall of resistor body, the bottom of resistor body is integrated with cylindrical foot, the top of foot sleeve is provided with cylindrical foot groove, the bottom of cylindrical foot is inserted in the cylindrical foot groove, and the bottom of the cylindrical foot is inserted in the cylindrical foot groove. A pin is arranged at the bottom of the pin sleeve and connected with the bottom of the cylindrical pin groove, a slot is formed in the top of the shell and penetrates through the shell, the cylindrical pin can be correspondingly inserted into the slot, and the cylindrical pin is connected with the resistor body when being inserted into the slot. According to the chip type low-inherent-capacitance piezoresistor, a plurality of structures capable of being connected are arranged, modular design is adopted, the size and the weight of a single piezoresistor are reduced, and the chip type low-inherent-capacitance piezoresistor is combined to adapt to application with various space requirements; by arranging the tooth grooves of the pin sleeves and the gear teeth of the pins, the pins are of a rotatable structure, the installation process is simplified, and different installation space requirements are met.

Description

Technical Field

[0001] This utility model relates to the technical field of chip-type low intrinsic capacitance varistors, specifically a chip-type low intrinsic capacitance varistor. Background Technology

[0002] Chip-type low-intrinsic-capacitance varistors are a special type of varistor that features low intrinsic capacitance and effectively absorbs surges in high-frequency circuits, while avoiding the freewheeling current problems associated with combinations of discharge tubes and varistors. This type of resistor is designed to improve the reliability of circuit protection, reduce production costs, and provide convenient installation.

[0003] Chinese Patent Publication No. CN212934284U, with an authorization announcement date of April 9, 2021, discloses a chip-type low intrinsic capacitance varistor. The application includes a varistor and a second housing. The second housing is disposed on the outer side of the varistor, and a first locking block is slidably connected to the inner side of the second housing. A fixing block is fixedly connected to one end of the first locking block, and a screw is screwed to the inner side of the fixing block. The first housing is fixedly connected to the outer side of the second housing, and a lead block is disposed on the inner side of the first housing. A rotating block is rotatably connected to the outer side of the lead block. A rotating shaft is rotatably connected to the inner sides of both the lead block and the rotating block. A limit block is disposed on the outer side of the rotating shaft. In this invention, the cooperation of the limit block and the rotating shaft changes the orientation of the connection hole by rotating the rotating block, and the sliding of the second locking block changes the distance of the connection hole, enabling convenient installation of the varistor, not limited by installation space, and increasing the practicality of the device.

[0004] As can be seen from the above application, existing chip-type low intrinsic capacitance varistors are large in size and weight, which limits their use in applications with strict space requirements. Therefore, a chip-type low intrinsic capacitance varistor is proposed. Utility Model Content

[0005] The purpose of this invention is to provide a chip-type low intrinsic capacitance varistor. By setting a structure that allows multiple connections, the size and weight of a single varistor are reduced, and it can be combined to adapt to various applications with different space requirements. By setting the grooves of the foot sleeve and the teeth of the pin, the pin becomes a rotatable structure, simplifying the installation process and adapting to different installation space requirements. By setting temperature sensors, current sensors, and voltage sensors, and integrating intelligent monitoring circuits, the operating status of the varistor is monitored in real time, and protection or alarm is provided when an abnormality is detected.

[0006] To achieve the above objectives, the main technical solution adopted by this utility model is as follows: a chip-type low intrinsic capacitance varistor, comprising: a resistive element, a shell, and a foot sleeve. The shell is a graphene shell, which wraps around the outer wall of the resistive element. The bottom of the resistive element has an integrally formed cylindrical foot. The outer wall of the cylindrical foot is provided with a limiting ring. The top of the foot sleeve has a cylindrical foot groove, and the bottom of the cylindrical foot is inserted into the cylindrical foot groove. The cylindrical foot groove is provided with a limiting groove, and the limiting ring is correspondingly fitted into the limiting groove. The bottom of the foot sleeve is provided with a pin, which is connected to the bottom of the cylindrical foot groove. The top of the shell has a slot, which penetrates the shell. The cylindrical foot can be inserted into the slot. The slot is provided with a plug, and the cylindrical foot is connected to the resistive element when inserted into the slot.

[0007] Preferably, the inner wall of the foot cover is provided with a toothed groove, and the pin is provided with a tooth on the outer wall inside the foot cover, and the toothed groove and the tooth are arranged alternately.

[0008] Preferably, there are at least eight sets of tooth grooves and toothed gears, and the eight sets of tooth grooves and toothed gears are distributed at equal angles.

[0009] Preferably, the surface of the foot cover is provided with anti-slip vertical grooves.

[0010] Preferably, the outer casing has an arc-shaped groove around the slot.

[0011] Preferably, a temperature sensor is installed on the inner wall of the housing.

[0012] Preferably, a current sensor is installed on the inner wall of the housing.

[0013] Preferably, a voltage sensor is installed on the inner wall of the housing.

[0014] Compared with the prior art, the beneficial effects of this utility model are:

[0015] This chip-type low intrinsic capacitance varistor features a modular design that allows for multiple connections, reducing the size and weight of individual varistors and enabling combination to adapt to various space requirements. The toothed feet and serrated leads allow for rotatable pins, simplifying installation and accommodating different installation space needs. Integrated intelligent monitoring circuitry, incorporating temperature, current, and voltage sensors, monitors the varistor's operating status in real time and provides protection or alarms upon detecting anomalies. Attached Figure Description

[0016] Figure 1 This is a three-dimensional schematic diagram of the chip-type low intrinsic capacitance varistor of this utility model;

[0017] Figure 2 This is a schematic front cross-sectional view of the chip-type low intrinsic capacitance varistor of this utility model.

[0018] Figure 3 This is a side cross-sectional view of the chip-type low intrinsic capacitance varistor of this utility model;

[0019] Figure 4 This is a side cross-sectional view of the chip-type low intrinsic capacitance varistor of this utility model;

[0020] Figure 5 This is a front cross-sectional view of the connection of multiple varistors according to this utility model.

[0021] In the diagram: 10, Resistor; 11, Cylindrical foot; 111, Limiting ring; 20, Housing; 21, Slot; 22, Insert; 23, Arc-shaped groove; 30, Foot sleeve; 301, Tooth groove; 31, Cylindrical foot groove; 311, Limiting groove; 32, Pin; 321, Gear tooth; 40, Temperature sensor; 50, Current sensor; 60, Voltage sensor. Detailed Implementation

[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0023] See Figure 1-Figure 5 This embodiment provides a chip-type low intrinsic capacitance varistor, including: a resistor body 10, a housing 20, and a lead sleeve 30. The housing 20 is a graphene housing, which wraps around the outer wall of the resistor body 10. A cylindrical lead 11 is integrally formed at the bottom of the resistor body 10. A limiting ring 111 is provided on the outer wall of the cylindrical lead 11. A cylindrical lead groove 31 is opened at the top of the lead sleeve 30, and the bottom of the cylindrical lead 11 is inserted into the cylindrical lead groove 31. A limiting groove 31 is provided in the cylindrical lead groove 31. 1. The limiting ring 111 and the limiting groove 311 are fitted together. The bottom of the foot cover 30 is provided with a pin 32, which is connected to the bottom of the cylindrical foot groove 31. The inner wall of the foot cover 30 is provided with a toothed groove 301. The pin 32 is provided with a wheel tooth 321 on the outer wall inside the foot cover 30. The toothed groove 301 and the wheel tooth 321 are arranged alternately. There are at least eight sets of toothed grooves 301 and wheel teeth 321. The eight sets of toothed grooves 301 and wheel teeth 321 are distributed at equal angles. The surface of the foot cover 30 is provided with anti-slip vertical lines.

[0024] The top of the outer casing 20 has a slot 21 that penetrates the outer casing 20. The cylindrical foot 11 can be inserted into the slot 21. The slot 21 has a plug 22 inside. When the cylindrical foot 11 is inserted into the slot 21, it is connected to the resistor 10. The outer casing 20 has an arc-shaped groove 23 around the slot 21. A temperature sensor 40, a current sensor 50, and a voltage sensor 60 are installed on the inner wall of the outer casing 20.

[0025] Structural principle:

[0026] like Figure 1-Figure 5 As shown, during use, by rotating pin 32, the gear teeth 321 move between the tooth grooves 301, which can adjust the fixed angle of pin 32, pull out the plug 22, and then pull out the foot sleeve 30 of another chip-type low inherent capacitance varistor, and the two chip-type low inherent capacitance varistors are plugged in accordingly.

[0027] In summary, this chip-type low intrinsic capacitance varistor, through its modular design and multi-connection structure, reduces the size and weight of a single varistor, allowing for combination to adapt to various space requirements. The rotatable pins, achieved by the grooves 301 on the foot sleeve 30 and the teeth 321 on the pins 32, simplify installation and accommodate different installation space needs. Furthermore, the integrated intelligent monitoring circuitry, incorporating a temperature sensor 40, a current sensor 50, and a voltage sensor 60, monitors the varistor's operating status in real time and provides protection or alarms upon detecting abnormalities.

[0028] All parts not described in this utility model are the same as or can be implemented using existing technology. Although embodiments of this utility model have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this utility model, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A chip-type low intrinsic capacitance varistor, characterized in that, include: The resistor (10), the outer shell (20), and the foot sleeve (30) are provided. The outer shell (20) is a graphene shell and is wrapped around the outer wall of the resistor (10). The bottom of the resistor (10) is integrally formed with a cylindrical foot (11). The outer wall of the cylindrical foot (11) is provided with a limiting ring (111). The top of the foot sleeve (30) is provided with a cylindrical foot groove (31). The bottom of the cylindrical foot (11) is inserted into the cylindrical foot groove (31). The cylindrical foot groove (31) is provided with a limiting groove (311). The limiting ring (111) is fitted into the limiting groove (311). The bottom of the foot sleeve (30) is provided with a pin (32). The pin (32) is connected to the bottom of the cylindrical foot groove (31). The top of the outer shell (20) is provided with a slot (21). The slot (21) passes through the outer shell (20). The cylindrical foot (11) can be inserted into the slot (21). The slot (21) is provided with a plug (22). When the cylindrical foot (11) is inserted into the slot (21), it is connected to the resistor (10).

2. A chip-type low intrinsic capacitance varistor according to claim 1, characterized in that: The inner wall of the foot cover (30) is provided with a toothed groove (301), and the pin (32) is provided with a toothed tooth (321) on the outer wall inside the foot cover (30). The toothed groove (301) and the toothed tooth (321) are arranged alternately.

3. A chip-type low intrinsic capacitance varistor according to claim 2, characterized in that: The number of tooth grooves (301) and the number of gear teeth (321) are each provided with at least eight sets, and the eight sets of tooth grooves (301) and gear teeth (321) are distributed at equal angles.

4. A chip-type low intrinsic capacitance varistor according to claim 2, characterized in that: The surface of the foot cover (30) is provided with anti-slip vertical grooves.

5. A chip-type low intrinsic capacitance varistor according to claim 1, characterized in that: The outer casing (20) has an arc-shaped groove (23) around the slot (21).

6. A chip-type low intrinsic capacitance varistor according to claim 5, characterized in that: A temperature sensor (40) is installed on the inner wall of the housing (20).

7. A chip-type low intrinsic capacitance varistor according to claim 6, characterized in that: A current sensor (50) is installed on the inner wall of the housing (20).

8. A chip-type low intrinsic capacitance varistor according to claims 1-7, characterized in that: A voltage sensor (60) is installed on the inner wall of the housing (20).

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