Photovoltaic cell and photovoltaic system

Abstract

The utility model provides a photovoltaic cell and a photovoltaic system. According to the utility model, at least one copper indium gallium selenium thin film cell unit layer is added on the backlight surfaces of the perovskite cell unit layer and the crystalline silicon cell unit layer, so that the problem of low utilization efficiency of light resources on the back surface of the crystalline silicon-perovskite laminated cell is effectively solved. According to the design, low-energy photons which are not absorbed by the crystalline silicon cell originally can generate current by utilizing long-wave-band photons on the back surface, so that the overall photoelectric conversion efficiency of the cell is improved, higher power output is realized, and the power generation performance under various illumination conditions is enhanced.

Description

Technical Field

[0001] This utility model relates to the field of photovoltaic technology, specifically to a photovoltaic cell and a photovoltaic system. Background Technology

[0002] A photovoltaic cell is a device that directly converts light energy into electrical energy, and its working principle is based on the photovoltaic effect. When photons shine on the surface of the semiconductor material of a photovoltaic cell, the energy of the photons excites electrons, thereby forming electron-hole pairs within the material. Through an internal electric field, the electrons and holes are separated and guided to an external circuit, thus generating an electric current.

[0003] In related technologies, there is a technical problem of low back-side light resource utilization efficiency for crystalline silicon perovskite tandem solar cells. Summary of the Invention

[0004] The purpose of this invention is to overcome the above-mentioned technical deficiencies and provide a photovoltaic cell and photovoltaic system to solve the technical problem of low back-side light resource utilization efficiency for crystalline silicon perovskite tandem cells.

[0005] To achieve the above-mentioned technical objectives, the present invention adopts the following technical solution:

[0006] In a first aspect, this utility model provides a photovoltaic cell, the cell comprising:

[0007] A perovskite solar cell unit layer is disposed on top;

[0008] A crystalline silicon solar cell layer is disposed on the back surface side of the perovskite solar cell layer.

[0009] At least one copper indium gallium selenide thin-film battery cell layer is disposed on the backlight side of the crystalline silicon battery cell layer.

[0010] Furthermore, the perovskite solar cell layer includes at least:

[0011] First transparent conductive film;

[0012] The first upper electrode is disposed on the light-facing side of the first transparent conductive film;

[0013] The first hole transport layer is disposed on the back side of the first transparent conductive film;

[0014] The first perovskite light absorption layer is disposed on the back side of the first hole transport layer.

[0015] The first electron transport layer is disposed on the back side of the first perovskite light absorption layer.

[0016] The bottom charge transport layer is disposed on the back side of the first electron transport layer.

[0017] Furthermore, the bottom charge transport layer includes:

[0018] A second transparent conductive film is disposed on the back side of the first electron transport layer;

[0019] The second upper electrode is disposed on the back side of the second transparent conductive film.

[0020] Furthermore, the bottom charge transport layer includes:

[0021] The first carrier transport layer is disposed on the back side of the first electron transport layer.

[0022] Furthermore, the copper indium gallium selenide thin-film battery cell layer includes at least:

[0023] Window layer;

[0024] A buffer layer is disposed on the backlight side of the window layer;

[0025] A CIGS absorption layer is disposed on the back side of the buffer layer;

[0026] The first lower electrode is disposed on the back side of the CIGS absorption layer.

[0027] Furthermore, the copper indium gallium selenide thin-film battery cell layer also includes:

[0028] The first top charge transport layer is disposed on the light-facing side of the window layer.

[0029] Furthermore, the first top charge transport layer:

[0030] A third transparent conductive film is disposed on the light-facing side of the window layer;

[0031] The second lower electrode is disposed on the light-facing side of the third transparent conductive film.

[0032] Furthermore, the crystalline silicon cell layer includes at least:

[0033] Fourth transparent conductive film;

[0034] A P-type doped amorphous silicon layer is disposed on the back side of the fourth transparent conductive film.

[0035] The first intrinsic amorphous silicon layer is disposed on the back side of the P-type doped amorphous silicon layer;

[0036] An N-type silicon substrate is disposed on the back side of the first intrinsic amorphous silicon layer;

[0037] The second intrinsic amorphous silicon layer is disposed on the back side of the N-type silicon substrate;

[0038] An N-type doped amorphous silicon layer is disposed on the back side of the second intrinsic amorphous silicon layer;

[0039] The fifth transparent conductive film is disposed on the back side of the N-type doped amorphous silicon layer.

[0040] Furthermore, the crystalline silicon cell layer also includes:

[0041] A first intermediate electrode is disposed on the light-facing side of the fourth transparent conductive film; and / or

[0042] The second intermediate electrode is disposed on the back side of the fifth transparent conductive film.

[0043] Secondly, this utility model provides a photovoltaic system, which includes a photovoltaic cell as described above.

[0044] Beneficial effects:

[0045] This invention effectively solves the problem of low back-side light resource utilization efficiency in crystalline silicon-perovskite tandem solar cells by adding at least one copper indium gallium selenide (CIGS) thin-film solar cell layer to the back surface of both the perovskite and crystalline silicon solar cell layers. This design utilizes long-wavelength photons from the back surface, enabling low-energy photons that were not originally absorbed by the crystalline silicon cell to generate current, thus improving the overall photoelectric conversion efficiency of the cell, achieving higher power output, and enhancing power generation performance under various lighting conditions. Attached Figure Description

[0046] Figure 1 This is a schematic diagram of the structure of a photovoltaic cell provided in an embodiment of the present invention;

[0047] Figure 2 This is a schematic diagram of the structure of a photovoltaic cell provided in an embodiment of the present invention;

[0048] Figure 3 This is a schematic diagram of the structure of a photovoltaic cell provided in an embodiment of the present invention;

[0049] Figure 4 This is a schematic diagram of the structure of a photovoltaic cell provided in an embodiment of the present invention;

[0050] In the attached image:

[0051] First upper electrode - 12, first transparent conductive film - 111, first hole transport layer - 112, first perovskite light absorption layer - 113, first electron transport layer - 114, second transparent conductive film - 115, first carrier transport layer - 116, second upper electrode - 13, first intermediate electrode - 32, fourth transparent conductive film - 311, P-type doped amorphous silicon layer - 312, N-type silicon substrate - 313, N-type doped amorphous silicon layer - 314, fifth transparent conductive film - 315, first intrinsic amorphous silicon layer - 316, second intrinsic amorphous silicon layer - 317, second intermediate electrode - 33, second lower electrode - 23, window layer - 211, buffer layer - 212, CIGS absorption layer - 213, third transparent conductive film - 214, first lower electrode - 22. Detailed Implementation

[0052] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0053] In related technologies, due to the rapid depletion of conventional energy reserves such as fossil fuels and natural gas, and the resulting environmental problems, human demand for renewable and clean energy is growing. Renewable energy sources such as solar, hydro, wind, biomass, and geothermal energy are being widely researched and applied to address the challenges posed by traditional energy sources. Among these, solar energy, due to its green, clean, widely distributed, and sustainable characteristics, is considered one of the most promising renewable energy options. Solar photovoltaic power generation is one of the main renewable energy systems currently, and its core component is the solar cell, which can directly convert solar energy into electrical energy using the photovoltaic effect. Therefore, research on solar cells is of great significance for promoting and applying renewable energy, and for facilitating national energy transition and sustainable development.

[0054] Perovskite-silicon tandem solar cell technology is a novel solar cell technology that combines perovskite materials with traditional crystalline silicon materials to improve photoelectric conversion efficiency. Currently, perovskite-silicon solar cells typically fabricate perovskite on the light-receiving surface of the front side of the crystalline silicon cell to fully utilize different wavelengths of light from the front side and enhance the cell's conversion efficiency.

[0055] However, the light resources on the back side of outdoor photovoltaic systems cannot be ignored. This is especially true for systems with tracking systems, where the back side of the photovoltaic modules offers abundant light resources. Currently, most tandem solar cells are still based on perovskite / crystalline silicon, perovskite / metal, or perovskite / perovskite layers. Crystalline silicon cells have a bandgap of 1.12 eV. Long-wavelength photons with energies below 1.12 eV are insufficient to excite charge carriers in crystalline silicon cells; these photons account for approximately 30% and cannot be utilized, resulting in a certain degree of wasted light resources.

[0056] In summary, among the relevant technologies, there is a technical problem of low back-side light resource utilization efficiency for crystalline silicon perovskite tandem solar cells.

[0057] like Figure 1 , Figure 2 , Figure 3 as well as Figure 4 As shown, this embodiment provides a photovoltaic cell, which may include:

[0058] The perovskite solar cell cell layer 1 is located on top.

[0059] In this embodiment, the perovskite cell unit layer 1 is the top unit of the stacked photovoltaic cell structure, located on the light-facing side of the cell, and is mainly used to absorb short-wavelength high-energy photons in sunlight.

[0060] Perovskite materials have excellent photoelectric properties and a wide band gap, making them suitable for absorbing high-energy photons in the visible spectrum and efficiently converting them into electrical energy.

[0061] Understandably, due to the tunable bandgap characteristics of perovskite materials, the perovskite solar cell layer 1 plays a role in screening and initially utilizing solar energy in the stacked structure. It ensures that some high-energy photons are directly converted into electrical energy, while the remaining long-wavelength photons are transmitted to the lower crystalline silicon solar cell layer 3 and copper indium gallium selenide (CIGS) thin-film solar cell layer 2 for further absorption and conversion. By placing the perovskite solar cell layer 1 on the top layer, its advantages of high light absorption efficiency and high voltage output can be effectively utilized, thereby improving the overall photoelectric conversion efficiency of the stacked solar cell.

[0062] In this embodiment, the perovskite solar cell layer 1 may include, in sequence, a transparent conductive layer, a hole transport layer, a perovskite light absorption layer, and an electron transport layer.

[0063] A crystalline silicon solar cell layer 3 is disposed on the back surface side of the perovskite solar cell layer 1.

[0064] In this embodiment, the crystalline silicon cell unit layer 3 is located on the back side of the perovskite cell unit layer 1 and is the middle layer in the stacked structure. It is mainly responsible for absorbing photons in the mid-wavelength portion of sunlight, especially visible light and part of infrared light. The crystalline silicon cell has a band gap of 1.12 eV, which is suitable for absorbing photons with longer wavelengths, thus forming a complementary spectral absorption with the perovskite layer.

[0065] Understandably, placing the crystalline silicon cell unit layer 3 on the back surface of the perovskite layer not only utilizes the mid-wavelength photons transmitted through the perovskite layer but also compensates for the perovskite cell's insufficient absorption of mid- and long-wavelength light. Due to the high current output advantage of crystalline silicon, it helps improve the overall current output in the stacked structure. Through synergy with the perovskite layer, the crystalline silicon cell unit layer 3 achieves more comprehensive solar spectrum absorption, effectively improving the photoelectric conversion efficiency of the stacked cell while ensuring a high current density, enabling the cell to maintain stable output under various lighting conditions.

[0066] At least one copper indium gallium selenide thin-film battery cell layer 2 is disposed on the backlight side of the crystalline silicon battery cell layer 3.

[0067] In this embodiment, the copper indium gallium selenide (CIGS) thin-film solar cell layer 2 is disposed on the back surface of the crystalline silicon solar cell layer 3. The main purpose is to make full use of the back light resources, especially long-wavelength, low-energy photons. This design effectively solves the shortcomings of traditional perovskite-crystalline silicon tandem solar cells in the utilization of back light resources and avoids the problem of wasting back light resources.

[0068] Crystalline silicon solar cells, with a band gap of 1.12 eV, can only effectively absorb short-wavelength, high-energy photons, and their absorption of long-wavelength (below 1.12 eV) photons is poor. These photons account for about 30% of sunlight, and if not utilized, the conversion efficiency will be affected. Copper indium gallium selenide (CIGS) thin-film solar cells have an even lower band gap of about 1.0 eV, which can absorb these long-wavelength photons and convert them into electrical energy, thus making full use of the back-side light resources.

[0069] Understandably, by adding at least one layer of copper indium gallium selenide (CIGS) thin-film solar cell unit 2 to the back surface of crystalline silicon solar cells, long-wavelength photons are no longer wasted but are converted into current output, significantly improving the overall conversion efficiency of photovoltaic cells. This design not only compensates for the waste of light resources on the back surface of perovskite-crystalline silicon tandem solar cells but also greatly enhances the performance of the cells under low-light conditions, further improving the power generation efficiency of the cells in all-weather, full-spectrum environments, and greatly increasing the power density and application value of the cells.

[0070] In this embodiment, one or more copper indium gallium selenide (CIGS) thin-film battery cell layers 2 can be provided. For example, three layers of CIGS thin-film battery cell layers 2 can be provided.

[0071] This embodiment effectively solves the problem of wasted back-side light resources in crystalline silicon-perovskite tandem solar cells by adding at least one copper indium gallium selenide (CIGS) thin-film solar cell layer to the back surface of both the perovskite and crystalline silicon solar cell layers. This design utilizes long-wavelength photons from the back surface, enabling low-energy photons that were not originally absorbed by the crystalline silicon cell to generate current, thus improving the overall photoelectric conversion efficiency of the cell, achieving higher power output, and enhancing power generation performance under various lighting conditions.

[0072] In some embodiments, the perovskite solar cell layer 1 may include:

[0073] First transparent conductive film 111.

[0074] In this embodiment, the first transparent conductive film 111 may be a transparent conductive film made of indium tin oxide.

[0075] In this embodiment, the first transparent conductive film 111 may be a transparent conductive film made of fluorine-doped tin oxide.

[0076] In this embodiment, the first transparent conductive film 111 can also be a transparent conductive film made of zinc oxide doped with aluminum.

[0077] The first upper electrode 12 is disposed on the light-facing side of the first transparent conductive film 111.

[0078] In this embodiment, the first upper electrode 12 may be made of a metal electrode material.

[0079] In this embodiment, the first upper electrode 12 may also be made of a transparent conductive material.

[0080] In this embodiment, the first upper electrode 12 may also be a carbon-based electrode.

[0081] The first hole transport layer 112 is disposed on the back side of the first transparent conductive film 111.

[0082] In this embodiment, the first hole transport layer 112 may be made of polytriphenylamine.

[0083] In this embodiment, the first hole transport layer 112 may also be made of nickel oxide.

[0084] In this embodiment, the first hole transport layer 112 may also be made of titanium dioxide doped with vanadium.

[0085] The first perovskite light absorption layer 113 is disposed on the back side of the first hole transport layer 112.

[0086] In this embodiment, the first perovskite light-absorbing layer 113 may be made of perovskite compounds, such as organic-inorganic hybrid perovskite or all-inorganic perovskite, etc.

[0087] The first electron transport layer 114 is disposed on the back side of the first perovskite light absorption layer 113.

[0088] In this embodiment, the first electron transport layer 114 may be made of titanium dioxide.

[0089] In this embodiment, the first electron transport layer 114 may also be made of zinc oxide.

[0090] In this embodiment, the first electron transport layer 114 may also be made of tin oxide.

[0091] The bottom charge transport layer is disposed on the back side of the first electron transport layer 114.

[0092] In this embodiment, the bottom charge transport layer is located at the very bottom of the entire perovskite cell layer 1, adjacent to the next cell layer or back electrode. Its main function is to collect and conduct charge carriers (charges) from the perovskite light absorption layer and efficiently transfer them to the next cell layer or electrode, enabling current flow between different cell layers.

[0093] In this embodiment, the bottom charge transport layer can be a layer made of an electron transport material, a layer made of a hole transport material, a layer made of a bipolar material, etc.

[0094] This embodiment achieves more efficient photoelectric conversion by introducing a multilayer structure into the perovskite solar cell unit layer 1, including a transparent conductive film, a hole transport layer, a perovskite light absorption layer, an electron transport layer, and a charge transport layer. The first transparent conductive film 111 is disposed on the light-facing side to ensure that photons enter the cell and successfully excite charge pairs. The first hole transport layer 112 and the first electron transport layer 114 optimize the conduction paths of holes and electrons, respectively, reducing recombination losses and improving charge separation efficiency. The design of the bottom charge transport layer further enhances charge collection and conduction. This layered structure effectively improves the photoelectric conversion efficiency of the perovskite layer, enabling the cell to fully utilize incident light, thereby improving the power output and low-light performance of the entire stacked cell.

[0095] In some embodiments, the bottom charge transport layer includes:

[0096] The second transparent conductive film 115 is disposed on the back side of the first electron transport layer 114.

[0097] In this embodiment, the second transparent conductive film 115 may be a transparent conductive film made of indium tin oxide.

[0098] In this embodiment, the second transparent conductive film 115 may be a transparent conductive film made of fluorine-doped tin oxide.

[0099] In this embodiment, the second transparent conductive film 115 can also be a transparent conductive film made of zinc oxide doped with aluminum.

[0100] The second upper electrode 13 is disposed on the back side of the second transparent conductive film 115.

[0101] In this embodiment, the second upper electrode 13 may be made of a metal electrode material.

[0102] In this embodiment, the second upper electrode 13 may also be made of a transparent conductive material.

[0103] In this embodiment, the second upper electrode 13 may also be a carbon-based electrode.

[0104] In this embodiment, the bottom charge transport layer consists of a second transparent conductive film 115 and a second upper electrode 13, achieving the dual functions of efficient charge collection and conduction. The second transparent conductive film 115 is located on the back surface of the first electron transport layer 114, ensuring efficient charge transfer between the perovskite solar cell and the lower-layer components, minimizing charge loss. Simultaneously, the second upper electrode 13 is directly disposed on the back surface of the second transparent conductive film, optimizing the electrode connection layout and giving the entire cell structure better conductivity and stability, thereby improving the overall photoelectric conversion efficiency and power output of the cell. This design effectively utilizes the bidirectional light transmission and conductivity characteristics of the transparent conductive film, contributing to improved light absorption and charge transport efficiency of the cell.

[0105] In some embodiments, the bottom charge transport layer includes:

[0106] The first carrier transport layer 116 is disposed on the back side of the first electron transport layer 114.

[0107] In this embodiment, the first carrier transport layer 116 may be made of titanium dioxide.

[0108] In this embodiment, the first carrier transport layer 116 may also be made of nickel oxide.

[0109] In this embodiment, the first carrier transport layer 116 may be made of polytriphenylamine.

[0110] In this embodiment, the bottom charge transport layer includes a first carrier transport layer 116, disposed on the backlight side of the first electron transport layer 114. This design allows charges from the perovskite light-absorbing layer to be efficiently transported to the first carrier transport layer 116 via the first electron transport layer 114, thereby reducing recombination losses at the interface. The first carrier transport layer 116 acts as a bridge for charge collection and conduction in the entire battery structure, facilitating faster guidance of charges to lower components or electrodes, thus improving the overall photoelectric conversion efficiency of the battery. Simultaneously, the addition of this layer enhances energy level matching between layers and optimizes charge flow paths, enabling the battery to maintain stable current output under different illumination conditions, thereby improving the battery's low-light performance and stability.

[0111] In some embodiments, the copper indium gallium selenide thin-film battery cell layer 2 includes at least:

[0112] Window layer 211.

[0113] In this embodiment, the window layer 211 is located at the top of the copper indium gallium selenide thin-film battery cell layer 2. It is mainly used to allow incident light to penetrate and enter the CIGS absorption layer 213, and at the same time has conductivity to collect and conduct charges.

[0114] In this embodiment, the window layer 211 may be made of zinc oxide.

[0115] In this embodiment, the window layer 211 may also be made of tin oxide doped with fluorine.

[0116] In this embodiment, the window layer 211 may also be made of indium tin oxide.

[0117] In this embodiment, the window layer 211 has high light transmittance and high conductivity, ensuring that photons can smoothly enter the battery structure without being blocked, while conducting charge without increasing resistance.

[0118] A buffer layer 212 is disposed on the backlight side of the window layer 211.

[0119] In this embodiment, the buffer layer 212 is located between the window layer 211 and the CIGS absorber layer 213, serving to passivate the interface and separate charges. It can reduce interface defects between the window layer 211 and the CIGS absorber layer 213, thereby reducing the carrier recombination rate and improving the photoelectric conversion efficiency of the battery.

[0120] In this embodiment, the buffer layer 212 may be made of cadmium sulfide.

[0121] In this embodiment, the buffer layer 212 may be made of zinc oxide.

[0122] In this embodiment, the buffer layer 212 may be made of titanium oxide.

[0123] In this embodiment, the buffer layer 212 has a suitable band gap (2.0-2.5eV) to ensure that it does not absorb or block photons from the window layer 211, while having good charge conductivity to reduce charge recombination at the interface.

[0124] CIGS absorption layer 213 is disposed on the back side of the buffer layer 212.

[0125] In this embodiment, the CIGS absorption layer 213 is mainly responsible for absorbing long-wavelength photons and using their energy to generate electron-hole pairs.

[0126] In this embodiment, the CIGS absorption layer 213 has a high light absorption coefficient, enabling it to absorb sufficient light energy even with a relatively thin film thickness. Adjusting the gallium doping amount can modulate the band gap, allowing the absorption layer to adapt to different spectral ranges.

[0127] The first lower electrode 22 is disposed on the back side of the CIGS absorption layer 213.

[0128] This embodiment effectively improves photoelectric conversion efficiency and battery stability by introducing a layered structure of window layer 211, buffer layer 212, and CIGS absorber layer 213 into the copper indium gallium selenide (CIGS) thin-film battery cell layer 2. Window layer 211, as the top layer, possesses excellent transparency and conductivity, ensuring that most photons penetrate to the CIGS absorber layer. Buffer layer 212, located between the window layer and the CIGS absorber layer, acts as an interface passivation layer, reducing interface defects and recombination losses, thereby improving carrier separation efficiency. CIGS absorber layer 213 is responsible for absorbing long-wavelength photons and generating charge pairs, while the first lower electrode 22 is located on the back surface of the CIGS absorber layer for efficient charge collection and discharge. The overall structure optimizes photon absorption and charge conduction, reduces charge recombination losses, effectively improves the battery's photoelectric conversion efficiency, and enhances the battery's low-light performance and stability.

[0129] In some embodiments, the copper indium gallium selenide thin-film battery cell layer 2 further includes:

[0130] The first top charge transport layer is disposed on the light-facing side of the window layer 211.

[0131] In this embodiment, a first top charge transport layer is added to the copper indium gallium selenide (CIGS) thin-film battery cell layer 2, disposed on the light-facing side of the window layer 211. This design further optimizes the charge collection and conduction efficiency of the battery. Simultaneously, the addition of this top charge transport layer creates a smoother charge transport path, ensuring higher current output and lower internal resistance. This structure significantly improves the overall photoelectric conversion efficiency of the battery by processing the charge before photon incidence, exhibiting superior performance, especially in low-light and complex lighting environments.

[0132] In some embodiments, the first top charge transport layer:

[0133] A third transparent conductive film 214 is disposed on the light-facing side of the window layer 211;

[0134] In this embodiment, the third transparent conductive film 214 may be a transparent conductive film made of indium tin oxide.

[0135] In this embodiment, the third transparent conductive film 214 may be a transparent conductive film made of fluorine-doped tin oxide.

[0136] In this embodiment, the third transparent conductive film 214 can also be a transparent conductive film made of zinc oxide doped with aluminum.

[0137] The second lower electrode 23 is disposed on the light-facing side of the third transparent conductive film 214.

[0138] In this embodiment, the first top charge transport layer consists of a third transparent conductive film 214 and a second lower electrode 23, further enhancing the charge conduction and light transmission of the battery. The third transparent conductive film 214, located on the light-facing side of the window layer 211, has high transmittance and conductivity, allowing photons to efficiently pass through and enter the battery structure, while simultaneously conducting charge rapidly and reducing charge recombination losses. The second lower electrode 23, located on the light-facing side of the third transparent conductive film, acts as a direct charge collector, efficiently transferring the generated charge to the external circuitry. This structure, through a dual-layer design, achieves dual optimization of photon transmission and charge conduction, significantly improving photoelectric conversion efficiency and enabling the battery to exhibit higher current output and more stable performance under various lighting conditions.

[0139] In some embodiments, the crystalline silicon cell layer 3 includes at least:

[0140] Fourth transparent conductive film 311;

[0141] A p-type doped amorphous silicon layer 312 is disposed on the back side of the fourth transparent conductive film 311.

[0142] The first intrinsic amorphous silicon layer 316 is disposed on the back surface side of the P-type doped amorphous silicon layer 312.

[0143] An N-type silicon substrate 313 is disposed on the back side of the first intrinsic amorphous silicon layer 316.

[0144] The second intrinsic amorphous silicon layer 317 is disposed on the back side of the N-type silicon substrate 313.

[0145] An N-type doped amorphous silicon layer 314 is disposed on the backlight side of the second intrinsic amorphous silicon layer 317.

[0146] The fifth transparent conductive film 315 is disposed on the back side of the N-type doped amorphous silicon layer 314.

[0147] In this embodiment, the crystalline silicon solar cell unit layer employs a multi-layer structure design, including a transparent conductive film, a doped layer, an intrinsic amorphous silicon layer, and a silicon substrate, optimizing light absorption and charge transport performance. A fourth transparent conductive film 311 and a fifth transparent conductive film 315 are respectively disposed on the light-facing and backlight-facing surfaces of the unit layer, ensuring effective photon transmission and achieving efficient charge collection and extraction. The P-type doped amorphous silicon layer 312 and the N-type doped amorphous silicon layer 314 enhance the conduction capabilities of holes and electrons, respectively, while the two intrinsic amorphous silicon layers 316 and 317 serve as charge separation and interface passivation layers, effectively reducing recombination losses. The N-type silicon substrate 313, as the main light absorption layer, is responsible for converting mid-wavelength photons into electrical energy. This layered structure not only improves spectral absorption efficiency and charge collection capability but also optimizes energy level matching and carrier transport paths, thereby significantly enhancing the photoelectric conversion efficiency and overall stability of the crystalline silicon solar cell unit.

[0148] In some embodiments, the crystalline silicon cell layer 3 further includes:

[0149] A first intermediate electrode 32 is disposed on the light-facing side of the fourth transparent conductive film 311; and / or a second intermediate electrode 33 is disposed on the back-facing side of the fifth transparent conductive film 315.

[0150] In this embodiment, electrodes can be provided on the top layer of the crystalline silicon cell unit layer 3. In this embodiment, electrodes can also be provided on the bottom layer of the crystalline silicon cell unit layer 3. In this embodiment, electrodes can be provided on both the top and bottom layers of the crystalline silicon cell unit layer 3 at the same time, so as to realize the series and parallel connection of each unit layer inside the battery and meet the requirements of different voltages and currents.

[0151] This embodiment enhances the electrical connection flexibility of each cell layer within the battery by setting electrodes (first intermediate electrode 32 and second intermediate electrode 33) on the top and / or bottom layers of the crystalline silicon cell cell layer 3, thereby meeting the voltage and current requirements of different application scenarios. The first intermediate electrode 32 is located on the light-facing side of the fourth transparent conductive film 311, allowing the top layer to be directly connected to the upper cell cell layer, achieving efficient charge collection and discharge. The second intermediate electrode 33 is located on the back-facing side of the fifth transparent conductive film 315, allowing the bottom layer to be connected to the lower cell cell or external circuitry, further optimizing the charge transport path. Furthermore, by simultaneously setting electrodes on the top and bottom layers, the crystalline silicon cell cells can be flexibly configured in series or parallel with other cell cells, providing higher voltage or greater current to adapt to various application requirements. This design improves the energy output efficiency of the battery while also considering the modularity and integration of the structure, contributing to improved overall performance and application flexibility of the photovoltaic system.

[0152] In one specific implementation scheme, the photovoltaic cell may include:

[0153] The perovskite solar cell unit layer 1, the copper indium gallium selenide thin film solar cell unit layer 2, and the crystalline silicon solar cell unit layer 3 are described.

[0154] The perovskite solar cell cell layer 1 includes a first body and a first upper electrode 12, with the first upper electrode 12 disposed on the light-facing surface of the first body.

[0155] The copper indium gallium selenide (CIGS) thin-film battery cell layer 2 is located on the backlight side of the crystalline silicon battery cell layer 3 to form a perovskite-crystalline silicon-CIGS thin-film stacked battery structure. That is, the crystalline silicon battery cell layer 3 is located between the perovskite battery cell layer 1 and the CIGS thin-film battery cell layer 2 in a predetermined direction, which includes the light-facing direction and the backlight direction.

[0156] The perovskite solar cell cell layer 1 includes a first body and a first upper electrode 12, with the first upper electrode 12 disposed on the light-facing surface of the first body.

[0157] The copper indium gallium selenide thin-film battery cell layer 2 includes a second body and a first lower electrode 22, with the first lower electrode 22 disposed on the backlight side of the second body.

[0158] The crystalline silicon cell cell layer 3 includes a third body and a first intermediate electrode 32. The first intermediate electrode 32 is disposed on one of the light-facing surface and the back-light-facing surface of the third body. The first intermediate electrode 32 is spaced apart from the corresponding one of the first body and the second body so as to be exposed.

[0159] Since the first upper electrode 12 is located on the light-facing surface of the first main body and the first lower electrode 22 is located on the back-facing surface of the second main body, the first upper electrode 21 and the first lower electrode 22 are also exposed. The fact that the first upper electrode 12, the first lower electrode 22 and the first intermediate electrode 32 are exposed does not mean that they are exposed to the external environment when the battery is in operation, but rather that they are not covered by a transparent conductive film or the like.

[0160] Since the perovskite cell layer 1, the copper indium gallium selenide thin film cell layer 2, and the crystalline silicon cell layer 3 all have exposed electrodes, they can be easily combined in series or parallel. This allows the stacked cells to have higher voltage and current, and achieve higher power density.

[0161] In a specific implementation plan, such as Figure 2 As shown, the first body includes a first transparent conductive film 111, a first hole transport layer 112, a first perovskite light absorption layer 113, a first electron transport layer 114, and a second transparent conductive film 115, which are stacked sequentially from the light-facing side to the back-light side.

[0162] The third body comprises a fourth transparent conductive film 311, a P-type doped amorphous silicon layer 312, an N-type silicon substrate 313, an N-type doped amorphous silicon layer 314, and a fifth transparent conductive film 315, which are sequentially stacked from the light-facing side to the back-light-reflecting side. The second body comprises a window layer 211, a buffer layer 212, and a CIGS absorption layer 213.

[0163] The fifth transparent conductive film 315 and the window layer 211 are stacked together, that is, the crystalline silicon cell unit layer 3 and the copper indium gallium selenide thin film cell unit layer 2 are connected together through the fifth transparent conductive film 315.

[0164] The first upper electrode 12 is disposed on the light-facing surface of the first transparent conductive film 111, and the second upper electrode 13 is located on the back side of the second transparent conductive film 115. The second upper electrode 13 and the fourth transparent conductive film 311 are spaced apart. The first intermediate electrode 32 is disposed on the light-facing surface of the fourth transparent conductive film 311, and the first intermediate electrode 32 and the second transparent conductive film 115 are spaced apart. The first lower electrode 22 is disposed on the back side of the CIGS absorption layer 213.

[0165] The crystalline silicon cell cell layer 3 further includes a first intrinsic amorphous silicon layer 316 and a second intrinsic amorphous silicon layer 317. The first intrinsic amorphous silicon layer 316 is located between the P-type doped amorphous silicon layer 312 and the N-type silicon substrate 313, and the second intrinsic amorphous silicon layer 317 is located between the N-type doped amorphous silicon layer 314 and the N-type silicon substrate 313.

[0166] like Figure 2As shown, the copper indium gallium selenide (CIGS) thin-film battery cell layer 2 also includes a second lower electrode 23, which is disposed on the light-facing surface of the second main body. The second lower electrode 23 and the third main body 31 are spaced apart to be exposed. The perovskite battery cell layer 1 and the crystalline silicon battery cell layer 3 are connected in series to form a second battery pack, and the second battery pack is connected in series or in parallel with the CIGS thin-film battery cell layer 2.

[0167] By connecting the second battery pack in series or in parallel with the copper indium gallium selenide thin-film battery cell layer 2, the low-light performance of the tandem battery can be further improved, thereby obtaining a higher open-circuit voltage and thus enabling the photovoltaic cell to have a higher power density.

[0168] In a specific implementation plan, such as Figure 3 As shown, the first body includes a first transparent conductive film 111, a first hole transport layer 112, a first perovskite light absorption layer 113, and a first carrier transport layer 116, which are sequentially stacked from the light-facing side to the back-light-facing side. The third body 31 includes a fourth transparent conductive film 311, a P-type doped amorphous silicon layer 312, an N-type silicon substrate 313, an N-type doped amorphous silicon layer 314, and a fifth transparent conductive film 315, which are sequentially stacked from the light-facing side to the back-light-facing side. The first carrier transport layer 116 and the fourth transparent conductive film 311 are stacked together, that is, the first perovskite cell unit 1 and the crystalline silicon cell unit 3 are stacked together through the third conductive film 311. The second body 21 includes a third transparent conductive film 214, a window layer 211, a buffer layer 212, and a CIGS absorption layer 213.

[0169] The first upper electrode 12 is located on the light-facing surface of the first transparent conductive film 111. The first intermediate electrode 32 is disposed on the back-light-facing surface of the fourth transparent conductive film 315. The first intermediate electrode 32 and the third transparent conductive film 214 are positioned on their light-facing surfaces. The second lower electrode 23 is spaced apart from the fourth transparent conductive film 315 so that it is exposed. The first lower electrode 22 is disposed on the back-light-facing surface of the CIGS absorption layer 213.

[0170] In a specific implementation plan, such as Figure 4 As shown, the perovskite solar cell layer 1 further includes a second upper electrode 13, which is disposed on the backlight surface of the first body and is spaced apart from the third body so as to be exposed. The copper indium gallium selenide thin-film solar cell layer 2 further includes a second lower electrode 23, which is disposed on the light-facing surface of the second body and is spaced apart from the third body so as to be exposed.

[0171] The crystalline silicon cell unit layer 3 also includes a second intermediate electrode 33, and a first intermediate electrode 32 is disposed on the light-facing surface of the third main body. The first intermediate electrode 32 is spaced apart from the first main body so that it is exposed. In this arrangement, connecting one of the perovskite cell unit layer 1, the copper indium gallium selenide thin-film cell unit layer 2, and the crystalline silicon cell unit layer 3 in series or parallel with another can enable the photovoltaic cell to achieve a higher power density.

[0172] This utility model embodiment provides a photovoltaic system, which includes a photovoltaic cell as described above.

[0173] In this embodiment, the photovoltaic system can be a distributed photovoltaic power generation system.

[0174] In this embodiment, the photovoltaic system can also be a large-scale ground-mounted photovoltaic power station.

[0175] In this embodiment, the photovoltaic system can also be an agricultural-photovoltaic complementary system.

[0176] In this embodiment, the photovoltaic system can also be a floating photovoltaic system.

[0177] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0178] Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments, and will not be repeated here.

[0179] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0180] In the above embodiments of this application, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0181] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principles of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A photovoltaic cell, characterized in that, The battery includes: A perovskite solar cell unit layer is disposed on top; A crystalline silicon solar cell layer is disposed on the back surface side of the perovskite solar cell layer. At least one copper indium gallium selenide thin-film battery cell layer is disposed on the backlight side of the crystalline silicon battery cell layer.

2. The battery according to claim 1, characterized in that, The perovskite solar cell unit layer includes at least: First transparent conductive film; The first upper electrode is disposed on the light-facing side of the first transparent conductive film; The first hole transport layer is disposed on the back side of the first transparent conductive film; The first perovskite light absorption layer is disposed on the back side of the first hole transport layer. The first electron transport layer is disposed on the back side of the first perovskite light absorption layer. The bottom charge transport layer is disposed on the back side of the first electron transport layer.

3. The battery according to claim 2, characterized in that, The bottom charge transport layer includes: A second transparent conductive film is disposed on the back side of the first electron transport layer; The second upper electrode is disposed on the back side of the second transparent conductive film.

4. The battery according to claim 2, characterized in that, The bottom charge transport layer includes: The first carrier transport layer is disposed on the back side of the first electron transport layer.

5. The battery according to claim 1, characterized in that, The copper indium gallium selenide thin-film battery cell layer includes at least: Window layer; A buffer layer is disposed on the backlight side of the window layer; A CIGS absorption layer is disposed on the back side of the buffer layer; The first lower electrode is disposed on the back side of the CIGS absorption layer.

6. The battery according to claim 5, characterized in that, The copper indium gallium selenide thin-film battery cell layer further includes: The first top charge transport layer is disposed on the light-facing side of the window layer.

7. The battery according to claim 6, characterized in that, First top charge transport layer: A third transparent conductive film is disposed on the light-facing side of the window layer; The second lower electrode is disposed on the light-facing side of the third transparent conductive film.

8. The battery according to claim 1, characterized in that, The crystalline silicon cell unit layer includes at least: Fourth transparent conductive film; A P-type doped amorphous silicon layer is disposed on the back side of the fourth transparent conductive film. The first intrinsic amorphous silicon layer is disposed on the back side of the P-type doped amorphous silicon layer; An N-type silicon substrate is disposed on the back side of the first intrinsic amorphous silicon layer; The second intrinsic amorphous silicon layer is disposed on the back side of the N-type silicon substrate; An N-type doped amorphous silicon layer is disposed on the back side of the second intrinsic amorphous silicon layer; The fifth transparent conductive film is disposed on the back side of the N-type doped amorphous silicon layer.

9. The battery according to claim 1, characterized in that, The crystalline silicon cell unit layer further includes: A first intermediate electrode is disposed on the light-facing side of the fourth transparent conductive film; and / or The second intermediate electrode is disposed on the back side of the fifth transparent conductive film.

10. A photovoltaic system, characterized in that, The photovoltaic system includes a photovoltaic cell as described in any one of claims 1-9.

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