Brain-computer interface signal filter circuit and brain-computer interface system
By using memristors to construct a second-order active filter module in the brain-computer interface system, the problem of time delay sensitivity of digital filters is solved, enabling faster and more accurate brain-computer signal processing and improving the real-time interaction capability of the brain-computer interface.
Patent Information
- Application Number
- CN202422815912.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2034-11-19
AI Technical Summary
In existing technologies, digital filters are time-delay sensitive in filtering EEG signals, resulting in signal delay after filtering and affecting the real-time application of brain-computer interfaces.
A memristor is used to replace the traditional resistor to form a filter circuit. Combined with a CMOS operational amplifier, a second-order active filter module is constructed. The cutoff frequency of the filter is adjusted by controlling the resistance value of the memristor, thereby improving the filtering accuracy and speed.
It achieves more precise filtering of noise and interference, reduces signal delay, improves the processing capability of brain-computer interface signals, and enables faster and more accurate brain-computer interaction.
Smart Images
Figure CN223501371U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of signal processing technology, and in particular to a brain-computer interface signal filtering circuit and a brain-computer interface system. Background Technology
[0002] Brain-computer interface (BCI) is a technology that enables direct interaction between the human brain and a computer or external device by converting signals from the human brain into recognizable electrical signals. BCI technology has broad application prospects in medicine, neuroscience, and human-computer interaction, such as helping people with disabilities regain motor function, engaging in mind-controlled games, and virtual reality. In existing BCI systems, signal filtering is a crucial step. BCI signals typically contain a large amount of noise and interference, requiring filtering to extract the EEG signals of interest.
[0003] In existing technologies, digital filters are mainly used to filter EEG signals. The specific operation includes: acquiring raw EEG signal data using instruments and amplifying the acquired weak EEG signals; selecting an appropriate digital filter type based on the analysis requirements; determining the filter's cutoff frequency (the highest and lowest frequencies of high-pass, low-pass, or band-pass filters); and setting the filter order or attenuation level. The EEG signal is then input into the digital filter for filtering to obtain the filtered EEG signal.
[0004] The drawback of the aforementioned existing technology is that digital filters are sensitive to time delay, which results in a certain delay in the filtered signal, making it unsuitable for real-time applications of brain-computer interfaces. Utility Model Content
[0005] To address the shortcomings of existing technologies, this invention provides a brain-computer interface signal filtering circuit that uses a memristor instead of a traditional resistor to form the filtering circuit, thus solving the problem of signal delay after filtering.
[0006] To achieve the above objectives, this utility model provides a brain-computer interface signal filtering circuit, including a filtering module and an amplification module. The brain-computer interface signal is connected to one end of the filtering module through an input interface. The amplification module includes a positive input terminal, an inverting input terminal, and an output terminal. The positive input terminal is connected to the other end of the filtering module, the inverting input terminal is grounded after voltage division through the output terminal, and the output terminal is connected to an output interface. The filtering module includes at least one memristor and at least one capacitor.
[0007] The filtering module includes two memristors and two capacitors, namely a first memristor, a second memristor, a first capacitor, and a second capacitor. One end of the first memristor is connected to the input interface, and the other end of the first memristor is connected to the positive input terminal of the amplification module and one end of the first capacitor. The other end of the first capacitor is grounded. One end of the second memristor is connected to the other end of the first memristor, and the other end of the second memristor is grounded. One end of the second capacitor is connected to the other end of the second memristor, and the other end of the second capacitor is connected to a first power supply.
[0008] The amplification module further includes a positive power supply terminal and a negative power supply terminal, wherein: the positive power supply terminal is connected to the first power supply; and the negative power supply terminal is connected to the second power supply.
[0009] The negative power supply terminal of the amplification module is grounded through a third capacitor.
[0010] The brain-computer interface signal filtering circuit further includes a voltage divider module, which includes a third resistor and a fourth resistor. One end of the third resistor is connected to the output terminal of the amplification module, and the other end is connected to one end of the fourth resistor. One end of the fourth resistor is connected to the inverting input terminal of the amplification module, and the other end is grounded.
[0011] The brain-computer interface signal filtering circuit also includes a fourth capacitor, one end of which is connected to the output terminal of the amplification module, and the other end is connected to the output interface.
[0012] The amplification module is a CMOS operational amplifier.
[0013] The memristor is a third-order smooth memristor.
[0014] On the other hand, this utility model also provides a brain-computer interface system, including an acquisition module, a data processing module, and the aforementioned brain-computer interface signal filtering circuit. The acquisition module acquires electroencephalogram (EEG) signals and connects to the brain-computer interface signal filtering circuit through the input interface. The brain-computer interface signals are connected to the data processing module through the output interface.
[0015] The brain signals include one or a combination of several of the following: electroencephalography (EEG), functional magnetic resonance imaging (fMRI), magnetoencephalography (MEG), near-infrared spectroscopy, and electrocorticography (ECG).
[0016] As can be seen from the above solutions, the advantages of this utility model are:
[0017] Using a memristor as the core component of the filtering module, the cutoff frequency of the low-pass filter is controlled by adjusting the resistance value of the memristor. This allows the brain-computer interface signal filtering circuit to filter out noise and interference more accurately. Combined with the amplification module, this improves the effective processing capability of the brain-computer interface signal, solves the signal delay problem after filtering, and enables faster and more accurate brain-computer interaction.
[0018] The filtering module uses a second-order active filter, which improves the attenuation speed of the amplitude-frequency characteristics outside the passband compared with the first-order filter circuit. Attached Figure Description
[0019] Figure 1 This is a schematic diagram of the structure of an existing EEG acquisition system;
[0020] Figure 2 This is a schematic diagram of the brain-computer interface signal filtering circuit of this utility model;
[0021] Figure 3 This is a circuit diagram of a third-order memristor in the prior art;
[0022] Figure 4 for Figure 3 Simulation diagram;
[0023] Figure 5 Schematic diagram of brain-computer interface system structure
[0024] In the attached figures, the following labels are used:
[0025] 1-Brain-computer interface signal filtering circuit;
[0026] 10-Filtering module;
[0027] 11-Amplification module;
[0028] 12-Voltage divider module;
[0029] 2-Brain-computer interface system;
[0030] 20 - Data Acquisition Module;
[0031] 21-Data Processing Module. Detailed Implementation
[0032] The technical solution of this utility model will be described in detail below with reference to the accompanying drawings and specific embodiments to further understand the purpose, solution and effect of this utility model, but it is not intended to limit the scope of protection of the appended claims of this utility model.
[0033] References to "embodiment," "another embodiment," "this embodiment," etc., in the specification refer to embodiments that may include specific features, structures, or characteristics, but not every embodiment must include these specific features, structures, or characteristics. Furthermore, such expressions do not refer to the same embodiment. Moreover, when describing specific features, structures, or characteristics in conjunction with embodiments, whether or not explicitly described, it is indicated that incorporating such features, structures, or characteristics into other embodiments is within the knowledge of those skilled in the art.
[0034] The specification and subsequent claims use certain terms to refer to specific components or parts. Those skilled in the art will understand that users or manufacturers may use different names or terms to refer to the same component or part. This specification and claims do not distinguish components or parts by differences in name, but rather by differences in function. The terms "comprising" and "including" used throughout the specification and claims are open-ended and should be interpreted as "including but not limited to". Furthermore, the term "connection" here includes any direct and indirect electrical connection means. Indirect electrical connection means include connections via other means.
[0035] EEG signals are very weak, with amplitudes ranging from 5μV to 100μV, typically around 50μV. Therefore, they are easily interfered with by other signals and require filtering before analysis and processing. This includes filtering out common noises such as power frequency interference, baseline drift, motion artifacts, and eye artifacts.
[0036] The effective rhythmic components of EEG signals are mainly within the range of 0.1–30 Hz. Signals above 30 Hz are generally considered noise. If left unprocessed, excessive noise can disrupt EEG signals and affect the final acquisition results. Therefore, a filtering and amplification circuit module needs to be added to the EEG acquisition device to perform both filtering and signal amplification.
[0037] like Figure 1 In the existing technology shown, after the EEG signal is acquired by the acquisition helmet, it enters the EEG processing and amplification box through the lead wires. At this time, the acquired EEG signal is very weak compared to other signals and is highly susceptible to external noise interference. The noise generated by the lead wires will enter the EEG amplification box along with the EEG signal and be amplified, thus significantly affecting the final acquisition result. Subsequently, the signal amplification box is connected to the host computer for communication via a data cable.
[0038] Filtering circuits typically employ active filter circuits with superior characteristics, including RC networks and integrated operational amplifier circuits. The RC network performs passive filtering, while the integrated operational amplifier circuit provides signal gain. This active filter circuit thus filters and amplifies the input EEG signal. However, in practical applications, the first-order filter circuit is not ideal, with an amplitude-frequency response attenuation rate of only -20dB / decathlon. To improve the amplitude-frequency response attenuation rate outside the passband, a second-order active filter circuit is introduced, increasing the attenuation rate to -40dB / decathlon. The filtering and amplification circuit in the EEG processing amplifier box can be described as a brain-computer interface signal filtering circuit provided in this embodiment of the invention, with the circuit composition as follows... Figure 2 As shown.
[0039] Figure 2 This is a schematic diagram of a brain-computer interface signal filtering circuit 1 (hereinafter referred to as circuit 1) provided in an embodiment of the present invention. Circuit 1 includes a filtering module 10 and an amplification module 11. The brain-computer interface signal is connected to one end of the filtering module 10 through the input interface P1port. The amplification module 11 includes a positive input terminal +IN, an inverting input terminal -IN, and an output terminal OUT. The positive input terminal +IN is connected to the other end of the filtering module 10, the inverting input terminal -IN is grounded after voltage division through the output terminal OUT, and the output terminal OUT is connected to the output interface OUTport. The filtering module 10 is composed of at least one memristor and at least one capacitor.
[0040] In this embodiment, the filter module 10 includes two memristors and two capacitors, namely a first memristor R1, a second memristor R2, a first capacitor C1, and a second capacitor C3. One end of the first memristor R1 is connected to the input interface P1port, and the other end of the first memristor R1 is connected to the positive input terminal +IN of the amplifier module 11 and one end of the first capacitor C1. The other end of the first capacitor C1 is grounded to GND. One end of the second memristor R2 is connected to the other end of the first memristor R1, and the other end of the second memristor R2 is grounded to GND. One end of the second capacitor C3 is connected to the other end of the second memristor R2, and the other end of the second capacitor C3 is connected to the first power supply VCC.
[0041] In this embodiment, the amplification module 11 is an active amplifier, which also includes a positive power supply terminal V+ and a negative power supply terminal V-. The positive power supply terminal V+ is connected to the first power supply VCC; the negative power supply terminal V- is connected to the second power supply VDD and the third capacitor C2, and the other end of the third capacitor C2 is grounded to GND. The third capacitor C2 is generally selected with a small value, such as 0.1μF or 1μF, in order to better filter out high-frequency noise.
[0042] The amplifier module 11 can be, for example, Texas Instruments' CMOS operational amplifier OPA333, which has proprietary automatic calibration technology and can provide extremely low offset voltage (maximum 10μV); at the same time, the amplifier has near-zero drift (maximum 0.05μV / ℃) with time and temperature, small size, low quiescent current (17uA) and low power consumption.
[0043] In this embodiment, circuit 1 further includes a voltage divider module 12, which includes a third resistor R3 and a fourth resistor R4. One end of the third resistor R3 is connected to the output terminal OUT of the amplifier module 11, and the other end is connected to one end of the fourth resistor R4. One end of the fourth resistor R4 is also connected to the inverting input terminal -IN of the amplifier module 11, and the other end is grounded to GND.
[0044] In this embodiment, circuit 1 further includes a fourth capacitor C4. One end of the fourth capacitor C4 is connected to the output terminal OUT of the amplification module 11, and the other end is connected to the output interface OUTport. The fourth capacitor C4 is used to smooth the output voltage.
[0045] In this embodiment, the memristors used (including the first memristor R1 and the second memristor R2) are selected as third-order smooth memristors, for example... Figure 3 The existing third-order smooth memristor circuit shown is a common model for memristor circuit modeling and analysis, where the magnetically controlled memristor is described by a smooth, continuous cubic nonlinear function. A memristor is a two-terminal circuit element described by the relation f(φ,q)=0, where φ represents the phase angle and q represents the charge. A magnetically controlled memristor model described by a smooth, continuous cubic nonlinear function can be expressed as equation (1):
[0046] q(φ)=aφ+bφ 3 (1)
[0047] Where a and b are both positive constants,
[0048] Differentiating both sides of equation (1) with respect to time t, we obtain equation (2):
[0049] i(t)=W(φ)v(t)=(a+3bφ 2 v(t) (2)
[0050] Where i(t) represents the instantaneous current, W(φ) represents the phase relationship between voltage and current, and v(t) represents the instantaneous voltage, this equation (2) is the voltage-charge relationship (VCR) of the cubic nonlinear magnetically controlled memristor, which presents a tight hysteresis loop that contracts at the origin. Figure 3 Simulation of the third-order smooth memristor circuit shown does indeed demonstrate the characteristics of a tight hysteresis loop that contracts at the origin, as... Figure 4This indicates that the third-order nonlinear flux memristor model is indeed a memristor element model and has memristor properties.
[0051] Third-order smooth memristors are used to detect and process weak signals, solving the limitations of existing technologies based on linear systems, such as the simultaneous amplification of signal and noise and excessive signal loss after filtering.
[0052] In practical applications, the brain-computer interface signal enters the brain-computer interface signal filtering circuit 1 through the input interface P1port. By changing the resistance values of the first memristor R1 and the second memristor R2, the cutoff frequency of the circuit 1 is controlled. Then, the brain-computer interface signal is filtered by an amplification module such as an operational amplifier OPA333.
[0053] This invention uses a memristor instead of the linear resistor in an RC oscillator as the core component of the brain-computer interface signal filtering circuit, which is significantly different from traditional digital and analog filters. Specifically, a memristor is a small, non-linear resistor with memory function. Its characteristic is that it can remember the amount of charge flowing through it; by controlling changes in current, its resistance can be changed, thus enabling data storage. The resistance of a memristor depends on the amount of charge passing through it, and its resistance remains unchanged even when power is off, remembering the state at the moment of power failure. The memristor has adaptive adjustment capabilities and non-linear characteristics, allowing it to adjust and remember its resistance value based on the current or voltage state at the previous moment, thereby achieving signal filtering at different cutoff frequencies. This invention changes the cutoff frequency of the low-pass filter by controlling the resistance value of the memristor, enabling the brain-computer interface signal filtering circuit to more accurately filter out noise and interference, solving problems such as weak signal processing and easy loss of detection signals, and improving the effective processing capability of brain-computer interface signals.
[0054] Compared to traditional filters, this invention offers higher sensitivity and accuracy in signal filtering. Improving the processing power of memristor-based filter circuits effectively enhances the performance of brain-computer interface (BCI) systems. By accurately extracting and processing BCI signals, faster and more accurate BCI interaction is achieved. This is of great significance for the application fields of BCI technology, such as neuroscience research, rehabilitation medicine, and human-computer interaction.
[0055] like Figure 5 The diagram shown is a schematic diagram of a brain-computer interface system 2 provided in another embodiment of the present invention. The system 2 includes an acquisition module 20, a data processing module 21, and the aforementioned brain-computer interface signal filtering circuit 1. The acquisition module 20 acquires brain signals and connects to the brain-computer interface signal filtering circuit 1 through the input interface P1port. The brain-computer interface signal filtering circuit 1 is connected to the data processing module 21 through the output interface OUTport.
[0056] Specifically, the acquisition module 20 is, for example, Figure 1 The acquisition helmet collects EEG signals to form brain-computer interface (BCI) signals. EEG signals include one or a combination of several of the following: electroencephalography (EEG), functional magnetic resonance imaging (fMRI), magnetoencephalography (MEG), near-infrared spectroscopy (NIRS), and electrocorticography (ECG). The BCI signals are filtered by a BCI signal filtering circuit. After filtering, the BCI signals are input to a data processing module, such as a data processing chip, for processing such as analog-to-digital conversion, noise suppression, feature extraction, and signal classification. The resulting signals are then converted into useful signals to support the needs of various application scenarios, such as clinical diagnosis and monitoring, cognitive neuroscience research, and education and training.
[0057] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these forms fall within the protection scope of the present invention.
Claims
1. A brain-computer interface signal filtering circuit, comprising a filtering module and an amplification module, characterized in that, The brain-computer interface signal is input to one end of the filtering module through the input interface. The amplification module includes a positive input terminal, an inverting input terminal, and an output terminal, wherein the positive input terminal is connected to the other end of the filtering module, the inverting input terminal is grounded after voltage division through the output terminal, and the output terminal is connected to the output interface; The filtering module includes at least one memristor and at least one capacitor.
2. The brain-computer interface signal filtering circuit according to claim 1, characterized in that, The filtering module includes two memristors and two capacitors, wherein the two memristors are a first memristor and a second memristor, and the two capacitors are a first capacitor and a second capacitor, wherein: One end of the first memristor is connected to the input interface, and the other end of the first memristor is connected to the positive input terminal of the amplification module and one end of the first capacitor. The other end of the first capacitor is grounded. One end of the second memristor is connected to the other end of the first memristor, and the other end of the second memristor is grounded; One end of the second capacitor is connected to the other end of the second memristor, and the other end of the second capacitor is connected to the first power supply.
3. The brain-computer interface signal filtering circuit according to claim 2, characterized in that, The amplification module further includes a positive power supply terminal and a negative power supply terminal, wherein: The positive power supply terminal is connected to the first power supply. The negative power supply terminal is connected to the second power supply.
4. The brain-computer interface signal filtering circuit according to claim 3, characterized in that, The negative power supply terminal of the amplification module is grounded through a third capacitor.
5. The brain-computer interface signal filtering circuit according to claim 1, characterized in that, It also includes a voltage divider module, which comprises a third resistor and a fourth resistor, wherein: One end of the third resistor is connected to the output terminal of the amplification module, and the other end is connected to one end of the fourth resistor; One end of the fourth resistor is connected to the inverting input terminal of the amplification module, and the other end is grounded.
6. The brain-computer interface signal filtering circuit according to claim 1, characterized in that... It also includes a fourth capacitor, one end of which is connected to the output terminal of the amplification module, and the other end of which is connected to the output interface.
7. The brain-computer interface signal filtering circuit according to any one of claims 1 to 6, characterized in that, The amplification module is a CMOS operational amplifier OPA333.
8. The brain-computer interface signal filtering circuit according to any one of claims 1 to 6, characterized in that, The memristor is a third-order smooth memristor.
9. A brain-computer interface system, comprising a data acquisition module and a data processing module, characterized in that, It also includes a brain-computer interface signal filtering circuit as described in any one of claims 1 to 8, wherein the acquisition module acquires brain signals to form the brain-computer interface signal, the brain-computer interface signal is connected to the brain-computer interface signal filtering circuit through the input interface, and the brain-computer interface signal filtering circuit is connected to the data processing module through the output interface.
10. The brain-computer interface system according to claim 9, characterized in that, The brain signals include one or a combination of several of the following: electroencephalography (EEG), functional magnetic resonance imaging (fMRI), magnetoencephalography (MEG), near-infrared spectroscopy, and electrocorticography (ECG).