Wafer charge elimination device and system
By using a charge elimination medium to contact the wafer surface in a wafer charge elimination device, the problem of difficult-to-extract charge from the wafer surface is solved, the charge elimination effect is improved, the defect risk is reduced, and the wafer yield is increased.
Patent Information
- Application Number
- CN202422634685.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-30
- Publication Date
- 2025-10-31
- Estimated Expiration
- 2034-10-30
AI Technical Summary
In existing technologies, it is difficult to effectively remove the charge from the wafer surface, leading to problems such as instantaneous discharge, defects, and structural damage.
A wafer charge elimination device is provided, which supports the wafer by setting a support structure in the chamber and inputting a charge elimination medium, such as a conductive gas or liquid, into the chamber to directly contact the wafer surface to eliminate the charge, and then discharges it from the output section.
This improves charge extraction efficiency, reduces the risk of wafer defects, and increases wafer yield.
Smart Images
Figure CN223503077U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor technology, and in particular to wafer charge elimination devices and systems. Background Technology
[0002] In semiconductor manufacturing processes, techniques such as dry etching and plasma-enhanced chemical vapor deposition introduce significant electrical charges onto the wafer surface. If these charges are not promptly discharged, they can cause momentary discharges when the wafer is placed on the equipment, leading to defects, metal corrosion, and even damage to the wafer structure.
[0003] In traditional techniques, to extract the charge from the wafer surface, the wafer chuck is grounded or the entire machine is grounded, but the charge extraction effect is limited. Utility Model Content
[0004] Therefore, it is necessary to provide a wafer charge elimination device and system to address the problem of difficult-to-extract surface charge from wafers.
[0005] In a first aspect, this application provides a wafer charge elimination device, the wafer charge elimination device comprising:
[0006] The body has a cavity, and the body has an input section and an output section communicating with the cavity. The input section is used to input a charge elimination medium, and the output section is used to output the charge elimination medium.
[0007] A support structure is disposed within the cavity and is used to support the wafer.
[0008] In one embodiment, the wafer charge elimination device further includes a filtering unit disposed at the input section for filtering the charge elimination medium input into the chamber.
[0009] In one embodiment, the input portion is disposed on the side wall of the body, and the output portion is disposed on the bottom of the body.
[0010] In one embodiment, the wafer charge elimination device further includes one or more gates disposed on the body; the gates have an open position and a closed position, wherein when the gates are in the open position, the wafer can pass through the gates, and when the gates are in the closed position, the chamber is sealed.
[0011] In one embodiment, the support structure includes a support member and a plurality of bosses disposed on the top of the support member; the plurality of bosses are spaced apart for supporting the wafer so that the wafer is spaced from the support member.
[0012] In one embodiment, the height of the top center region of the support is less than the height of the edge region, so that the distance between the wafer and the center region of the support is greater than the distance between the wafer and the edge region of the support.
[0013] In one embodiment, the support member has one or more through holes extending from the top to the bottom, the through holes forming the output portion.
[0014] In one embodiment, the plurality of the bosses are distributed at equal intervals along the edge of the support member.
[0015] In one embodiment, the wafer charge elimination device further includes a spray structure configured in a ring shape and disposed above the support structure; the inlet of the spray structure is connected to the input section, and the spray structure has a plurality of nozzles along the ring facing the support structure.
[0016] Secondly, this application also provides a wafer charge elimination system, the wafer charge elimination system comprising:
[0017] The aforementioned wafer charge elimination device; and
[0018] A conveying structure, which is connected to the input section, is used to convey the charge elimination medium to the input section.
[0019] The aforementioned wafer charge elimination device and system utilize a support structure within a cavity of the main body, on which the wafer is placed. A charge elimination medium is injected into the cavity via an input section, making contact with the wafer surface. This medium then eliminates surface charge, which is subsequently discharged from an output section. Compared to conventional techniques that rely solely on grounding the wafer chuck to remove charge, the wafer charge elimination device provided in this application eliminates charge by introducing a charge elimination medium, improving charge removal efficiency, reducing the risk of wafer defects, and increasing wafer yield. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of the structure of a wafer charge elimination device in one embodiment.
[0021] Figure 2 This is a front view of a wafer charge elimination device in one embodiment.
[0022] Figure 3 This is a side view of a wafer charge elimination device in one embodiment.
[0023] Figure 4 This is a top view of a wafer charge elimination device in one embodiment.
[0024] Figure 5This is an internal structural diagram of a wafer charge elimination device in one embodiment.
[0025] Figure 6 This is a schematic diagram of the load-bearing structure in one embodiment.
[0026] Figure 7 This is a top view of the load-bearing structure in one embodiment.
[0027] Figure 8 This is a front view of the spray structure in one embodiment.
[0028] Figure 9 This is a bottom view of the spray structure in one embodiment.
[0029] Explanation of reference numerals in the attached figures:
[0030] 10. Wafer charge elimination device; 11. Body; 12. Chamber; 13. Input section; 14. Output section; 15. Support structure; 151. Support member; 152. Boss; 16. Filter unit; 17. Door; 18. Spray structure; 181. Nozzle; 20. Wafer. Detailed Implementation
[0031] To make the above-mentioned objects, features, and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a full understanding of this utility model. However, this utility model can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this utility model. Therefore, this utility model is not limited to the specific embodiments disclosed below.
[0032] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.
[0033] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.
[0034] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.
[0035] In this utility model, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0036] It should be noted that when an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.
[0037] In plasma processes, a significant amount of charge is introduced onto the wafer surface, such as in dry etching or plasma-enhanced chemical vapor deposition (PECVD). If this charge is not promptly discharged from the single-chip microcomputer (SCI) stage, it can cause momentary discharges, leading to wafer defects, SCI metal corrosion, and even wafer structural damage.
[0038] Traditional methods for removing surface charge from wafers involve grounding the wafer chuck probes, but this approach has limited effectiveness. Furthermore, single-machine equipment uses a rotary process, which may alter the surface charge characteristics of the wafer, rendering the wafer chuck probe grounding method ineffective in removing surface charge.
[0039] Based on this, see Figure 1 , Figure 1 A schematic diagram of a wafer charge elimination device 10 according to one embodiment of the present invention is shown. The wafer charge elimination device 10 provided in one embodiment of the present invention includes a body 11 and a support structure 15. The body 11 has a chamber 12, and the support structure 15 is disposed in the chamber 12 for supporting the wafer 20. By inputting a charge elimination medium into the chamber 12, the charge on the surface of the wafer 20 can be extracted.
[0040] For example, the charge-discharging medium can be a charge-conducting gas and / or a charge-conducting liquid. Further, the charge-conducting gas can be vaporized CO2DI or isopropanol vapor, where CO2DI is deionized water mixed with carbon dioxide. The charge-conducting liquid can be CO2DI or isopropanol. The principle of charge removal by CO2DI is as follows:
[0041] H₂CO₃ + H₂O → HgO + +HCO3 -
[0042] HCO3 - +H2O⇄H3O + +CO3 2-
[0043] Since H₂CO₃ is a weak acid, it can maintain macroscopic charge neutrality after absorbing positive and negative charges. Therefore, upon contact with wafer 20, it can remove the charge from the surface of wafer 20. For example, the wafer surface may have F... - Cl - Amino groups, etc., can be removed by CO2DI.
[0044] Specifically, the body 11 has an input section 13 and an output section 14 communicating with the chamber 12. The input section 13 is used to input the charge elimination medium, and the output section 14 is used to output the charge elimination medium. A support structure 15 is disposed inside the chamber 12 to support the wafer 20. In one feasible implementation, the charge elimination medium can be input from the input section 13 while air is being evacuated from the output section 14, thereby reducing the corrosion of the chamber 12 by the charge elimination medium. In another feasible implementation, the support structure 15 can be grounded. Exemplarily, a conduit can be disposed inside the output section 14, extending out of the body 11.
[0045] The support structure 15 can support the wafer 20 in the chamber 12. When the charge elimination medium is input, the charge elimination medium comes into contact with the wafer 20 and carries away the charge on the surface of the wafer 20, reducing the impact of the charged wafer 20 on the machine or causing defects in the wafer 20 itself.
[0046] In this embodiment, a support structure 15 is provided inside the chamber 12 of the main body 11, and the wafer 20 is placed on the support structure 15. A charge elimination medium is injected into the chamber 12 through the input section 13, which can contact the surface of the wafer 20, thereby eliminating the surface charge of the wafer 20, and then discharging it from the output section 14. Compared to the conventional method of grounding the wafer 20 chuck to remove charge, the wafer charge elimination device 10 provided in this application can eliminate charge by introducing a charge-conducting gas or liquid, improving the charge removal effect, reducing the risk of defects in the wafer 20, and increasing the yield of the wafer 20.
[0047] In some embodiments, the wafer charge elimination device 10 further includes a filter unit 16 disposed in the input section 13 for filtering the charge elimination medium input into the chamber 12. The filter unit 16 filters the charge elimination medium to remove solid particles, droplet impurities, or other impurities. The filter unit 16 can employ different designs and materials to handle particles or contaminants of different types and sizes.
[0048] In this embodiment, by designing the filter unit 16, the charge elimination medium is first input from the input unit 13 and then passes through the filter unit 16. The filter unit 16 filters the charge elimination medium to ensure the purity of the charge elimination medium entering the chamber 12, avoids the introduction of other impurities to contaminate the wafer 20, and ensures the purity of the wafer 20.
[0049] Some charge-eliminating media have relatively large molecular masses, and after being introduced into the cavity, they naturally flow downwards to contact the wafer 20. Therefore, in some embodiments, the input section 13 is located on the side wall of the body 11, and the output section 14 is located at the bottom of the body 11. The support structure 15 is located at the bottom of the chamber 12. After entering the chamber 12, the charge-eliminating media flows downwards to contact the wafer 20 located on the support structure 15, eliminating the charge on the wafer 20, and then flows downwards to the output section 14 for discharge.
[0050] This configuration allows the charge elimination medium to enter from the input section 13, flow downwards to contact the wafer 20, eliminate the surface charge of the wafer 20, and then be discharged from the output section 14, forming a reasonable flow path.
[0051] See Figures 2-4 , Figure 2 A front view of a wafer charge elimination device 10 in one embodiment is shown. Figure 3A side view of a wafer charge elimination device 10 in one embodiment is shown. Figure 4 A top view of a wafer charge elimination device 10 in one embodiment is shown. In one possible implementation, such as Figure 4 As shown, the main body 11 is constructed as a cylinder, and the filter unit 16 is also cylindrical.
[0052] In some embodiments, the wafer charge elimination device 10 further includes one or more gates 17 disposed on the body 11; the gates 17 have an open position and a closed position, when the gates 17 are in the open position, the wafer 20 can pass through the gates 17, and when the gates 17 are in the closed position, the chamber 12 is sealed.
[0053] Exemplarily, the door 17 is movably connected to the body 11, thus having an open position and a closed position along the movement path of the door 17 relative to the body 11. When the door 17 moves to the open position, the chamber 12 of the wafer charge elimination device 10 communicates with the outside, thereby facilitating the removal of the wafer 20 from the support structure 15 or the placement of the wafer 20 on the support structure 15. When the door 17 moves to the closed position, the door 17 seals against the body 11, isolating the chamber 12 from the outside.
[0054] Optionally, the door body 17 is provided with a sealing element. When the door body 17 is in the closed position, the sealing element is disposed between the door body 17 and the body 11 to improve the sealing effect. In one feasible implementation, the sealing element can be a sealing strip. In one feasible implementation, the door body 17 and the body 11 are rotatably connected by a hinge; in another feasible implementation, the door body 17 and the body 11 are slidably connected.
[0055] In one feasible implementation, see Figure 2 and Figure 3 There may be two gates 17, which are arranged opposite each other on both sides of the body 11 to facilitate the insertion or removal of the wafer 20.
[0056] See Figure 5 , Figure 5 A schematic diagram of the interior of the wafer charge elimination device 10 in one embodiment is shown. See also Figure 6 , Figure 6 A schematic diagram of the support structure 15 in one embodiment is shown. In some embodiments, the support structure 15 includes a support member 151 and a plurality of bosses 152 disposed on the top of the support member 151; the plurality of bosses 152 are spaced apart for supporting the wafer 20 so that the wafer 20 is spaced apart from the support member 151.
[0057] Multiple bosses 152 are spaced apart, with the bottom of each boss 152 contacting the support member 151. The tops of the multiple bosses 152 form a support plane, allowing the wafer 20 to be balanced on the support plane formed by the multiple bosses 152. For example, the bosses 152 are positioned at the edge of the support member 151 and surround the edge of the support member 151, thus providing a larger support surface and improving the stability of the wafer 20, preventing it from tipping over.
[0058] The wafer 20 is supported on the boss 152, creating a gap between the wafer 20 and the support member 151. This allows the charge-eliminating medium to enter the gap between the wafer 20 and the support member 151, making contact with the back side of the wafer 20 and eliminating the charge on the back side. Simultaneously, the boss 152 reduces the base area of the wafer 20 and the support structure 15, lowering the probability of defects in the wafer 20.
[0059] See also Figure 6 In some embodiments, the height of the top center region of the support 151 is less than the height of the edge region, so that the distance between the wafer 20 and the center region of the support 151 is greater than the distance between the wafer 20 and the edge region of the support 151. With this configuration, when the wafer 20 is placed on the boss 152, the gap between the support 151 and the wafer 20 forms an inverted conical space, with the gap in the middle being larger than the gaps on both sides.
[0060] When the charge-eliminating medium enters the chamber 12, it flows downward from the sidewall of the wafer 20 and from the bottom edge of the support 151 towards the bottom center. When the gap between the wafer 20 and the support 151 is an inverted cone shape, the charge-eliminating medium flows within the inverted cone space, forming a flow loop, i.e., a eddy current, which improves the charge elimination effect on the bottom surface of the wafer 20. During the flow process, the charge-eliminating medium can discharge charge from the back side of the wafer 20, thereby simultaneously eliminating charge on both the front and back sides of the wafer 20. Optionally, an output section 14 is formed in the central region of the support 151, or a hole structure is provided to communicate with the output section 14, so that the charge-eliminating medium can be discharged from the central region.
[0061] In one feasible implementation, the support structure 15 is configured to be rotatable, so that after the charge elimination medium is introduced, the rotation of the support structure 15 drives the wafer 20 to rotate, making the contact between the charge elimination medium and the wafer 20 uniform and improving the charge elimination effect.
[0062] In another feasible implementation, the boss 152 is configured to be conductive and grounded, thus enabling the charge on the surface of wafer 20 to be drawn out.
[0063] In some embodiments, the support member 151 has one or more through holes extending from the top to the bottom, forming an output portion 14. Thus, after the charge-eliminating medium enters the chamber 12 from the input portion 13, it distributes on the upper surface of the wafer 20, eliminating the charge on the upper surface of the wafer 20. Since the output portion 14 is located on the support member 151, the charge-eliminating medium diffuses along the lower surface edge of the wafer 20 towards the center of the support member 151, forming eddies between the support member 151 and the wafer 20. During this process, the charge on the lower surface of the wafer 20 is eliminated, and then discharged from the output portion 14.
[0064] After the charge-eliminating medium enters the gap between the support 151 and the wafer 20, it can be discharged from the through-hole, forming a complete flow path for the charge-eliminating medium. For example, the through-holes are evenly distributed in the support 151 to avoid excessive local suction that could deform the wafer 20 when the exhaust structure is provided in the output section 14.
[0065] See Figure 7 , Figure 7 A top view of the support structure 15 is shown in one embodiment. In some embodiments, a plurality of bosses 152 are evenly spaced along the edge of the support member 151. This improves the stability of the support for the wafer 20 and prevents the wafer 20 from shifting due to the flow of the charge-eliminating medium. Optionally, a high-friction material may be added to the bosses 152 to prevent the wafer 20 from sliding.
[0066] See Figure 5 In some embodiments, the wafer charge elimination device 10 further includes a spray structure 18. In order to uniformly disperse the charge elimination medium on the upper surface of the wafer 20, this embodiment adds a spray structure 18 for spraying the charge elimination medium.
[0067] See also Figure 8 and Figure 9 , Figure 8 A front view of the spray structure 18 in one embodiment is shown. Figure 9 A top view of a spray structure 18 in one embodiment is shown. The spray structure 18 is configured as a ring and is disposed above the support structure 15; the inlet of the spray structure 18 communicates with the input section 13, and the spray structure has a plurality of nozzles 181 along the ring facing the support structure 15.
[0068] For example, the spray structure 18 is disposed above the support structure 15 and is spaced apart from the support structure 15. When the wafer 20 is placed above the support structure 15, the spray structure 18 and the wafer 20 are also spaced apart.
[0069] The annular structure is designed to match the structure of wafer 20. Generally, wafer 20 is circular, therefore the spray structure 18 is annular. Exemplarily, the specifications of the spray structure 18 can be consistent with the specifications of wafer 20, so that the charge-eliminating medium sprayed from nozzle 181 can be precisely dispersed on the upper surface of wafer 20.
[0070] The inlet of the spray structure 18 refers to the location where the charge-eliminating medium enters the spray structure 18. After the charge-eliminating medium is input into the spray structure 18, it is sprayed onto the upper surface of the wafer 20 by the nozzle 181 to eliminate the charge on the upper surface of the wafer 20. Under the action of the suction structure, the charge-eliminating medium flows from the upper surface of the wafer 20 to the gap between the wafer 20 and the support member 151 to eliminate the charge on the lower surface of the wafer 20, and then is discharged from the output section 14.
[0071] Secondly, this application also provides a wafer charge elimination system, which includes a wafer charge elimination device 10 and a transport structure (not shown in the figure), the transport structure being connected to an input section 13 for transporting a charge elimination medium to the input section 13.
[0072] In some embodiments, the wafer charge elimination system further includes a evacuation structure connected to the output unit 14 to evacuate the chamber 12, thereby reducing the gas chamber effect. Specifically, if the charge elimination medium continues to exist in the chamber 12, it may cause further damage to the wafer 20. Therefore, by adding a evacuation structure to evacuate the chamber 12, the flow rate of the charge elimination structure in the chamber 12 can be accelerated, preventing it from accumulating in the chamber and damaging the wafer 20.
[0073] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0074] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.
Claims
1. A wafer charge elimination device, characterized in that, The wafer charge elimination device includes: The body has a cavity, and the body has an input section and an output section communicating with the cavity. The input section is used to input a charge elimination medium, and the output section is used to output the charge elimination medium. A support structure is disposed within the cavity and is used to support the wafer.
2. The wafer charge elimination device according to claim 1, characterized in that, The wafer charge elimination device further includes a filtering unit, which is disposed in the input section and is used to filter the charge elimination medium input into the chamber.
3. The wafer charge elimination device according to claim 1, characterized in that, The input section is located on the side wall of the main body, and the output section is located on the bottom of the main body.
4. The wafer charge elimination device according to claim 1, characterized in that, The wafer charge elimination device further includes one or more gates disposed on the main body; the gates have an open position and a closed position, when the gates are in the open position, the wafer can pass through the gates, and when the gates are in the closed position, the chamber is sealed.
5. The wafer charge elimination device according to claim 1, characterized in that, The support structure includes a support member and a plurality of bosses disposed on the top of the support member; the plurality of bosses are spaced apart for supporting the wafer so that the wafer is spaced apart from the support member.
6. The wafer charge elimination device according to claim 5, characterized in that, The height of the top center region of the support is less than the height of the edge region, so that the distance between the wafer and the center region of the support is greater than the distance between the wafer and the edge region of the support.
7. The wafer charge elimination device according to claim 6, characterized in that, The support member has one or more through holes extending from the top to the bottom, and the through holes form the output section.
8. The wafer charge elimination device according to claim 5, characterized in that, The plurality of the bosses are evenly spaced along the edge of the support member.
9. The wafer charge elimination device according to claim 1, characterized in that, The wafer charge elimination device further includes a spray structure, which is constructed in a ring shape and disposed above the support structure; the inlet of the spray structure is connected to the input part, and the spray structure has a plurality of nozzles along the ring facing the support structure.
10. A wafer charge elimination system, characterized in that, The wafer charge elimination system includes: The wafer charge elimination device according to any one of claims 1-9; and A conveying structure, which is connected to the input section, is used to convey the charge elimination medium to the input section.