Double-sided chip embedded circuit board
By applying conductive film layers to the top and bottom surfaces of the circuit board and setting heat dissipation fins on the back of the chip packaging unit, the problems of crowded layout and poor stability of traditional chip embedding circuit boards are solved, achieving a reasonable layout of electrical performance and improved heat dissipation performance.
Patent Information
- Application Number
- CN202423004983.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-05
- Publication Date
- 2025-11-04
- Estimated Expiration
- 2034-12-05
AI Technical Summary
Traditional chip embedding circuit board designs only utilize the front side of the circuit board, resulting in a crowded front layout and poor stability.
Conductive film layers are applied to the upper and lower surfaces of the circuit board. After the chip packaging unit is embedded in the prefabricated circuit board, the upper conductive film layer is used for electrode lead-out and circuit module connection, the lower conductive film layer is used for laying out other functional modules, and heat dissipation fins are set on the back of the chip packaging unit.
This achieves a reasonable layout of electrical performance, improves the stability and heat dissipation performance of the circuit board, and avoids increasing costs by adding conductive layers.
Smart Images

Figure CN223515105U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of automotive parts technology, and more specifically, to a double-sided chip embedded circuit board. Background Technology
[0002] In vehicle inverters, a design that embeds chips into circuit boards is used to improve the integration of the circuit boards.
[0003] Traditional chip-embedded circuit board designs utilize only the front side of the circuit board. After embedding the chip, wiring and other functional module designs are carried out on the front side, rarely utilizing the back side. All electrical performance is implemented on the front side, resulting in a crowded front layout and poor stability.
[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this utility model, and therefore may include information that does not constitute prior art known to those skilled in the art. Utility Model Content
[0005] In view of this, the present invention provides a double-sided chip embedded circuit board. After embedding the chip packaging unit into the prefabricated circuit board, conductive film layers are respectively attached to the upper and lower surfaces of the prefabricated circuit board. The upper conductive film layer is used for the electrode lead-out of the chip packaging unit, and the lower conductive film layer can be used to arrange other functional modules of the circuit board, so that the electrical performance layout of the double-sided chip embedded circuit board is reasonable and has better stability.
[0006] According to one aspect of the present invention, a double-sided chip embedded circuit board is provided, comprising: a pre-fabricated circuit board having conductive layers on its upper and lower surfaces; a chip packaging unit embedded in the pre-fabricated circuit board; an upper conductive film layer attached to the upper surface of the pre-fabricated circuit board via an upper dielectric layer and covering the chip packaging unit, wherein electrodes of the chip packaging unit are led out to the surface of the upper conductive film layer; and a lower conductive film layer attached to the lower surface of the pre-fabricated circuit board via a lower dielectric layer and exposing the back side of the chip packaging unit, wherein heat dissipation fins are provided on the back side of the chip packaging unit.
[0007] In some embodiments, the heat dissipation fins are evenly distributed, and the diameter of each heat dissipation fin and / or the gap between adjacent heat dissipation fins is 1mm to 2mm.
[0008] In some embodiments, the chip packaging unit includes a busbar and a chip unit embedded in the busbar, and the heat dissipation fins are formed on the back side of the busbar, creating a structure recessed into the busbar.
[0009] In some embodiments, a busbar with a thickness of at least 1 mm is left between the heat dissipation pins and the chip unit.
[0010] In some embodiments, the heat dissipation pins are connected to the back side of the chip packaging unit, forming a structure that protrudes outward from the chip packaging unit.
[0011] In some embodiments, the heat dissipation pins are soldered or glued to the back side of the chip packaging unit.
[0012] In some embodiments, the heat dissipation fins are recessed into the end face of the lower conductive film layer, so that a cooler insertion slot is reserved between the back side of the chip packaging unit and the lower conductive film layer and the lower dielectric layer.
[0013] In some embodiments, the double-sided chip embedded circuit board further includes: pads disposed on the surface of the upper conductive film layer and connected to the electrode leads of the chip packaging unit; and a protective layer covering the area of the upper conductive film layer not covered by the pads and flush with the pads.
[0014] The beneficial effects of this utility model compared with the prior art include at least the following:
[0015] The double-sided chip embedded circuit board provided by this utility model embeds the chip packaging unit into a prefabricated circuit board, and then covers the upper and lower surfaces of the prefabricated circuit board with conductive film layers respectively. The upper conductive film layer is used for the electrode lead-out of the chip packaging unit, connecting the power supply, and connecting with the drive / control circuit modules of the inverter. The lower conductive film layer can be used to lay out other functional modules of the circuit board, so that the electrical performance layout of the double-sided chip embedded circuit board is reasonable and has better stability.
[0016] The back of the chip packaging unit is provided with heat dissipation fins, and the lower conductive film layer and the lower dielectric layer are exposed on the back of the chip packaging unit, so that the double-sided chip embedded circuit board has better heat dissipation performance and avoids affecting the heat dissipation of the chip packaging unit due to the addition of the lower conductive film layer.
[0017] In addition, this invention provides a conductive film layer on the upper and lower surfaces of the prefabricated circuit board, so that the double-sided chip embedded circuit board is formed into a four-layer board (referring to four conductive layers) structure. This not only improves the electrical performance of the double-sided chip embedded circuit board, but also avoids increasing the cost by adding more conductive layers, thus achieving a balance between cost and performance.
[0018] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit the present invention. Attached Figure Description
[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments conforming to the present invention and, together with the description, serve to explain the principles of the present invention. It is obvious that the drawings described below are merely some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0020] Figure 1 This diagram shows a cross-sectional view of a double-sided chip embedded circuit board according to an embodiment of the present invention.
[0021] Figure 2 This diagram shows a cross-sectional view of another double-sided chip embedded circuit board according to an embodiment of the present invention. Detailed Implementation
[0022] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to those described herein. Rather, these embodiments are provided to make the present invention more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.
[0023] The accompanying drawings are merely illustrative of the present invention and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore, repeated descriptions of them will be omitted.
[0024] In the description of this utility model, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, in the description of this utility model, when it is said that a device is "connected" to another device, this includes not only direct connection but also indirect connection through other elements.
[0025] It should be noted that, unless otherwise specified, the embodiments of this utility model and the features in different embodiments can be combined with each other.
[0026] Figure 1 The diagram illustrates a cross-sectional structure of a double-sided embedded chip circuit board. Figure 2 This diagram illustrates a cross-sectional structure of yet another type of double-sided embedded chip circuit board; combined with Figure 1 and Figure 2 As shown, the double-sided chip embedded circuit board provided in this embodiment of the present invention includes:
[0027] The prefabricated circuit board 110 has conductive layers 111 on its upper and lower surfaces, respectively.
[0028] The chip packaging unit 120 is embedded in the prefabricated circuit board 110;
[0029] The upper conductive film layer 132 is attached to the upper surface of the prefabricated circuit board 110 through the upper dielectric layer 131 and covers the chip packaging unit 120. The electrodes of the chip packaging unit 120 are led out to the surface of the upper conductive film layer 132.
[0030] The lower conductive film layer 142 is attached to the lower surface of the prefabricated circuit board 110 through the lower dielectric layer 141 and exposes the back side of the chip packaging unit 120. The back side of the chip packaging unit 120 is provided with heat dissipation fins 126.
[0031] A substrate 112, formed of a resin mixture or other material, is sandwiched between the upper and lower conductive layers 111 of the prefabricated circuit board 110. The upper and lower surfaces of the substrate 112 may be coated with copper films to form the upper and lower conductive layers 111. A chip packaging unit 120 is embedded in the prefabricated circuit board 110, and its electrical connection to the prefabricated circuit board 110 can be achieved through the conductive layers 111 and the busbar 121 of the chip packaging unit 120. The upper conductive film layer 132 and the lower conductive film layer 142 may be copper layers, and the upper dielectric layer 131 and the lower dielectric layer 141 may be a resin composition, but are not limited thereto.
[0032] The double-sided chip embedded circuit board provided by this utility model embeds the chip packaging unit 120 into the prefabricated circuit board 110, and then covers the upper and lower surfaces of the prefabricated circuit board 110 with conductive film layers respectively. The upper conductive film layer 132 is used for the electrode lead-out of the chip packaging unit 120, connecting to the power supply, and connecting to the drive / control circuit modules of the inverter. The lower conductive film layer 142 can be used to lay out other functional modules of the circuit board, so that the electrical performance layout of the double-sided chip embedded circuit board is reasonable and has better stability.
[0033] The back of the chip packaging unit 120 is also provided with heat dissipation fins 126, and the lower conductive film layer 142 and the lower dielectric layer 141 are exposed on the back of the chip packaging unit 120, so that the double-sided chip embedded circuit board has better heat dissipation performance and avoids the heat dissipation of the chip packaging unit 120 being affected by the addition of the lower conductive film layer 142.
[0034] Furthermore, this invention provides a conductive film layer on the upper and lower surfaces of the prefabricated circuit board 110, thereby forming a four-layer board structure for the double-sided chip embedded circuit board (referring to four conductive layers, namely the upper and lower conductive layers 111 of the prefabricated circuit board 110, as well as the upper conductive film layer 132 and the lower conductive film layer 142). This not only improves the electrical performance of the double-sided chip embedded circuit board, but also avoids increasing the cost by adding more conductive layers, thus achieving a balance between cost and performance.
[0035] In some embodiments, the heat dissipation pins 126 are uniformly distributed, and the diameter of each heat dissipation pin 126 and / or the gap between adjacent heat dissipation pins 126 is 1mm to 2mm. The heat dissipation pins 126 can increase the heat dissipation area, improve the heat dissipation performance of the chip packaging unit 120, and further improve the electrical performance and stability of the double-sided chip embedded circuit board. Given that the heat dissipation pins 126 have a certain strength and there is a certain gap between adjacent heat dissipation pins, the finer and denser the heat dissipation pins 126 are, the better the heat dissipation effect. In one specific implementation, the diameter of the heat dissipation pins 126 and the gap between adjacent heat dissipation pins 126 are both 1mm, but this is not a limitation.
[0036] In some embodiments, the chip packaging unit 120 includes a busbar 121 and a chip unit 122 embedded in the busbar 121. Heat dissipation fins 126 are formed on the back side of the busbar 121, creating a structure recessed within the busbar 121. See [specific details]. Figure 1 As shown. In this embodiment, heat dissipation fins 126 can be formed by slotting the back side of the busbar 121.
[0037] Furthermore, in this embodiment, a busbar 121 with a thickness of at least 1 mm is left between the heat dissipation pins 126 and the chip unit 122. In this way, with the heat dissipation pins 126 located on the back side of the busbar 121, it is ensured that the chip unit 122 has a busbar 121 of appropriate thickness for support, so as to protect the chip unit 122.
[0038] In some embodiments, the heat dissipation pins 126 are connected to the back side of the chip packaging unit 120, forming a structure that protrudes outward from the chip packaging unit 120. See [specific examples]. Figure 2 As shown. In this embodiment, the heat dissipation fins 126 can be formed as independent components and connected to the back of the chip packaging unit 120 by means of welding or gluing, forming a structure that protrudes outward from the busbar 121.
[0039] Furthermore, in some embodiments, regardless of whether the heat dissipation pins 126 are recessed within or protrude from the busbar 121, the heat dissipation pins 126 are recessed within the end face of the lower conductive film layer 142, thus providing a cooler insertion slot 150 between the back side of the chip packaging unit 120 and the lower conductive film layer 142 and the lower dielectric layer 141. The cooler insertion slot 150 facilitates cooler insertion, allowing the cooler to cool the heat dissipation pins 126, further improving the heat dissipation performance of the chip packaging unit 120 and enhancing the electrical performance and stability of the double-sided chip embedded circuit board.
[0040] In some embodiments, the double-sided chip embedded circuit board further includes: a pad 161 disposed on the surface of the upper conductive film layer 132 and connected to the electrode lead 124 of the chip packaging unit 120; and a protective layer 162 covering the area of the upper conductive film layer 132 not covered by the pad 161 and flush with the pad 161.
[0041] Pad 161 is used to electrically connect the electrode leads 124 of the chip package unit 120 to other electronic components of the inverter. Figure 1 and Figure 2 The illustrated double-sided embedded chip circuit board is specifically a half-bridge module in the power module of an inverter, including an upper bridge region 100a and a lower bridge region 100b. Pad 161a, connected to the drain lead 124a of the chip package unit 120 in the upper bridge region 100a, is used to connect to the positive terminal of the DC power supply. Pad 161b is connected in series with the source lead 124b of the chip package unit 120 in the upper bridge region 100a and the drain lead 124c of the chip package unit 120 in the lower bridge region 100b, and is used to connect to the motor windings driven by the inverter. Pad 161c, connected to the drain lead 124d of the chip package unit 120 in the lower bridge region 100b, is used to connect to the negative terminal of the DC power supply. Pad 161d, connected to the gate lead 124e of the chip package units 120 in both the upper and lower bridge regions 100a and 100b, is used to connect to the inverter's control circuitry.
[0042] Protective layer 162 can be an oil-based protective layer used to protect the underlying conductive layers and other functional films from external environmental corrosion. Additionally, a protective layer can also be applied to the lower surface of the double-sided chip embedded circuit board, thus providing dual protection and ensuring its stable operation.
[0043] Combination Figure 1 and Figure 2 As shown, the manufacturing process of the double-sided chip embedded circuit board provided in this embodiment of the present invention includes:
[0044] A prefabricated circuit board 110 is provided, wherein the upper and lower surfaces of the prefabricated circuit board 110 are conductive layers 111, respectively.
[0045] A chip packaging unit 120 is embedded in a prefabricated circuit board 110;
[0046] An upper dielectric layer 131 and an upper conductive film layer 132 are sequentially attached to the upper surface of the prefabricated circuit board 110, and electrode leads 124 are formed in the upper dielectric layer 131 and the upper conductive film layer 132 to lead the electrodes of the chip packaging unit 120 to the surface of the upper conductive film layer 132.
[0047] A lower dielectric layer 141 and a lower conductive film layer 142 are sequentially attached to the lower surface of the prefabricated circuit board 110, and slots are made in the lower dielectric layer 141 and the lower conductive film layer 142 to expose the back side of the chip packaging unit 120; wherein, a heat dissipation fin 126 is provided on the back side of the chip packaging unit 120, or, heat dissipation fin 126 is further formed on the back side of the chip packaging unit 120.
[0048] The upper conductive film layer 132 formed on the upper surface of the prefabricated circuit board 110 can be used for electrode lead-out of the chip packaging unit 120, power supply connection, and connection to the drive / control circuit modules of the inverter. The lower conductive film layer 142 formed on the lower surface of the prefabricated circuit board 110 can be used to arrange other functional modules of the circuit board. This makes the electrical performance layout of the double-sided chip embedded circuit board reasonable and has better stability. The double-sided chip embedded circuit board of this invention is specifically formed as a four-layer board structure, which improves the electrical performance of the double-sided chip embedded circuit board and avoids increasing costs by adding more conductive layers, thus achieving a balance between cost and performance. In addition, the double-sided chip embedded circuit board of this invention also improves heat dissipation performance through heat dissipation fins 126 provided on the back of the chip packaging unit 120, avoiding the impact of adding the lower conductive film layer 142 on the heat dissipation of the chip packaging unit 120.
[0049] Furthermore, the manufacturing process of double-sided chip embedded circuit boards also includes:
[0050] A pad 161 is formed on the surface of the upper conductive film layer 132, so that the pad 161 is connected to the electrode lead 124 of the chip packaging unit 120.
[0051] A protective layer 162 is formed on the surface of the upper conductive film layer 132, covering the area of the upper conductive film layer 132 not covered by the pads 161, and flush with the pads 161. This forms a double-sided chip-embedded circuit board that can be used as a half-bridge module in the power module of an inverter.
[0052] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications or substitutions should be considered within the protection scope of the present invention.
Claims
1. A double-sided embedded chip circuit board, characterized in that, include: A prefabricated circuit board, wherein the upper and lower surfaces of the prefabricated circuit board are conductive layers, respectively; A chip packaging unit is embedded in the prefabricated circuit board; An upper conductive film layer is attached to the upper surface of the prefabricated circuit board through an upper dielectric layer and covers the chip packaging unit. The electrodes of the chip packaging unit are led out to the surface of the upper conductive film layer. A lower conductive film layer is attached to the lower surface of the prefabricated circuit board through a lower dielectric layer and exposes the back side of the chip packaging unit. The back side of the chip packaging unit is provided with heat dissipation fins.
2. The double-sided embedded chip circuit board as described in claim 1, characterized in that, The heat dissipation fins are evenly distributed, and the diameter of each heat dissipation fin and / or the gap between adjacent heat dissipation fins is 1mm to 2mm.
3. The double-sided embedded chip circuit board as described in claim 1, characterized in that, The chip packaging unit includes a busbar and chip units embedded in the busbar. The heat dissipation pins are formed on the back of the busbar, creating a structure recessed into the busbar.
4. The double-sided embedded chip circuit board as described in claim 3, characterized in that, A busbar with a thickness of at least 1 mm is left between the heat dissipation fins and the chip unit.
5. The double-sided embedded chip circuit board as described in claim 1, characterized in that, The heat dissipation fins are connected to the back of the chip packaging unit, forming a structure that protrudes outward from the chip packaging unit.
6. The double-sided embedded chip circuit board as described in claim 5, characterized in that, The heat dissipation fins are soldered or glued to the back of the chip packaging unit.
7. The double-sided embedded chip circuit board as described in claim 1, characterized in that, The heat dissipation fins are recessed into the end face of the lower conductive film layer, so that a cooler insertion slot is reserved between the back of the chip packaging unit and the lower conductive film layer and the lower dielectric layer.
8. The double-sided embedded chip circuit board as described in claim 1, characterized in that, Also includes: The pads are disposed on the surface of the upper conductive film layer and are connected to the electrode leads of the chip packaging unit. A protective layer covers the area of the upper conductive film layer not covered by the pads and is flush with the pads.