Staggered PFC circuit and electronic equipment

By designing a simplified interleaved PFC circuit, including a power input terminal, a power output terminal, a PFC branch, a sampling unit, a current signal generation unit, and an overcurrent signal generation unit, the problems of high power consumption and low reliability in the prior art are solved, achieving the effect of reducing power consumption and improving reliability.

CN223527975UActive Publication Date: 2025-11-07SHENZHEN TOPBAND CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202423024974.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-06
Publication Date
2025-11-07
Estimated Expiration
2034-12-06

AI Technical Summary

Technical Problem

Existing interleaved PFC circuits require measuring the current of two branches, resulting in high power consumption of the sampling resistor, increased system complexity, reduced reliability, and high cost.

Method used

Design an interleaved PFC circuit, including a power input terminal, a power output terminal, at least two PFC branches, a sampling unit, a current signal generation unit, an overcurrent signal generation unit, and a controller. The circuit simplifies the circuit structure to achieve current sampling, reduce power consumption, and improve reliability.

Benefits of technology

By simplifying the circuit structure, power consumption was reduced, system reliability was improved, and costs were lowered.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN223527975U_ABST
    Figure CN223527975U_ABST
Patent Text Reader

Abstract

The utility model relates to an interlaced PFC circuit and an electronic device. The circuit comprises a power supply input end, a power supply output end, at least two PFC branches, a sampling unit, a current signal generation unit, an overcurrent signal generation unit and a controller, a first end of the PFC branch is connected with a power supply input end, a second end of the PFC branch is connected with a power supply output end, a third end of the PFC branch is connected with a first end of the sampling unit, a first input end of the current signal generation unit and an input end of the overcurrent signal generation unit, and a second input end of the current signal generation unit and a second end of the sampling unit are grounded; the output end of the current signal generation unit is connected with the controller; the output end of the overcurrent signal generation unit is connected with the controller; and the controller is respectively connected with the control ends of the PFC branches and is used for controlling the PFC branches to work. According to the utility model, current sampling can be realized through a simple circuit, and the product competitiveness is improved while the reliability of the whole circuit is ensured.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD

[0001] The utility model relates to power supply technical field more specifically, relate to a kind of staggered PFC circuit and electronic equipment. BACKGROUND

[0002] Digital power supply is widely used, from telecom power supply and base station to air conditioner and other household appliances, everywhere. All these applications commonly use power factor correction (PFC) stage to improve input power factor, voltage regulation and total harmonic distortion (THD) of input current. Without PFC, the injected current will generate larger harmonic components due to discontinuity in a short time. This in turn leads to higher grid losses, radiation and total harmonic distortion. When the power stage is high, the power density and cost of single-path PFC rise sharply, and the reliability decreases, resulting in a decrease in overall system efficiency.

[0003] The current is more staggered PFC, the common staggered PFC needs to measure the current of two branches, which requires two sampling resistors, two sets of sampling circuits and two sets of protection circuits, and some need to collect total current. The power consumption of the sampling resistor is relatively high, and the efficiency is reduced. Due to the existence of two sets of current sampling, the system complexity is increased, the reliability is reduced, and the cost is also high. SUMMARY

[0004] The technical problem to be solved by the utility model is to provide a staggered PFC circuit and electronic equipment for the above-mentioned defects of the prior art.

[0005] The technical solution adopted by the utility model to solve its technical problem is: a staggered PFC circuit is constructed, comprising: a power input end, a power output end and at least two PFC branches; and a sampling unit, a current signal generation unit, an overcurrent signal generation unit and a controller;

[0006] The first end of the PFC branch is connected to the power input end, the second end of the PFC branch is connected to the power output end, the third end of the PFC branch is connected to the first end of the sampling unit, the first input end of the current signal generation unit and the input end of the overcurrent signal generation unit, and the second input end of the current signal generation unit and the second end of the sampling unit are grounded;

[0007] The output end of the current signal generation unit is connected to the controller, for generating a current sampling signal and inputting to the controller;

[0008] An output end of the overcurrent signal generating unit is connected to the controller for generating an overcurrent level and inputting to the controller.

[0009] The controller is connected to control ends of the PFC branches respectively for generating control levels to control the PFC branches to work.

[0010] Preferably, in the embodiment of the staggered PFC circuit, the current signal generating unit comprises a filter amplification circuit.

[0011] A first input end of the filter amplification circuit is connected to a first end of the sampling unit, a second input end of the filter amplification circuit is connected to a second end of the sampling unit, and an output end of the filter amplification circuit is connected to a level input end of the controller.

[0012] Preferably, in the embodiment of the staggered PFC circuit, the filter amplification circuit comprises a first operational amplifier chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a first diode.

[0013] A non-inverting input end of the first operational amplifier chip is connected to a first end of the first resistor, a second end of the first resistor is connected to a first end of the first capacitor, a first end of the second capacitor and a first end of the third resistor, and a second end of the third resistor is connected to a first end of the sampling unit.

[0014] An inverting input end of the first operational amplifier chip is connected to a first end of the second resistor and a first end of the fifth resistor, a second end of the second resistor is connected to a second end of the first capacitor, a first end of the third capacitor and a first end of the fourth resistor, and a second end of the fourth resistor is connected to a second end of the sampling unit.

[0015] The output end of the first operational amplifier chip is the output end of the filter amplification circuit and is connected to a second end of the fifth resistor and a first end of the sixth resistor, a second end of the sixth resistor is connected to a first end of the fourth capacitor and an anode of the first diode, a cathode of the first diode is connected to a power supply end of the first operational amplifier chip, and a second end of the first capacitor and a second end of the fourth capacitor are grounded.

[0016] Preferably, in the embodiment of the staggered PFC circuit, the overcurrent signal generating unit comprises a comparison circuit and a reference signal generating circuit.

[0017] The first input end of the comparison circuit is connected with the first end of the sampling unit, the second input end of the comparison circuit is connected with the output end of the reference signal generation circuit, the output end of the comparison circuit is connected with the controller, and the input end of the reference signal generation circuit is connected with a power supply.

[0018] Preferably, in the embodiment of the staggered PFC circuit, the comparison circuit comprises a second operational amplifier chip, a seventh resistor, an eighth resistor, a ninth resistor, a fifth capacitor and a sixth capacitor.

[0019] The non-inverting input end of the second operational amplifier chip is used for receiving the output end of the reference signal generation circuit, the inverting input end of the second operational amplifier chip is connected with the first end of the seventh resistor and the first end of the fifth capacitor, the second end of the seventh resistor is connected with the first end of the sampling unit, the output end of the second operational amplifier chip is connected with the first end of the eighth resistor and the first end of the ninth resistor, the second end of the eighth resistor is the output end of the comparison circuit and is connected with the first end of the sixth capacitor, the second end of the ninth resistor is connected with the power supply end of the second operational amplifier chip, and the second end of the fifth capacitor and the second end of the sixth capacitor are grounded.

[0020] The reference signal generation circuit comprises a tenth resistor, an eleventh resistor and a seventh capacitor.

[0021] The first end of the tenth resistor is the input end of the reference signal generation circuit, the second end of the tenth resistor is the output end of the reference signal generation circuit and is connected with the first end of the eleventh resistor and the first end of the seventh capacitor, and the second end of the eleventh resistor and the second end of the seventh capacitor are grounded.

[0022] Preferably, in the embodiment of the staggered PFC circuit, the sampling unit comprises a sampling resistor, the first end of the sampling resistor is the first end of the sampling unit, and the second end of the sampling resistor is the second end of the sampling unit.

[0023] Preferably, in the embodiment of the staggered PFC circuit, the input voltage sampling unit and the output voltage sampling unit are further comprised.

[0024] The input end of the input voltage sampling unit is connected with the first end of the PFC branch, and the output end of the input voltage sampling unit is connected with the controller.

[0025] The input end of the output voltage sampling unit is connected with the second end of the PFC branch, and the output end of the output voltage sampling unit is connected with the controller.

[0026] Preferably, in the embodiment of the staggered PFC circuit, the input voltage sampling unit comprises a twelfth resistor, a thirteenth resistor and a second diode; a first end of the twelfth resistor is an input end of the input voltage sampling unit, a second end of the twelfth resistor is an output end of the input voltage sampling unit and is connected with a first end of the thirteenth resistor and a cathode of the second diode, an anode of the second diode is connected with a power supply voltage, and a second end of the thirteenth resistor is grounded.

[0027] The output voltage sampling unit comprises a fourteenth resistor, a fifteenth resistor and a third diode; a first end of the fourteenth resistor is an input end of the output voltage sampling unit, a second end of the fourteenth resistor is an output end of the output voltage sampling unit and is connected with a first end of the fifteenth resistor and a cathode of the third diode, an anode of the third diode is connected with a power supply voltage, and a second end of the fifteenth resistor is grounded.

[0028] Preferably, in the embodiment of the staggered PFC circuit, the PFC branch comprises a PFC inductor, a boost diode, a PFC switch tube and a voltage dividing circuit.

[0029] A first end of the PFC inductor is a first end of the PFC branch, a second end of the PFC inductor is connected with a first end of the PFC switch tube and an anode of the boost diode, and a cathode of the boost diode is a second end of the PFC branch.

[0030] A second end of the PFC switch tube is a third end of the PFC branch and is connected with a first end of the voltage dividing circuit, a control end of the PFC switch tube is connected with a voltage dividing output end of the voltage dividing circuit, and a second end of the voltage dividing circuit is a control end of the PFC branch.

[0031] The utility model also provides an electronic equipment, including above-mentioned staggered PFC circuit, wherein, the power input end of staggered PFC circuit is used for connecting the power input end of electronic equipment, and the power output end of staggered PFC circuit is used for providing operating voltage for electronic equipment.

[0032] The utility model discloses a kind of staggered PFC circuit and electronic equipment, with following beneficial effects: current sampling is realized by simple circuit, ensure the reliability of entire circuit, improve product competitiveness at the same time. BRIEF DESCRIPTION OF DRAWINGS

[0033] The utility model will be further described below by combining with drawings and embodiment, and in drawings:

[0034] Figure 1is a logic block diagram of an embodiment of the staggered PFC circuit.

[0035] Figure 2 is a circuit principle diagram of an embodiment of the staggered PFC circuit. DETAILED DESCRIPTION

[0036] In order to have a clearer understanding of the technical features, objects and effects of the present application, the specific embodiments of the present application will be described in detail with reference to the drawings.

[0037] As shown in Figure 1 , an embodiment of the staggered PFC circuit of the present application is shown. In Figure 1 the embodiment of the staggered PFC circuit of the present application shown, it comprises: a power input end 110, a power output end 130 and at least two PFC branches 120; and a sampling unit 140, a current signal generating unit 150, an overcurrent signal generating unit 160 and a controller 170; the first end of the PFC branch 120 is connected to the power input end 110, the second end of the PFC branch 120 is connected to the power output end 130, the third end of the PFC branch 120 is connected to the first end of the sampling unit 140, the first input end of the current signal generating unit 150 and the input end of the overcurrent signal generating unit 160, the second input end of the current signal generating unit 150 and the second end of the sampling unit 140 are grounded; the output end of the current signal generating unit 150 is connected to the controller 170, for generating a current sampling signal and inputting to the controller 170; the output end of the overcurrent signal generating unit 160 is connected to the controller 170, for generating an overcurrent level and inputting to the controller 170; the controller 170 is connected to the control end of the PFC branch 120 respectively, for generating a control level to control the PFC branch 120 to work.

[0038] Specifically, the interleaved PFC circuit is composed of a plurality of PFC branches 120, each of which is connected between the power input end 110 and the power output end 130 to convert the power input of the power input end 110 and form a power output at the power output end 130. The number of PFC branches 120 includes but is not limited to two. Taking two PFC branches 120 as an example, the two PFC branches 120 are respectively controlled by the controller 170 to generate control levels such as PWM levels to realize the working process of each PFC branch 120. In a specific embodiment, the generated PWM level can be used to control each PFC branch 120 to work at different time periods to form a power output at the power output end 130. Simply put, the two PFC branches 120 form a time staggered working mode. The third end of each PFC branch 120 is connected to the sampling unit 140, because the working time of each PFC branch 120 can be set to be different, the sampling unit 140 can respectively sample the working parameters of each PFC branch 120. The current signal generating unit 150 is connected to the sampling unit 140, which is used to obtain the sampling current of each PFC branch 120 through the sampling unit 140 and generate a corresponding current sampling signal. The controller 170 is connected to the current signal generating unit 150 and receives the current sampling signal to control the working process of the corresponding PFC branch 120 according to the current sampling signal. Here, the controller 170 is a PFC controller, including but not limited to the commonly used modules or circuits at present, such as an MCU and its peripheral circuit. The PFC controller can use the current common control logic to control the working process of the PFC branch 120, which is not limited in the embodiment of the present application. The overcurrent signal generating unit 160 is connected to the sampling unit 140 to obtain the overcurrent state of the PFC branch 120 according to the sampling result and generate a corresponding overcurrent level. The controller 170 obtains the judgment result of whether the PFC branch 120 is overcurrent according to the overcurrent level to control the working process of the corresponding PFC branch. This control process can also be realized by using the current common control logic, which is not limited in the embodiment.

[0039] As shown in Figure 2 In an embodiment, the current signal generating unit 150 includes a filter amplification circuit. The first input end of the filter amplification circuit is connected to the first end of the sampling unit 140, the second input end of the filter amplification circuit is connected to the second end of the sampling unit 140, and the output end of the filter amplification circuit is connected to the level input end of the controller 170. Specifically, the filter amplification circuit in the current signal generating unit 150 filters and amplifies the sampling signal to obtain a clean current sampling signal.

[0040] Further, the filter-amplification circuit includes a first operational amplifier chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a first diode; the non-inverting input terminal of the first operational amplifier chip is connected with the first terminal of the first resistor, the second terminal of the first resistor is connected with the first terminal of the first capacitor, the first terminal of the second capacitor and the first terminal of the third resistor, the second terminal of the third resistor is connected with the first terminal of the sampling unit 140; the inverting input terminal of the first operational amplifier chip is connected with the first terminal of the second resistor and the first terminal of the fifth resistor, the second terminal of the second resistor is connected with the second terminal of the first capacitor, the first terminal of the third capacitor and the first terminal of the fourth resistor, the second terminal of the fourth resistor is connected with the second terminal of the sampling unit 140; the output terminal of the first operational amplifier chip is the output terminal of the filter-amplification circuit and is connected with the second terminal of the fifth resistor and the first terminal of the sixth resistor, the second terminal of the sixth resistor is connected with the first terminal of the fourth capacitor and the anode of the first diode, the cathode of the first diode is connected with the power supply terminal of the first operational amplifier chip, and the second terminal of the first capacitor and the second terminal of the fourth capacitor are grounded. Specifically, the first operational amplifier chip includes an operational amplifier chip U1A, the first resistor includes a resistor R16, the second resistor includes a resistor R18, the third resistor includes a resistor R9, the fourth resistor includes a resistor R10, the fifth resistor includes a resistor R19, the sixth resistor includes a resistor R17, the first capacitor includes a capacitor C6, the second capacitor includes a capacitor C7, the third capacitor includes a capacitor C1, and the fourth capacitor includes a capacitor C5. The resistor R9, the resistor R10, the capacitor C1, the capacitor C6 and the capacitor C7 constitute a low-pass filter, which filters the sampling input signal, for example, filters the interference signal generated in the working of the PFC branch 120. The operational amplifier chip U1A is used to amplify the signal to obtain the level required by the controller 170.

[0041] In an embodiment, the overcurrent signal generation unit 160 includes a comparison circuit and a reference signal generation circuit; the first input terminal of the comparison circuit is connected with the first terminal of the sampling unit 140, the second input terminal of the comparison circuit is connected with the output terminal of the reference signal generation circuit, the output terminal of the comparison circuit is connected with the controller 170, and the input terminal of the reference signal generation circuit is connected with a power supply. That is, in the overcurrent signal generation unit 160, the reference signal is generated by the reference signal generation circuit, the sampling signal is compared with the reference signal by the comparison circuit, the corresponding high / low level is output, and the judgment result of whether the overcurrent occurs in the PFC branch 120 is obtained through the high / low level.

[0042] Further, the comparison circuit includes a second operational amplifier chip, a seventh resistor, an eighth resistor, a ninth resistor, a fifth capacitor and a sixth capacitor; the non-inverting terminal of the second operational amplifier chip is configured to receive the output terminal of the reference signal generation circuit, the inverting terminal of the second operational amplifier chip is connected to the first terminal of the seventh resistor and the first terminal of the fifth capacitor, the second terminal of the seventh resistor is connected to the first terminal of the sampling unit 140, the output terminal of the second operational amplifier chip is connected to the first terminal of the eighth resistor and the first terminal of the ninth resistor, the second terminal of the eighth resistor is the output terminal of the comparison circuit and is connected to the first terminal of the sixth capacitor, the second terminal of the ninth resistor is connected to the power supply terminal of the second operational amplifier chip, and the second terminal of the fifth capacitor and the second terminal of the sixth capacitor are grounded. Figure 2 In the specific implementation, the second operational amplifier chip includes an operational amplifier chip U2, the seventh resistor includes a resistor R14, the eighth resistor includes a resistor R13, the ninth resistor includes a resistor R12, the fifth capacitor includes a capacitor C4, and the sixth capacitor includes a capacitor C2. The sampling signal of the sampling unit 140 is input to the operational amplifier chip U2 after passing through the resistor R14, and the operational amplifier chip U2 compares the sampling signal with the reference signal and outputs the corresponding comparison result.

[0043] Optionally, the reference signal generation circuit includes a tenth resistor, an eleventh resistor and a seventh capacitor; the first terminal of the tenth resistor is the input terminal of the reference signal generation circuit, the second terminal of the tenth resistor is the output terminal of the reference signal generation circuit and is connected to the first terminal of the eleventh resistor and the first terminal of the seventh capacitor, and the second terminal of the eleventh resistor and the second terminal of the seventh capacitor are grounded. Specifically, the tenth resistor includes a resistor R11, the eleventh resistor includes a resistor R15, and the seventh capacitor includes a capacitor C3. The resistor R15 and the resistor R11 form a voltage dividing circuit and form a voltage division at the second terminal of the resistor R11 to obtain a reference voltage.

[0044] Optionally, the sampling unit 140 includes a sampling resistor, the first terminal of the sampling resistor is the first terminal of the sampling unit 140, and the second terminal of the sampling resistor is the second terminal of the sampling unit 140. Specifically, the sampling resistor includes a resistor RS1, and current sampling is performed through the resistor RS1 to obtain a corresponding sampling signal.

[0045] In an embodiment, the staggered PFC circuit further comprises an input voltage sampling unit 210 and an output voltage sampling unit 220; the input end of the input voltage sampling unit 210 is connected to the first end of the PFC branch 120, and the output end of the input voltage sampling unit 210 is connected to the controller 170; the input end of the output voltage sampling unit 220 is connected to the second end of the PFC branch 120, and the output end of the output voltage sampling unit 220 is connected to the controller 170. The input voltage sampling unit 210 is used to sample the input voltage of the PFC branch 120, which can be understood as sampling the AC input, so as to refer to the AC input in the control process of the PFC branch 120 to perform the specific control process. The input voltage sampling unit 210 is used to sample the output voltage of the PFC branch 120, which can be understood as sampling the DC output, so as to refer to the DC output in the control process of the PFC branch 120 to perform the specific control process.

[0046] In an embodiment, the power input end can comprise a rectifier bridge to rectify the AC input through the rectifier bridge to provide the power input.

[0047] Optionally, the input voltage sampling unit 210 comprises a twelfth resistor, a thirteenth resistor and a second diode; the first end of the twelfth resistor is the input end of the input voltage sampling unit 210, the second end of the twelfth resistor is the output end of the input voltage sampling unit 210 and is connected to the first end of the thirteenth resistor and the cathode of the second diode, the anode of the second diode is connected to a power supply voltage, and the second end of the thirteenth resistor is grounded. Specifically, in the input voltage sampling unit 210, the twelfth resistor comprises a resistor R1, the thirteenth resistor comprises a resistor R2, and the second diode comprises a diode D3. The resistor R1 and the resistor R2 form a voltage dividing circuit to divide the input of the PFC branch 120 to obtain a corresponding input voltage sampling signal and input to the controller 170.

[0048] Optionally, the output voltage sampling unit 220 comprises a fourteenth resistor, a fifteenth resistor and a third diode; the first end of the fourteenth resistor is the input end of the output voltage sampling unit 220, the second end of the fourteenth resistor is the output end of the output voltage sampling unit 220 and is connected to the first end of the fifteenth resistor and the cathode of the third diode, the anode of the third diode is connected to a power supply voltage, and the second end of the fifteenth resistor is grounded. Specifically, in the output voltage sampling unit 220, the fourteenth resistor comprises a resistor R5, the sixteenth resistor comprises a resistor R8, and the third diode comprises a diode D4. The resistor R5 and the resistor R8 form a voltage dividing circuit to divide the output of the PFC branch 120 to obtain a corresponding output voltage sampling signal and input to the controller 170.

[0049] As Figure 2As shown, the PFC branch 120 includes a PFC inductor, a boost diode, a PFC switch tube and a voltage dividing circuit; a first end of the PFC inductor is a first end of the PFC branch 120, a second end of the PFC inductor is connected to a first end of the PFC switch tube and an anode of the boost diode, a cathode of the boost diode is a second end of the PFC branch 120; a second end of the PFC switch tube is a third end of the PFC branch 120 and is connected to a first end of the voltage dividing circuit, a control end of the PFC switch tube is connected to a voltage dividing output end of the voltage dividing circuit, and a second end of the voltage dividing circuit is a control end of the PFC branch 120. Specifically, each PFC branch 120 can include a PFC inductor, a boost diode, a PFC switch tube and a voltage dividing circuit. In a specific embodiment, the PFC inductor includes an inductor L1, the boost diode includes a diode D1, the PFC switch tube includes a MOS tube Q1, and the voltage dividing circuit includes a resistor R3 and a resistor R6. The control level output by the controller 170 is divided by the resistor R3 and the resistor R6, and then controls the MOS tube Q1 to be turned on or turned off, so as to realize the turn-on or turn-off of the PFC direct current.

[0050] In addition, the utility model discloses an electronic device, including the staggered PFC circuit as above;Wherein, the power input end 110 of staggered PFC circuit is used for connecting the power input end 110 of electronic device, and the power output end 130 of staggered PFC circuit is used for providing working voltage for electronic device. That is, through the staggered PFC circuit, the working circuit inside the electronic device is powered, and the electronic device can be a power supply device or an electrical appliance powered by a power supply device.

[0051] It can be understood that the above embodiments only express the preferred embodiments of the utility model, and the description is more specific and detailed, but it cannot be understood as the limitation of the utility model patent scope;It should be pointed out that for ordinary skilled person in the art, the above technical features can be freely combined without departing from the concept of the utility model, and some deformations and improvements can be made, which all belong to the protection scope of the utility model;Therefore, all equivalent transformations and modifications within the scope of the claims of the utility model should belong to the scope of the claims of the utility model.

Claims

1. An interleaved PFC circuit, characterized by, The application relates to a power factor correction (PFC) circuit, which comprises a power input end, a power output end and at least two PFC branches; a sampling unit, a current signal generating unit, an overcurrent signal generating unit and a controller; a first end of the PFC branch is connected to the power input end, a second end of the PFC branch is connected to the power output end, a third end of the PFC branch is connected to a first end of the sampling unit, a first input end of the current signal generating unit and an input end of the overcurrent signal generating unit, a second input end of the current signal generating unit and a second end of the sampling unit are grounded; an output end of the current signal generating unit is connected to the controller, for generating a current sampling signal and inputting the current sampling signal to the controller; an output end of the overcurrent signal generating unit is connected to the controller, for generating an overcurrent level and inputting the overcurrent level to the controller; the controller is connected to control ends of the PFC branches respectively, for generating control levels to control the PFC branches to work. The current signal generating unit comprises a filter amplification circuit; a first input end of the filter amplification circuit is connected to the first end of the sampling unit, a second input end of the filter amplification circuit is connected to the second end of the sampling unit, and an output end of the filter amplification circuit is connected to a level input end of the controller. The filter amplification circuit comprises a first operational amplifier chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor and a first diode; a non-inverting input end of the first operational amplifier chip is connected to a first end of the first resistor, a second end of the first resistor is connected to a first end of the first capacitor, a first end of the second capacitor and a first end of the third resistor, and a second end of the third resistor is connected to the first end of the sampling unit; an inverting input end of the first operational amplifier chip is connected to a first end of the second resistor and a first end of the fifth resistor, a second end of the second resistor is connected to a second end of the first capacitor, a first end of the third capacitor and a first end of the fourth resistor, and a second end of the fourth resistor is connected to the second end of the sampling unit; an output end of the first operational amplifier chip is the output end of the filter amplification circuit and is connected to a second end of the fifth resistor and a first end of the sixth resistor, a second end of the sixth resistor is connected to a first end of the fourth capacitor and an anode of the first diode, a cathode of the first diode is connected to a power supply end of the first operational amplifier chip, and a second end of the first capacitor and a second end of the fourth capacitor are grounded. The overcurrent signal generating unit comprises a comparison circuit and a reference signal generating circuit; a first input end of the comparison circuit is connected to the first end of the sampling unit, a second input end of the comparison circuit is connected to an output end of the reference signal generating circuit, an output end of the comparison circuit is connected to the controller, and an input end of the reference signal generating circuit is connected to a power supply. The comparison circuit comprises a second operational amplifier chip, a seventh resistor, an eighth resistor, a ninth resistor, a fifth capacitor and a sixth capacitor; a non-inverting input end of the second operational amplifier chip is connected to a first end of the seventh resistor, a second end of the seventh resistor is connected to a first end of the eighth resistor and a first end of the ninth resistor, a second end of the eighth resistor is connected to a first end of the fifth capacitor, a second end of the fifth capacitor is connected to a first end of the sixth capacitor, and a second end of the sixth capacitor is connected to a second end of the ninth resistor; an inverting input end of the second operational amplifier chip is connected to a first end of the fifth resistor and a first end of the sixth resistor, a second end of the fifth resistor is connected to a second end of the sixth capacitor, a second end of the sixth capacitor is connected to a second end of the eighth resistor, and a second end of the eighth resistor is connected to a second end of the ninth resistor; an output end of the second operational amplifier chip is connected to the output end of the comparison circuit. ​ ​ 2. The interleaved PFC circuit of claim 1, wherein, ​ ​ 3. The interleaved PFC circuit of claim 2, wherein, ​ ​ ​ ​ 4. The interleaved PFC circuit of claim 1, wherein, ​ ​ 5. The interleaved PFC circuit of claim 4, wherein, ​ The non-inverting terminal of the second operational amplifier chip is connected to the output terminal of the reference signal generating circuit, the inverting terminal of the second operational amplifier chip is connected to the first terminal of the seventh resistor and the first terminal of the fifth capacitor, the second terminal of the seventh resistor is connected to the first terminal of the sampling unit, the output terminal of the second operational amplifier chip is connected to the first terminal of the eighth resistor and the first terminal of the ninth resistor, the second terminal of the eighth resistor is the output terminal of the comparison circuit and is connected to the first terminal of the sixth capacitor, the second terminal of the ninth resistor is connected to the power supply terminal of the second operational amplifier chip, and the second terminals of the fifth capacitor and the sixth capacitor are grounded; and / or The reference signal generating circuit comprises a tenth resistor, an eleventh resistor and a seventh capacitor; The first terminal of the tenth resistor is the input terminal of the reference signal generating circuit, the second terminal of the tenth resistor is the output terminal of the reference signal generating circuit and is connected to the first terminal of the eleventh resistor and the first terminal of the seventh capacitor, and the second terminals of the eleventh resistor and the seventh capacitor are grounded.

6. The interleaved PFC circuit of claim 1, wherein, The sampling unit comprises a sampling resistor, the first terminal of the sampling resistor is the first terminal of the sampling unit, and the second terminal of the sampling resistor is the second terminal of the sampling unit.

7. The interleaved PFC circuit of claim 1, wherein, It also comprises an input voltage sampling unit and an output voltage sampling unit; The input terminal of the input voltage sampling unit is connected to the first terminal of the PFC branch, and the output terminal of the input voltage sampling unit is connected to the controller; The input terminal of the output voltage sampling unit is connected to the second terminal of the PFC branch, and the output terminal of the output voltage sampling unit is connected to the controller.

8. The interleaved PFC circuit according to claim 7, wherein The input voltage sampling unit comprises a twelfth resistor, a thirteenth resistor and a second diode, the first terminal of the twelfth resistor is the input terminal of the input voltage sampling unit, the second terminal of the twelfth resistor is the output terminal of the input voltage sampling unit and is connected to the first terminal of the thirteenth resistor and the cathode of the second diode, the anode of the second diode is connected to a power supply voltage, and the second terminal of the thirteenth resistor is grounded; and / or The output voltage sampling unit comprises a fourteenth resistor, a fifteenth resistor and a third diode, the first terminal of the fourteenth resistor is the input terminal of the output voltage sampling unit, the second terminal of the fourteenth resistor is the output terminal of the output voltage sampling unit and is connected to the first terminal of the fifteenth resistor and the cathode of the third diode, the anode of the third diode is connected to a power supply voltage, and the second terminal of the fifteenth resistor is grounded.

9. The interleaved PFC circuit of claim 1, wherein, The PFC branch comprises a PFC inductor, a boost diode, a PFC switch tube and a voltage dividing circuit; The first terminal of the PFC inductor is the first terminal of the PFC branch, the second terminal of the PFC inductor is connected to the first terminal of the PFC switch tube and the anode of the boost diode, and the cathode of the boost diode is the second terminal of the PFC branch; The second end of the PFC switch tube is a third end of the PFC branch, and is connected to a first end of the voltage dividing circuit; a control end of the PFC switch tube is connected to a voltage dividing output end of the voltage dividing circuit; and a second end of the voltage dividing circuit is a control end of the PFC branch.

10. An electronic device, comprising: The electronic device comprises the interleaved PFC circuit as claimed in any one of claims 1 to 9; wherein a power input end of the interleaved PFC circuit is used to be connected to a power input end of the electronic device; and a power output end of the interleaved PFC circuit is used to provide a working voltage for the electronic device.