Quad flat no-lead (QFN) packaging test device under test (DUT) board based on turret type sorting machine

Abstract

The utility model discloses a QFN packaging test DUT board based on a turret-type sorting machine, which belongs to the technical field of semiconductor circuit testing and comprises a circuit board, the circuit board is provided with an IC pin unit, an HDR port, a relay and a 64PIN port group, and each pin in the IC pin unit is connected with the HDR port, the HDR port is connected with the relay, and the relay is connected with the 64PIN port group. The HDR port is connected with the 64PIN port group through a connecting line, the HDR port or the relay is connected with a peripheral test circuit, and the 64PIN port group is electrically connected with the test machine. The device can be used for testing a plurality of products, is high in universality, does not need to be repeatedly designed, and avoids the waste of force resources and material resources.

Description

Technical Field

[0001] This utility model relates to a QFN packaged test DUT board based on a turret sorter, belonging to the field of semiconductor circuit testing technology. Background Technology

[0002] With the development of semiconductors and technological advancements, more and more new technologies and equipment are being deployed, making efficiency increasingly important. As QFN product production increases, improving efficiency and testing stability becomes paramount. However, due to inherent product design limitations, there are numerous types of test boards available. Since many test boards are not interchangeable, iterative design processes are required, leading to a waste of human and material resources. Utility Model Content

[0003] The technical problem to be solved by this utility model is to overcome the defects of the prior art and provide a QFN packaged test DUT board based on a turret sorter, which can be applied to the testing of multiple products, has strong versatility, does not require repeated design, and avoids the waste of manpower and material resources.

[0004] To solve the above-mentioned technical problems, the technical solution adopted by this utility model is as follows:

[0005] A QFN packaged test DUT board based on a turret sorter includes a circuit board. The circuit board is provided with an IC pin unit, an HDR port, a relay, and a 64-pin port group. Each pin in the IC pin unit is connected to the HDR port, the HDR port is connected to the relay, the relay is connected to the 64-pin port group, and the HDR port is connected to the 64-pin port group via connecting wires. The HDR port or relay is connected to an external test circuit, and the 64-pin port group is electrically connected to a test machine.

[0006] The 64-pin port group includes a first 64-pin port, a second 64-pin port, and a third 64-pin port arranged side by side along the length of the circuit board.

[0007] The IC pin unit, HDR port, relay, and 64-pin port group are arranged sequentially along the length of the circuit board.

[0008] The circuit board has mounting holes.

[0009] There are four mounting holes, distributed along both sides of the IC pin unit.

[0010] The relays include double-pole relays.

[0011] There are twelve relays, arranged in four rows and three columns.

[0012] The HDR port is configured with two rows and twenty-four columns.

[0013] The beneficial effects of this utility model are as follows: This utility model provides a QFN packaged test DUT board based on a turret sorter. Each pin in the IC pin unit is connected to the HDR port via a connecting wire. The HDR port or relay is connected to an external test circuit. Depending on different product requirements, it can be directly connected to the IC pin unit through the HDR port, or the external test circuit can be mounted on different relays and then converted through the HDR port. Therefore, it can achieve the function of testing different ICs. In summary, this utility model can be applied to the testing of multiple products, has strong versatility, does not require repeated design, improves the utilization efficiency of the test board, reduces the manufacturing cost of the test board, and avoids the waste of human and material resources. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the structure of a QFN packaged test DUT board based on a turret sorter according to the present invention;

[0015] The reference numerals in the diagram are as follows: 1-Circuit board; 2-IC pin unit; 3-HDR port; 4-Relay; 5-64PIN port group; 11-Mounting hole; 51-First 64PIN port; 52-Second 64PIN port; 53-Third 64PIN port. Detailed Implementation

[0016] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to illustrate the technical solution of the present invention more clearly, and should not be used to limit the protection scope of the present invention.

[0017] Example 1

[0018] like Figure 1 As shown, this utility model discloses a QFN packaged test DUT board based on a turret sorter, including a circuit board 1. The circuit board 1 has an IC pin unit 2, an HDR port 3, a relay 4, and a 64-pin port group 5. Each pin in the IC pin unit 2 is connected to the HDR port 3, the HDR port 3 to the relay 4, the relay 4 to the 64-pin port group 5, and the HDR port 3 to the 64-pin port group 5 via connecting wires. The HDR port 3 or the relay 4 is connected to an external test circuit. Since the IC circuits under test are different, different ICs can be tested through the adapter of the HDR port 3. The 64-pin port group 5 is electrically connected to the test machine.

[0019] In this invention, the product under test can be directly connected to the test channel of the tester via the 64-pin port group. At this time, the HDR port and the 64-pin port group are directly connected without going through a relay. However, when the product under test needs to isolate interference, the HDR port and the 64-pin port group are indirectly connected through a relay. The connection between the test channel of the tester and the IC under test can be switched by the relay.

[0020] The specific implementation method of this utility model is as follows: First, prepare the peripheral test circuit and put it on the test board (HDR port or relay). Then, install the test board on the test sorting machine. Finally, connect the test channel of the test machine and the test board through the 64-pin port group.

[0021] This invention can be applied to testing multiple products, has strong versatility, does not require repeated design, improves the efficiency of test board use, reduces the manufacturing cost of test board, and avoids waste of human and material resources.

[0022] Example 2

[0023] like Figure 1 As shown, this utility model discloses a QFN packaged test DUT board based on a turret sorter, including a circuit board 1. The circuit board 1 has IC pin units 2, HDR ports 3, relays 4, and a 64-pin port group 5. The IC pin units 2, HDR ports 3, relays 4, and 64-pin port group 5 are arranged sequentially along the length of the circuit board 1. The circuit board 1 has four mounting holes 11, distributed along both sides of the IC pin units 2, for easy fixing and mounting on the test sorter. The HDR ports 3 are configured in two rows of twenty-four columns. The relays 4 include twelve double-pole relays, arranged in four rows of three columns.

[0024] Each pin in IC pin unit 2 is connected to HDR port 3, HDR port 3 to relay 4, relay 4 to 64-pin port group 5, and HDR port 3 to 64-pin port group 5 via connecting wires. HDR port 3 or relay 4 is connected to external test circuitry. Since the ICs under test are different, different ICs can be tested through the adapter at HDR port 3. 64-pin port group 5 is connected to the tester's resource channels, which include relay control ports, relay power ports, test channels, time measurement channels, and digital channels.

[0025] The 64-pin port group 5 includes a first 64-pin port 51, a second 64-pin port 52, and a third 64-pin port 53 arranged side-by-side along the length of the circuit board 1. The first and second 64-pin ports 51 and 52 primarily connect the relay control ports of the tester to the control terminals of each relay via wiring. These ports also convert the 5V power supply of the tester's relays to the VCC terminal of the relays. Any remaining ports can be used as resource ports for the tester. The third 64-pin port 53 connects to the resource channels of the tester. This port is primarily a spare port; additional ports can be added to connect to other required tester resource channels if needed.

[0026] In this invention, the product under test can be directly connected to the test channel of the tester via the 64-pin port group. At this time, the HDR port and the 64-pin port group are directly connected without going through a relay. However, when the product under test needs to isolate interference, the HDR port and the 64-pin port group are indirectly connected through a relay. The connection between the test channel of the tester and the IC under test can be switched by the relay.

[0027] The above are merely preferred embodiments of this utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this utility model, and these improvements and modifications should also be considered within the scope of protection of this utility model.

Claims

1. A QFN packaged test DUT board based on a turret sorter, characterized in that: The circuit board (1) is provided with an IC pin unit (2), an HDR port (3), a relay (4) and a 64PIN port group (5). Each pin of the IC pin unit (2) is connected to the HDR port (3), the HDR port (3) is connected to the relay (4), the relay (4) is connected to the 64PIN port group (5), and the HDR port (3) is connected to the 64PIN port group (5) via connecting wires. The HDR port (3) or the relay (4) is connected to an external test circuit, and the 64PIN port group (5) is connected to a test machine.

2. The QFN packaged test DUT board based on a turret sorter according to claim 1, characterized in that: The 64-pin port group (5) includes a first 64-pin port (51), a second 64-pin port (52), and a third 64-pin port (53) arranged side by side along the length of the circuit board (1).

3. The QFN packaged test DUT board based on a turret sorter according to claim 1, characterized in that: The IC pin unit (2), HDR port (3), relay (4) and 64PIN port group (5) are arranged sequentially along the length of the circuit board (1).

4. The QFN packaged test DUT board based on a turret sorter according to claim 1, characterized in that: The circuit board (1) has mounting holes (11).

5. The QFN packaged test DUT board based on a turret sorter according to claim 4, characterized in that: The number of mounting holes (11) is four, distributed along both sides of the IC pin unit (2).

6. The QFN packaged test DUT board based on a turret sorter according to claim 1, characterized in that: The relay (4) includes a double-pole relay.

7. The QFN packaged test DUT board based on a turret sorter according to claim 1, characterized in that: The number of relays (4) is twelve, arranged in four rows and three columns.

8. The QFN packaged test DUT board based on a turret sorter according to claim 1, characterized in that: The HDR port (3) is configured as two rows of twenty-four columns.

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