Analog quantity output card

By designing an analog output card, and utilizing a main control module, isolation module, and operational amplifier conditioning module, multiple voltage outputs and range switching are achieved, solving the problem of insufficient output channels on conventional analog boards, improving testing efficiency, and reducing costs.

CN223552026UActive Publication Date: 2025-11-14WUXI TONGXIANG TECH
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Patent Information

Application Number
CN202423184303.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-23
Publication Date
2025-11-14
Estimated Expiration
2034-12-23

AI Technical Summary

Technical Problem

Conventional analog input boards have a limited number of output channels and relatively simple output values, which cannot meet the testing requirements of multiple voltage outputs, resulting in increased testing time and costs.

Method used

An analog output card was designed, comprising a main control module, an isolation module, an analog output module, and an operational amplifier conditioning module. The main control module controls the analog output module and the operational amplifier conditioning module. Multiple DA output chips and operational amplifier conditioning circuits are used to achieve multi-channel voltage output and support two output level switching. An FPGA chip and a level conversion chip are combined to ensure interface compatibility.

Benefits of technology

It enables multi-channel analog output, improves testing convenience, reduces application costs, and meets the needs of various practical application environments.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses an analog quantity output card, which relates to the technical field of analog quantity output, and comprises a main control module, an isolation module, an analog quantity output module and an operational amplifier conditioning module, the main control module is connected with the analog quantity output module through the isolation module, and the analog quantity output module is connected with the operational amplifier conditioning module; and the main control module is used for controlling the analog quantity output module to output an initial voltage signal to the operational amplifier conditioning module and controlling the output state of the operational amplifier conditioning module, so that the operational amplifier conditioning module outputs a target voltage signal based on the initial voltage signal. The analog quantity output card provided by the utility model can realize multi-path analog quantity output, and each output path has two output gears, thereby solving the problems that the number of output channels of the analog quantity output card is small and the output value is single, and improving the test convenience.
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Description

Technical Field

[0001] This utility model relates to the field of analog output technology, and in particular to an analog output card. Background Technology

[0002] During the research and development and production of remote interface units, various performance tests are required. This includes the analog quantity component, which needs to provide multiple voltage outputs for testing. The number of analog output channels required for testing is typically large. Conventional analog input boards can only output a limited number of channels with relatively simple output values, failing to meet testing needs. Using conventional boards would require configuring multiple boards, increasing testing time and cost. Utility Model Content

[0003] In response to the above-mentioned problems and technical requirements, the inventors have proposed an analog output card.

[0004] The technical solution of this utility model is as follows:

[0005] An analog output card includes a main control module, an isolation module, an analog output module, and an operational amplifier conditioning module, wherein...

[0006] The main control module is connected to the analog output module through an isolation module, and the analog output module is connected to the operational amplifier conditioning module. The main control module is used to control the analog output module to output an initial voltage signal to the operational amplifier conditioning module, and to control the output state of the operational amplifier conditioning module, so that the operational amplifier conditioning module outputs a target voltage signal based on the initial voltage signal.

[0007] A further technical solution is that the isolation module includes multiple output isolators, the analog output module includes multiple DA output chips, the DA output chips correspond one-to-one with the output isolators, and the signal input terminals of the DA output chips are connected to the main control module through the corresponding output isolators; the DA output chips include multiple signal output terminals, and each signal output terminal is connected one-to-one with the operational amplifier conditioning circuit.

[0008] A further technical solution is that the operational amplifier conditioning circuit includes an operational amplifier U1, resistor R563, resistor R567, capacitor C563, and capacitor C567.

[0009] The non-inverting input terminal of the operational amplifier U1 is grounded and connected to a reference voltage through capacitor C563. The inverting input terminal of the operational amplifier U1 is connected to the signal output terminal of the corresponding DA output chip through resistor R563. The inverting input terminal of the operational amplifier U1 is connected to the output terminal of the operational amplifier U1 through resistor R567. The capacitor C567 and the resistor R567 are connected in parallel.

[0010] A further technical solution is that the operational amplifier conditioning circuit also includes operational amplifier U2, resistors R571 and R575, capacitors C571, C575, and C576, resistors R581 and R582, switch S1, and TVS diode D583, wherein...

[0011] The operational amplifier U1 is connected to the inverting input terminal of the operational amplifier U2 through resistor R571. The inverting input terminal of the operational amplifier U2 is connected to the output terminal of the operational amplifier U2 and one end of resistor R575 through capacitor 571. The other end of resistor R575 is connected to the inverting input terminal of the operational amplifier U2 through resistor R581. The other end of resistor R575 is also connected to one end of switch S1 through resistor R582. The other end of switch S1 is connected to the inverting input terminal of the operational amplifier U2.

[0012] The output terminal of the operational amplifier U2 is connected to one end of the TVS transistor D583 through resistor R575 to form the output terminal of the operational amplifier conditioning circuit, and the other end of the TVS transistor D583 is grounded; the positive power supply terminal of the operational amplifier U2 is grounded through capacitor C575, and the negative power supply terminal of the operational amplifier U2 is grounded through capacitor C576.

[0013] A further technical solution includes a power conversion module, which comprises power conversion chip U1A, power conversion chip U1B, power conversion chip U2A, and power conversion chip U2B, wherein...

[0014] The output terminal of the power conversion chip U1A is connected to the input terminal of the power conversion chip U1B, and the output terminal of the power conversion chip U1B is connected to the negative power supply terminal of the operational amplifier U1 and the operational amplifier U2; the output terminal of the power conversion chip U2A is connected to the input terminal of the power conversion chip U2B, and the output terminal of the power conversion chip U2B is connected to the positive power supply terminal of the operational amplifier U1 and the operational amplifier U2.

[0015] A further technical solution is that the power conversion module further includes power conversion chip U3A, power conversion chip U3B, power conversion chip U4A, and power conversion chip U4B, wherein,

[0016] The output terminal of the power conversion chip U3A is connected to the input terminal of the power conversion chip U3B, and the output terminal of the power conversion chip U3B is connected to the analog output module; the output terminal of the power conversion chip U4A is connected to the input terminal of the power conversion chip U4B, and the output terminal of the power conversion chip U4B is connected to the analog output module.

[0017] Its further technical solution also includes an analog switch module and a voltage acquisition module;

[0018] The isolation module also includes a data acquisition isolator. The analog switch module includes multiple analog switches. The output terminal of the operational amplifier conditioning circuit is connected to each analog switch in a corresponding manner. The voltage acquisition module is connected to the voltage acquisition module through the corresponding analog switch. The voltage acquisition module is connected to the main control module through the data acquisition isolator.

[0019] A further technical solution is that the main control module includes an FPGA chip, a level conversion chip, and a CPCI bridge chip. The CPCI bridge chip is connected to the FPGA chip, and the level conversion chip is connected to both the CPCI bridge chip and the FPGA chip.

[0020] The further technical solution is that the FPGA chip is model XC7A200T-2FBG484I and the CPCI bridge chip is model CH365.

[0021] A further technical solution is that the output card includes a motherboard and a carrier board, the carrier board is disposed on the motherboard and electrically connected to the motherboard through a first connector and a second connector; the main control module, the analog output module and the operational amplifier conditioning module are disposed on the motherboard.

[0022] The beneficial technical effects of this utility model are:

[0023] The analog output card provided by this utility model can realize multiple analog outputs, and each output channel has two output levels. It solves the problem of the limited number of output channels and the relatively simple output values ​​of analog output cards, improves the convenience of testing, reduces application costs, and meets various practical application environments. Attached Figure Description

[0024] Figure 1 This is a schematic block diagram of one embodiment of the analog quantity module provided by this utility model.

[0025] Figure 2 This is a schematic diagram of one embodiment of the analog output card provided by this utility model.

[0026] Figure 3 This is a circuit schematic diagram of one embodiment of the operational amplifier conditioning circuit provided by this utility model.

[0027] Figure 4 This is a schematic block diagram of one embodiment of the analog output card motherboard provided by this utility model.

[0028] Figure 5 This is a schematic block diagram of one embodiment of the analog output card carrier provided by this utility model. Detailed Implementation

[0029] The specific embodiments of this utility model will be further described below with reference to the accompanying drawings.

[0030] This utility model provides an analog output card, including a main control module, an isolation module, an analog output module, and an operational amplifier conditioning module, wherein...

[0031] The main control module is connected to the analog output module through an isolation module, and the analog output module is connected to the operational amplifier conditioning module. The main control module is used to control the analog output module to output an initial voltage signal to the operational amplifier conditioning module, and to control the output state of the operational amplifier conditioning module, so that the operational amplifier conditioning module outputs a target voltage signal based on the initial voltage signal.

[0032] like Figure 1 As shown, the analog output card is usually housed in the analog module along with the analog acquisition card and controllable power supply, so as to provide the analog excitation required for testing to the remote interface unit under test and to acquire the analog signal output by the remote interface unit.

[0033] Specifically, the isolation module includes multiple output isolators, the analog output module includes multiple DA output chips, and the operational amplifier conditioning module includes multiple operational amplifier conditioning circuits. Each DA output chip corresponds one-to-one with an output isolator, and the signal input terminal of each DA output chip is connected to the main control module through a corresponding output isolator. Each DA output chip includes multiple signal output terminals, each connected one-to-one with an operational amplifier conditioning circuit. In this embodiment, the analog output module has a total of 8 DA output chips, and the model of the DA output chips can be DAC80508MCRTER, such as... Figure 2 As shown, each DA output chip includes 8 signal output terminals, DA0-DA7. Each signal output terminal is connected to an operational amplifier conditioning circuit, providing a total of 64 voltage outputs.

[0034] In this embodiment, each operational amplifier conditioning circuit includes two output levels: the first level supports a voltage output of -2V to +2V, and the second level supports a voltage output of -12.5V to +12.5V. The output levels of the operational amplifier conditioning module can be manually switched via the main control module, or an automatic switching function can be set in the main control module, automatically switching to the first output level when the output value falls within the -2V to +2V range.

[0035] The main control module includes an FPGA chip, a level conversion chip, and a CPCI bridge chip. The CPCI bridge chip is connected to the FPGA chip, and the level conversion chip is connected to both the CPCI bridge chip and the FPGA chip. The level conversion chip can be an SN74LVCH16T245DGGR, used to resolve interface compatibility issues between the CPCI bridge chip and the FPGA chip, ensuring normal communication between them. The FPGA chip can be a Xilinx XC7A200T-2FBG484I, which has abundant built-in Block RAM resources, 215360 logic units, and a maximum I / O count of 285. The CPCI bridge chip can be a CH365. The CPCI bridge chip is also connected to interface J1. PCI bus signals are transmitted to the CPCI bridge chip through interface J1, processed by the CPCI bridge chip, and then sent to the FPGA chip. The FPGA chip then controls the DA output chip through an output isolator. The FPGA chip is also connected to a JTAG interface, a FLASH chip, and a clock chip for providing a clock reference. The analog output card is also equipped with a calibration function, allowing the output voltage to be calibrated using external measuring equipment. The calibration data can be stored in the FLASH chip, further improving voltage output accuracy. The analog output card also supports differential output mode for every two adjacent channels.

[0036] Furthermore, the operational amplifier conditioning circuit includes operational amplifier U1, resistors R563 and R567, capacitors C563 and C567, operational amplifier U2, resistors R571 and R575, capacitors C571, C575, C576, resistors R581 and R582, switch S1, and TVS diode D583, wherein, as Figure 3 As shown, the non-inverting input terminal of the operational amplifier U1 is grounded and connected to a reference voltage through capacitor C563, the inverting input terminal of the operational amplifier U1 is connected to the signal output terminal of the corresponding DA output chip through resistor R563, the inverting input terminal of the operational amplifier U1 is connected to the output terminal of the operational amplifier U1 through resistor R567, and capacitor C567 and resistor R567 are connected in parallel.

[0037] The operational amplifier U1 is connected to the inverting input terminal of the operational amplifier U2 through resistor R571. The inverting input terminal of the operational amplifier U2 is connected to the output terminal of the operational amplifier U2 and one end of resistor R575 through capacitor 571. The other end of resistor R575 is connected to the inverting input terminal of the operational amplifier U2 through resistor R581. The other end of resistor R575 is also connected to one end of switch S1 through resistor R582. The other end of switch S1 is connected to the inverting input terminal of the operational amplifier U2.

[0038] The output terminal of the operational amplifier U2 is connected to one end of the TVS transistor D583 through resistor R575 to form the output terminal of the operational amplifier conditioning circuit, and the other end of the TVS transistor D583 is grounded; the positive power supply terminal of the operational amplifier U2 is grounded through capacitor C575, and the negative power supply terminal of the operational amplifier U2 is grounded through capacitor C576.

[0039] Specifically, both operational amplifiers U1 and U2 are OPA4187 models, which have the advantages of zero drift, low offset voltage, and low noise. The TVS diode D583 can be a bidirectional SMF14CA model, used to suppress voltage spikes caused by electrostatic discharge and other factors, protecting the circuit. The DA output chip outputs an initial voltage signal of 0-2.5V, which is converted into an intermediate voltage signal of -1.25V to 1.25V by the operational amplifier circuit formed by operational amplifier U1, resistors R563 and R567, and capacitors C563 and C567. Operational amplifier U2, resistors R571 and R575, capacitors C571, C575, and C576, resistors R581 and R582, and switch S1 form an inverting amplifier circuit. The two output levels of the op-amp conditioning circuit can be controlled by switch S1. When switch S1 is open, the intermediate voltage signal is amplified by the inverting amplifier circuit to a target voltage signal of -12.5V to +12.5V; when switch S1 is closed, the intermediate voltage signal is amplified by the inverting amplifier circuit to a target voltage signal of -2V to +2V.

[0040] Furthermore, the analog output card also includes an analog switch module and a voltage acquisition module;

[0041] The isolation module also includes a data acquisition isolator. The analog switch module includes multiple analog switches. The output terminal of the operational amplifier conditioning circuit is connected to each analog switch in a corresponding manner. The voltage acquisition module is connected to the voltage acquisition module through the corresponding analog switch. The voltage acquisition module is connected to the main control module through the data acquisition isolator.

[0042] Specifically, the analog switch can be an 8-channel analog switch of model ADG5408BRUZ-REEL7. The voltage acquisition module includes multiple voltage acquisition chips, such as model AD7606C-18BSTZ. These chips can simultaneously measure 8 RMS values ​​or 8 external input voltages. The acquired voltage signals are transmitted to the FPGA chip in the main control module via an acquisition isolator. Both the output isolator and the acquisition isolator can be digital isolators of model SI8641BA-C-IUR.

[0043] Furthermore, the analog output card also includes a power conversion module, which comprises power conversion chips U1A, U1B, U2A, and U2B, wherein...

[0044] The output terminal of the power conversion chip U1A is connected to the input terminal of the power conversion chip U1B, and the output terminal of the power conversion chip U1B is connected to the negative power supply terminal of the operational amplifier U1 and the operational amplifier U2; the output terminal of the power conversion chip U2A is connected to the input terminal of the power conversion chip U2B, and the output terminal of the power conversion chip U2B is connected to the positive power supply terminal of the operational amplifier U1 and the operational amplifier U2.

[0045] Specifically, power conversion chip U1A converts the 12V power supply voltage to -15V and inputs it to power conversion chip U1B. Power conversion chip U1B converts the -15V voltage to -14V and applies it to the negative power supply terminals of operational amplifiers U1 and U2, providing a negative power supply voltage for operational amplifiers U1 and U2. Power conversion chip U2A converts the 12V power supply voltage to +15V and inputs it to power conversion chip U2B. Power conversion chip U2B converts the +15V voltage to +14V and applies it to the positive power supply terminals of operational amplifiers U1 and U2, providing a positive power supply voltage for operational amplifiers U1 and U2. The model numbers of power conversion chips U1A and U2A can be URB2415JMT-3W, the model number of power conversion chip U1B can be LM2991S / NOPB, and the model number of power conversion chip U2B can be LM2941SX / NOPB.

[0046] The power conversion module further includes power conversion chip U3A, power conversion chip U3B, power conversion chip U4A, and power conversion chip U4B. The output terminal of power conversion chip U3A is connected to the input terminal of power conversion chip U3B, and the output terminal of power conversion chip U3B is connected to the analog output module. The output terminal of power conversion chip U4A is connected to the input terminal of power conversion chip U4B, and the output terminal of power conversion chip U4B is connected to the analog output module.

[0047] The power conversion chip U3A converts the 12V power supply voltage to 5.5V and inputs it to the power conversion chip U3B. The power conversion chip U3B then regulates the 5.5V voltage to 5V and applies it to the first power supply terminal of the voltage acquisition chip and the VIO power supply terminal of each DA output chip in the analog output module. The power conversion chip U4A converts the 12V power supply voltage to 5.5V and inputs it to the power conversion chip U4B. The power conversion chip U4B then regulates the 5.5V voltage to 5V and applies it to the second power supply terminal of the voltage acquisition chip and the VDD power supply terminal of each DA output chip in the analog output module. The power conversion chips U3A and U4A can be of model URB2405JMT-3W, and the power conversion chips U3B and U4B can be of model LM2941SX / NOPB. The power conversion module also includes multiple motherboard power conversion chips connected to corresponding chips in the main control module to power the FPGA chip, CPCI bridge chip, and level conversion chip.

[0048] Furthermore, the analog output card includes a motherboard and a carrier board. The carrier board is mounted on the motherboard and electrically connected to the motherboard through a first connector and a second connector. The main control module, the analog output module, and the operational amplifier conditioning module are mounted on the motherboard.

[0049] In this embodiment, the analog output card has a planar dimension of 160mm × 100mm. A baffle is provided on the side of the output card, with a width of 4T (4 × 5.08mm) to accommodate the various heights of the components on the board. Guide rails are provided on the baffle to facilitate the installation and use of the output card. Figure 4 and Figure 5 As shown, in this embodiment, the FPGA chip, CPCI bridge chip, level conversion chip, multiple output isolators, multiple motherboard power conversion chips, multiple DA output chips, and multiple operational amplifier conditioning circuits are arranged on the motherboard. The motherboard also has a first connector header and a second connector header, the number of pins of which can be set according to actual needs. Each output isolator and FPGA chip is connected to the second connector header. The motherboard also has a SCSI-100 connector and a reference source of model ADR4524BRZ, which is connected to each DA output chip to provide a voltage reference. The output terminals of each operational amplifier conditioning circuit are connected to the SCSI-100 connector, which is connected to the first connector header.

[0050] The multiple analog switches, power conversion chips U1A, U1B, U2A, U2B, U3A, U3B, U4A, U4B, voltage acquisition chip, acquisition isolator, first connector header, and second connector header are arranged on a carrier board. The number of pins in the first and second connector headers can be set according to actual needs. The first connector header pins are inserted into the first connector header, and the second connector header pins are inserted into the second connector header. Power conversion chips U1B and U2B are connected to operational amplifiers U1 and U2 via the second connector. Power conversion chips U3B and U4B are connected to the DA output chip via the second connector. The acquisition isolator is connected to the FPGA chip via the second connector. The analog switches are connected to the output terminals of each operational amplifier conditioning circuit via the first connector. The carrier board is also equipped with an RS485 transceiver chip of model TDA551S485HC. The RS485 transceiver chip is connected to the FPGA chip through a second connector for data transmission.

[0051] The above descriptions are merely preferred embodiments of the present invention, and the present invention is not limited to the above embodiments. It is understood that other improvements and variations that can be directly derived or conceived by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included within the protection scope of the present invention.

Claims

1. An analog output card, characterized in that, It includes a main control module, an isolation module, an analog output module, and an operational amplifier conditioning module, among which, The main control module is connected to the analog output module through an isolation module, and the analog output module is connected to the operational amplifier conditioning module. The main control module is used to control the analog output module to output an initial voltage signal to the operational amplifier conditioning module, and to control the output state of the operational amplifier conditioning module, so that the operational amplifier conditioning module outputs a target voltage signal based on the initial voltage signal.

2. The analog output card according to claim 1, characterized in that, The isolation module includes multiple output isolators, and the analog output module includes multiple DA output chips. The DA output chips correspond one-to-one with the output isolators. The signal input terminals of the DA output chips are connected to the main control module through the corresponding output isolators. The DA output chips include multiple signal output terminals, and each signal output terminal is connected one-to-one with the operational amplifier conditioning circuit.

3. The analog output card according to claim 2, characterized in that, The operational amplifier conditioning circuit includes an operational amplifier U1, resistors R563 and R567, capacitor C563, and capacitor C567. The non-inverting input terminal of the operational amplifier U1 is grounded and connected to a reference voltage through capacitor C563. The inverting input terminal of the operational amplifier U1 is connected to the signal output terminal of the corresponding DA output chip through resistor R563. The inverting input terminal of the operational amplifier U1 is connected to the output terminal of the operational amplifier U1 through resistor R567. The capacitor C567 and the resistor R567 are connected in parallel.

4. The analog output card according to claim 3, characterized in that, The operational amplifier conditioning circuit also includes operational amplifier U2, resistors R571 and R575, capacitors C571, C575, and C576, resistors R581 and R582, switch S1, and TVS diode D583. The operational amplifier U1 is connected to the inverting input terminal of the operational amplifier U2 through resistor R571. The inverting input terminal of the operational amplifier U2 is connected to the output terminal of the operational amplifier U2 and one end of resistor R575 through capacitor 571. The other end of resistor R575 is connected to the inverting input terminal of the operational amplifier U2 through resistor R581. The other end of resistor R575 is also connected to one end of switch S1 through resistor R582. The other end of switch S1 is connected to the inverting input terminal of the operational amplifier U2. The output terminal of the operational amplifier U2 is connected to one end of the TVS transistor D583 through resistor R575 to form the output terminal of the operational amplifier conditioning circuit, and the other end of the TVS transistor D583 is grounded; the positive power supply terminal of the operational amplifier U2 is grounded through capacitor C575, and the negative power supply terminal of the operational amplifier U2 is grounded through capacitor C576.

5. The analog output card according to claim 4, characterized in that, It also includes a power conversion module, which comprises power conversion chip U1A, power conversion chip U1B, power conversion chip U2A, and power conversion chip U2B, wherein... The output terminal of the power conversion chip U1A is connected to the input terminal of the power conversion chip U1B, and the output terminal of the power conversion chip U1B is connected to the negative power supply terminal of the operational amplifier U1 and the operational amplifier U2; the output terminal of the power conversion chip U2A is connected to the input terminal of the power conversion chip U2B, and the output terminal of the power conversion chip U2B is connected to the positive power supply terminal of the operational amplifier U1 and the operational amplifier U2.

6. The analog output card according to claim 5, characterized in that, The power conversion module further includes power conversion chip U3A, power conversion chip U3B, power conversion chip U4A, and power conversion chip U4B, wherein... The output terminal of the power conversion chip U3A is connected to the input terminal of the power conversion chip U3B, and the output terminal of the power conversion chip U3B is connected to the analog output module; the output terminal of the power conversion chip U4A is connected to the input terminal of the power conversion chip U4B, and the output terminal of the power conversion chip U4B is connected to the analog output module.

7. The analog output card according to claim 2, characterized in that, It also includes an analog switch module and a voltage acquisition module; The isolation module also includes a data acquisition isolator. The analog switch module includes multiple analog switches. The output terminal of the operational amplifier conditioning circuit is connected to each analog switch in a corresponding manner. The voltage acquisition module is connected to the voltage acquisition module through the corresponding analog switch. The voltage acquisition module is connected to the main control module through the data acquisition isolator.

8. The analog output card according to claim 2, characterized in that, The main control module includes an FPGA chip, a level conversion chip, and a CPCI bridge chip. The CPCI bridge chip is connected to the FPGA chip, and the level conversion chip is connected to both the CPCI bridge chip and the FPGA chip.

9. The analog output card according to claim 8, characterized in that, The FPGA chip is model XC7A200T-2FBG484I, and the CPCI bridge chip is model CH365.

10. The analog output card according to claim 1, characterized in that, The output card includes a motherboard and a carrier board. The carrier board is mounted on the motherboard and electrically connected to the motherboard through a first connector and a second connector. The main control module, the analog output module, and the operational amplifier conditioning module are mounted on the motherboard.