USB interface circuit

By designing a USB interface circuit, combined with voltage divider resistors and protection units, the surge and electrostatic interference problems of the charging data cable were solved, improving the product's voltage resistance and electrostatic safety protection capabilities, and extending its service life.

CN223553044UActive Publication Date: 2025-11-14SHENZHEN YUANAI ELECTRONIC TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202423045859.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-10
Publication Date
2025-11-14
Estimated Expiration
2034-12-10

AI Technical Summary

Technical Problem

Existing charging cables are prone to surges and electrostatic interference during charging, which affects charging efficiency and lifespan.

Method used

The circuit design adopts a USB interface and includes a first connection terminal, a switching unit, a main control unit, a first circuit protection unit, a voltage divider resistor, and a second circuit protection unit. The voltage divider resistor is connected to the switching unit, the first circuit protection unit, and the main control unit to enhance the withstand voltage performance. The protection unit composed of a transient voltage suppressor and a capacitor is used for electrostatic safety protection.

Benefits of technology

It effectively protects against surge impacts and electrostatic interference, improving the product's operational reliability and service life.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a USB interface circuit, which is provided with a first connecting end, a switch unit, a second connecting end, a main control unit, a first circuit protection unit, a divider resistor and a second circuit protection unit in the circuit, and the divider resistor is connected with the switch unit, the first circuit protection unit and the main control unit, so that the voltage resistance of a product can be enhanced; the first protection unit is matched with the divider resistor to realize surge impact protection and play a role in electrostatic safety protection, and the second circuit protection unit is connected with the second connecting end and the main control unit to play a role in electrostatic current discharge, so that the working reliability of the product is effectively improved, the circuit structure is simple, and the service life of the product is prolonged.
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Description

Technical Field

[0001] This utility model belongs to the field of plug circuit technology, and in particular relates to a USB interface circuit. Background Technology

[0002] With the continuous development of computer technology, more and more new types of terminals have emerged. Simultaneously, issues such as data transmission, data reading, and mobile terminal charging between various types of terminals have attracted increasing attention. Universal Serial Bus (USB) data cables are widely used, enabling convenient, fast, and stable data transmission. However, in practical applications, charging data cables often experience interference problems such as surges and static electricity during charging. Currently, the surge protection structure of existing charging data cables is relatively complex, and their anti-static performance is not high, affecting the charging efficiency of the data cables.

[0003] Therefore, it is necessary to provide a USB interface circuit that can provide surge protection and electrostatic discharge protection. Utility Model Content

[0004] To address the aforementioned problems, this utility model provides a USB interface circuit that can achieve surge protection and electrostatic discharge protection. The circuit structure is simple, and the product's service life is improved, thus solving the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] This utility model provides a USB interface circuit, including a first connection terminal, a switch unit, a second connection terminal, a main control unit, a first circuit protection unit, a voltage divider resistor, and a second circuit protection unit. The first connection terminal, the second connection terminal, the voltage divider resistor, the switch unit, the first circuit protection unit, and the second circuit protection unit are all connected to the main control unit. The first connection terminal, the voltage divider resistor, the first circuit protection unit, and the second connection terminal are all connected to the switch unit. The first connection terminal and the voltage divider resistor are all connected to the first circuit protection unit, and the second connection terminal is connected to the second circuit protection unit.

[0007] As a preferred embodiment of the above technical solution, the main control unit includes a chip U1, a resistor R3 and a capacitor C1. One end of the resistor R3 is connected to the chip U1, the capacitor C1 is connected to the VDD pin and the GND pin of the chip U1, and the other end of the resistor R3 is connected to the first connection terminal, the first circuit protection unit and the switching unit.

[0008] As a preferred embodiment of the above technical solution, the chip U1 is model YA05.

[0009] As a preferred embodiment of the above technical solution, the switching unit includes a resistor R1 and a MOSFET Q1. The first connection terminal and the resistor R1 are connected to the source of the MOSFET. The gate of the MOSFET Q1 is connected to the resistor R2. The first circuit protection unit is connected to the gate and source of the MOSFET Q1. The resistor R1 is connected to the source and drain of the MOSFET Q1.

[0010] As a preferred embodiment of the above technical solution, the MOS transistor Q1 is model 3415E.

[0011] As a preferred embodiment of the above technical solution, the resistance value of resistor R2 is greater than that of resistor R3, and the resistance value of resistor R2 is 500Ω to 100KΩ.

[0012] As a preferred embodiment of the above technical solution, the first circuit protection unit includes D1, which is composed of a transient voltage suppressor and a capacitor connected in parallel, and the second circuit protection unit includes D2, which is composed of a transient voltage suppressor and a capacitor connected in parallel, wherein both D1 and D2 are 5V ESD.

[0013] As a preferred embodiment of the above technical solution, the first connection end is a USBA connector and the second connection end is an IP8P connector.

[0014] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0015] By setting a first connection terminal, a switching unit, a second connection terminal, a main control unit, a first circuit protection unit, a voltage divider resistor, and a second circuit protection unit in the circuit, the voltage divider resistor is connected to the switching unit, the first circuit protection unit, and the main control unit, which can enhance the product's withstand voltage performance. The first protection unit, together with the voltage divider resistor, can achieve surge protection and also play a role in electrostatic safety protection. The second circuit protection unit is connected to the second connection terminal and the main control unit, which also plays a role in discharging electrostatic current, thereby effectively improving the product's operational reliability. The circuit structure is simple and also improves the product's service life. Attached Figure Description

[0016] Figure 1 This is a structural block diagram of the USB interface circuit proposed in this utility model;

[0017] Figure 2 This is a schematic diagram of the working principle of the USB interface circuit proposed in this utility model.

[0018] The symbols for the main components are explained below:

[0019] 10-First connection terminal; 20-Switch unit; 30-Second connection terminal; 40-Main control unit; 50-First circuit protection unit; 60-Voltage divider resistor; 70-Second circuit protection unit. Detailed Implementation

[0020] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.

[0021] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0022] See Figure 1 and Figure 2 This utility model provides a USB interface circuit, including a first connection terminal 10, a switch unit 20, a second connection terminal 30, a main control unit 40, a first circuit protection unit 50, a voltage divider resistor 60, and a second circuit protection unit 70. The first connection terminal 10, the second connection terminal 30, the voltage divider resistor 60, the switch unit 20, the first circuit protection unit 50, and the second circuit protection unit 70 are all connected to the main control unit 40. The first connection terminal 10, the voltage divider resistor 60, the first circuit protection unit 50, and the second connection terminal 30 are all connected to the switch unit 20. The first connection terminal 10, the voltage divider resistor 60, and the first circuit protection unit 50 are all connected to the first circuit protection unit 50. The second connection terminal 30 is connected to the second circuit protection unit 70.

[0023] In this embodiment, the main control unit 40 includes a chip U1, a resistor R3, and a capacitor C1. One end of the resistor R3 is connected to the chip U1, and the capacitor C1 is connected to the VDD and GND pins of the chip U1. The other end of the resistor R3 is connected to the first connection terminal 10, the first circuit protection unit 50, and the switching unit 20. The chip U1 is a YA05. The switching unit 20 includes a resistor R1 and a MOSFET Q1. The first connection terminal 10 and the resistor R1 are connected to the source of the MOSFET. The gate of the MOSFET Q1 is connected to the resistor R2. The first circuit protection unit 50 is connected to the gate and source of the MOSFET Q1. The resistor R1 is connected to the source and drain of the MOSFET Q1. The MOSFET Q1 is a 3415E, the resistance of resistor R2 is greater than that of resistor R3, and the resistance of resistor R2 is 500Ω to 100KΩ. The first circuit protection unit 50 includes a transient voltage suppressor and a capacitor connected in parallel, forming D1. The second circuit protection unit 70 includes a transient voltage suppressor and a capacitor connected in parallel, forming D2. Both D1 and D2 are 5V ESD. The first connection terminal 10 is a USBA connector, and the second connection terminal 30 is an IP8P connector.

[0024] It should be noted that the first connection terminal 10 is designated P2 and includes 4 pins: V+, D-, D+, and GND. The second connection terminal 30 is designated P1 and includes 16 pins: D+, D-, VOUT, IDA, and GND. The switching unit 20 includes a resistor R1 and a MOSFET Q1. The first connection terminal 10 can be a USBA interface, and the second connection terminal 30 can be a Lightning interface. The V+ pin of the first connection terminal 10 is connected to one end of the resistor R3, one end of the D1 pin, and the source of the MOSFET Q1. The VOUT pin of the second connection terminal 30 is connected to the drain of the MOSFET Q1. The other end of the resistor R3 is connected to the USB5V pin of the chip U1. The other end of the D1 pin is connected to the gate of the MOSFET Q1 and one end of the resistor R2 pin. The other end of the resistor R2 pin is connected to the MOS_G pin of the chip U1 pin.

[0025] Specifically, pin ID of chip U1 is connected to pin IDA of the second connection terminal 30, pins VDD and GND of chip U1 are connected to capacitor C1, pin IDA of the second connection terminal 30 is connected to one end of D2, and the other end of D2 is grounded. Resistor R1 is preferably 120Ω, resistor R2 is preferably 10KΩ, and resistor R3 is preferably 1KΩ. Resistor R2 and the first circuit protection unit 50 can form the gate drive resistor structure of MOSFET Q1, which can increase the product's withstand voltage performance, electrostatic discharge protection, and surge protection capability, thereby improving the product's operational reliability. Charging or data transmission can be achieved between the first connection terminal 10 and the second connection terminal 30. Adding D1 between the source of MOSFET Q1 and V+ of the first connection terminal 10 can prevent chip U1 from malfunctioning due to instantaneous pulses, such as electrostatic discharge effects or power surges. The transient suppression diode can effectively absorb pulses that could damage chip U1 and eliminate electrostatic interference. Similarly, pin IDA of chip U1 is connected to D2. When the two poles of D2 are subjected to a reverse transient high-energy impact, it can quickly change the high impedance between its two poles to a low impedance, absorb the high surge power, clamp the voltage between the two poles to a predetermined value, and effectively protect chip U1 from damage caused by surge pulses.

[0026] It should be understood that by setting a first connection terminal 10, a switch unit 20, a second connection terminal 30, a main control unit 40, a first circuit protection unit 50, a voltage divider resistor 60, and a second circuit protection unit 70 in the circuit, the voltage divider resistor 60 is connected to the switch unit 20, the first circuit protection unit 50, and the main control unit 40, which can enhance the product's withstand voltage performance. The first circuit protection unit 50, together with the voltage divider resistor 60, can achieve surge protection and also play a role in electrostatic safety protection. The second circuit protection unit 70 is connected to the second connection terminal 30 and the main control unit 40, which also plays a role in discharging electrostatic current, thereby effectively improving the product's operational reliability. The circuit structure is simple, and the product's service life is also improved.

[0027] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.

Claims

1. A USB interface circuit, characterized in that, It includes a first connection terminal, a switching unit, a second connection terminal, a main control unit, a first circuit protection unit, a voltage divider resistor, and a second circuit protection unit. The first connection terminal, the second connection terminal, the voltage divider resistor, the switching unit, the first circuit protection unit, and the second circuit protection unit are all connected to the main control unit. The first connection terminal, the voltage divider resistor, the first circuit protection unit, and the second connection terminal are all connected to the switching unit. The first connection terminal and the voltage divider resistor are all connected to the first circuit protection unit. The second connection terminal is connected to the second circuit protection unit.

2. The USB interface circuit according to claim 1, characterized in that, The main control unit includes a chip U1, a resistor R3 and a capacitor C1. One end of the resistor R3 is connected to the chip U1, and the capacitor C1 is connected to the VDD pin and GND pin of the chip U1. The other end of the resistor R3 is connected to the first connection terminal, the first circuit protection unit and the switching unit.

3. The USB interface circuit according to claim 2, characterized in that, The chip U1 is model number YA05.

4. The USB interface circuit according to claim 2, characterized in that, The switching unit includes a resistor R1 and a MOSFET Q1. The first connection terminal and the resistor R1 are connected to the source of the MOSFET. The gate of the MOSFET Q1 is connected to the resistor R2. The first circuit protection unit is connected to the gate and source of the MOSFET Q1. The resistor R1 is connected to the source and drain of the MOSFET Q1.

5. The USB interface circuit according to claim 4, characterized in that, The MOSFET Q1 is model 3415E.

6. The USB interface circuit according to claim 4, characterized in that, The resistance of resistor R2 is greater than that of resistor R3, and the resistance of resistor R2 is 500Ω to 100KΩ.

7. The USB interface circuit according to claim 1, characterized in that, The first circuit protection unit includes a transient voltage suppressor and a capacitor connected in parallel, forming a D1. The second circuit protection unit includes a transient voltage suppressor and a capacitor connected in parallel, forming a D2. Both D1 and D2 are 5V ESD.

8. The USB interface circuit according to claim 1, characterized in that, The first connection end is a USBA connector, and the second connection end is an IP8P connector.