Display control module based on Feiteng X100

Abstract

The utility model relates to a display control module based on Feiteng X100. The display control module adopts a Feiteng X100 chip, a low-power-consumption design and a high-integration design, and four USB interfaces, a DP interface (a front panel), a PCIE 3.0 * 8 interface, two IPMB power management interfaces, an RS232 debugging serial port, two isolation CAN ports, two isolation RS232 serial ports, a 12V power supply interface, a 3.3 VAUX power supply interface, a VGA interface, an HDMI interface and the like are led out through a VPX connector to perform data interaction with external equipment. And the display control module is designed by selecting a domestic chip, so that the requirements of localization, autonomy and controllability are met. The display control module developed by the utility model can realize the functions of data processing, video display, interface output control and the like.

Description

TECHNICAL FIELD

[0001] The utility model belongs to data processing, video display, control interface output etc. fields, specifically related to a kind of based on the display control module of Feiteng X100. BACKGROUND

[0002] Feiteng X100 chip is a microprocessor's supporting chip, main function includes two categories of graphic image processing and interface extension.Graphic image processing, integrated graphic processing acceleration GPU, video decoding VPU, display control interface DisplayPort and video memory controller.The product can cooperate with Feiteng series CPU to meet desktop / integrated machine, notebook, cloud terminal, industrial control, vehicle-mounted control etc. demand, so that user obtains higher integration, better reliability, lower cost, faster development speed.There is no display control module with Feiteng X100 chip as core in prior art. SUMMARY

[0003] To solve above technical problem, the utility model provides a kind of based on the display control module of Feiteng X100, it is characterized in that: display control module uses Feiteng X100 chip, and 4-way USB interface, 1-way DP interface, 1-way PCIE3.0x8 interface, 2-way IPMB power management interface, 1-way RS232 debugging serial port, 2-way isolated CAN port, 2-way isolated RS232 serial port, 12V power supply interface, 3.3V_AUX power supply interface, 1-way VGA interface and 1-way HDMI interface are led out with external equipment connection by VPX connector.

[0004] The utility model has the following beneficial technical effects:

[0005] A kind of based on the display control module of Feiteng X100 developed by the utility model can realize graphic image data processing, video display, control interface output etc. function, and satisfy the requirement of localization self-controlling. BRIEF DESCRIPTION OF DRAWINGS

[0006] Figure 1 It is a kind of based on the display control module framework of Feiteng X100 of the utility model. DETAILED DESCRIPTION

[0007] In order to make the purpose, technical scheme and advantages of the utility model more clear and obvious, the utility model is further explained in detail in the following with the drawings and examples.It should be understood that the specific embodiments described here are only used to explain the utility model, and are not used to limit the utility model.In addition, the technical features involved in each embodiment of the utility model described below can be combined with each other as long as they do not conflict with each other.In order to achieve the above purpose, the utility model adopts the following technical scheme.

[0008] According to the embodiment, as shown in Figure 1 The display module takes the Feng X100 chip as the core, adopts low-power design and high integration design, and is connected with external devices through a VPX connector to output 4 USB interfaces, 1 DP interface (front panel), 1 PCIE3.0x8 interface, 2 IPMB power management interfaces, 1 RS232 debugging serial port, 2 isolated CAN ports, 2 isolated RS232 serial ports, 12V power supply interface, 3.3V_AUX power supply interface, 1 VGA interface and 1 HDMI interface for data interaction. The display control module is designed by selecting domestic chips, and meets the requirements of domestic self-control. The display control module developed by the utility model can realize data processing, video display, control interface output and other functions.

[0009] The Feng X100 chip is the core of the display control module, and is used for image processing and display output functions. The X100 chip is a microprocessor supporting chip, and mainly includes two types of functions, i.e. graphic image processing and interface expansion. In terms of graphic image processing, the X100 chip is integrated with a graphic processing accelerator GPU, a video decoding VPU, a display control interface DisplayPort and a display memory controller. In terms of interface expansion, the X100 chip supports PCIe3.0, SATA3.0, USB3.1, SD / eMMC, Nandflash, I2S audio controller and various peripheral interfaces. The product can meet the requirements of desktops / integrated machines, notebooks, cloud terminals, industrial controls and vehicle controls by cooperating with Feng series CPUs, so that users can obtain higher integration, better reliability, lower cost, faster development speed and higher localization rate.

[0010] The Feng X100 chip integrates a 64-bit LPDDR4 / DDR4 display memory controller, which is responsible for managing the display memory space. The display control module is externally connected with 4 pieces of 16-bit DDR4 chips with a capacity of 1GB for display storage, and the model is CXDQ3BFAM-WG. The capacity of a single piece of display memory is 1GB, and the capacity of the external display memory is 4GB.

[0011] The Feng X100 chip integrates 3-way DisplayPort 1.4 HBR2 display interface, two of which are 4Lane, and the maximum supports 3840x2160@60Hz; one is 1Lane, and the maximum supports 1366x768@60Hz. The 1-way 4Lane display interface of the X100 in the display control module is converted into HDMI signal by the video conversion chip CS5263 and output to the VPX connector. At the same time, an interface protection circuit is added near the connector to achieve a protection level of contact discharge 8KV and air discharge 15KV.

[0012] The 1-way 4Lane video output interface of the Feng X100 chip of the display control module is converted into VGA signal by the video conversion chip CS5232 and output to the VPX connector. At the same time, an interface protection circuit is added near the connector to achieve a protection level of contact discharge 8KV and air discharge 15KV.

[0013] The 1-way 1Lane of the Feng X100 chip of the display control module is output as a DP display output signal to the panel. The DP differential signal is passed through the common mode inductor CMW2012-90T2 to suppress the electromagnetic radiation generated by the high-speed signal to the outside. At the same time, an interface protection circuit is added near the DP interface to achieve a protection level of contact discharge 8KV and air discharge 15KV.

[0014] The Feng X100 chip integrates 8 USB host controllers, supporting 8 independent USB3.1 Gen1 interfaces. The 5 USB controllers of the display control module X100 realize 5-way USB output, of which 1 is used for software upgrade of the video conversion chip CS5263, and the remaining 4 are connected to the VPX connector. The USB differential signal is passed through the common mode inductor CMW2012-90T2 to suppress the electromagnetic radiation generated by the high-speed signal to the outside. At the same time, an interface protection circuit is added near the connector to achieve a protection level of contact discharge 8KV and air discharge 15KV.

[0015] The Feng X100 chip internally integrates 2 CAN controllers, compatible with CAN2.0 standard protocol. The CAN interface level is 1.8V CMOS level standard. The CAN interface uses capacitive isolation for isolation, and the isolation chip selects NSI8220N, and the CAN transceiver selects NCA1042 model. The 2-way CAN signal output by the X100 is first converted in level by the CPLD, converting the 1.8V level to 3.3V level, and then isolated by the capacitive isolation chip before output to the CAN transceiver to convert the signal into CAN protocol signal and output to the VPX connector. The isolation power supply 5V is selected by B0505ST16-W05 model.

[0016] The Feng X100 chip integrates 4 full-featured UARTs and a debugging UART. The UART signals output by the 2 full-featured UARTs of the X100 are first converted in level by the CPLD, converted from 1.8V level to 3.3V level, then isolated by the isolation chip, and then converted into RS232 format by the RS232 transceiver and output to the VPX connector. The isolated power supply 5V is provided by B0505ST16-W05, the isolation chip is NSI8220N, and the RS232 transceiver is SM3232AE.

[0017] The UART signals output by the debugging UART integrated by the Feng X100 chip are first converted in level by the CPLD, converted from 1.8V level to 3.3V level, and then output to the RS232 transceiver to convert the signals into RS232 format as a debugging serial port. The RS232 transceiver is SM3232AE.

[0018] The IPMB function is realized by the MCU chip GD32F407, and the MCU chip in the display control module is connected with the main control module in the case through the I2C bus and the VPX connector. The MCU chip GD32F407 of the display control module is first powered on through 3V3_AUX and starts to work, and when receiving the power-on and power-off commands from the MCU of the main control module, the MCU chip control module 12V power supply of the display control module is powered on and powered off. The DS18B20 chip monitors the internal temperature of the system, and when the temperature exceeds the threshold, the MCU controls the system to power off; the MCU judges the board slot by reading the pull-up and pull-down state of GA* on P0 of the VPX connector. After the display control module works, the voltage monitoring chip LTC2990 monitors the module 12V voltage, and the output voltage of the current detection chip SC810 is used to calculate the power consumption of the whole module. The current detection chip SC810 is powered by a 5V power supply, and the maximum overcurrent IPMAX is 10A. Since the voltage monitoring chip LTC2990 can adopt a voltage range lower than the output voltage of SC810, the measurement is carried out after the thousandth precision resistance is divided.

[0019] The 100MHz synchronous clock of the display control module PCIe is provided with 1 synchronous clock signal by the clock generator of the main control module in the case. The display control module expands 4 100MHz clock signals by the AU5411 clock chip and provides them to the X100 chip. The remaining clocks are provided by the crystal oscillator.

[0020] The Feng X100 chip integrates 1 X16 PCIe3.0 uplink interface, 8 PCIe3.0 downlink interfaces, including 2 X2 and 6 X1. The display control module outputs 1 X8 PCIe3.0 uplink interface to the VPX connector.

[0021] The utility model uses GW1N-4B series CPLD as the whole board 1.8V, 2.5V and 3.3V level conversion, and the CPLD chip model is GW1N-LV4PG256C6 / I5.

[0022] The 2-way CAN signal output by the Feiteng X100 chip is first subjected to level conversion by the CPLD, and is converted from 1.8V level to 3.3V level, and then is subjected to isolation by the digital isolation chip and output to the CAN transceiver to convert the signal into a CAN protocol signal and output to the VPX connector; the UART signal output by the 2-way full-function UART of the Feiteng X100 chip is first subjected to level conversion by the CPLD, and is converted from 1.8V level to 3.3V level, and then is subjected to isolation by the digital isolation chip and is converted into RS232 format by the RS232 transceiver and output to the VPX connector; the UART signal output by the integrated debugging UART of the X100 is first subjected to level conversion by the CPLD, and is converted from 1.8V level to 3.3V level, and then is output to the RS232 transceiver to convert the signal into RS232 format and serve as a debugging serial port.

[0023] The preferred embodiments of the utility model are described above with reference to the drawings, but it should be understood that the above description is only exemplary. Those skilled in the art can make various modifications and variations to the utility model without departing from the spirit and scope of the utility model. The protection scope of the utility model is defined by the appended claims.

Claims

1. A flight X100-based display control module, characterized in that: The display control module adopts Feiteng X100 chip, and is connected with external devices through 4 USB interfaces, 1 DP interface, 1 PCIE3.0x8 interface, 2 IPMB power management interfaces, 1 RS232 debugging serial port, 2 isolated CAN ports, 2 isolated RS232 serial ports, 12V power supply interface, 3.3V_AUX power supply interface, 1 VGA interface and 1 HDMI interface led out by a VPX connector.

2. The display control module based on Feiteng X100 according to claim 1, characterized in that: The Feiteng X100 chip integrates a graphic processing acceleration GPU, a video decoding VPU, a display control interface DisplayPort and a display memory controller.

3. The display control module based on Feiteng X100 according to claim 2, characterized in that: The Feiteng X100 integrates a 64-bit LPDDR4 / DDR4 display memory controller, which manages the display memory space; the display control module is externally connected with 4 pieces of 16-bit DDR4 chips with a capacity of 1GB for display memory, the model of which is CXDQ3BFAM-WG, and the capacity of a single piece of display memory is 1GB, and the capacity of the external display memory is 4GB in total.

4. The display control module based on Feiteng X100 according to claim 3, characterized in that: The Feiteng X100 integrates 3 DisplayPort1.4 HBR2 display interfaces, two of which are 4Lane, and one of which is 1Lane; one piece of 4Lane display interface is converted into HDMI signal by a video conversion chip CS5263 and output to the VPX connector, and an interface protection circuit is added near the connector.

5. The display control module based on Feiteng X100 according to claim 4, characterized in that: The 1 piece of 4Lane video output interface of the Feiteng X100 chip is converted into VGA signal by a video conversion chip CS5232 chip and output to the VPX connector; and an interface protection circuit is added near the connector.

6. The display control module based on Feiteng X100 according to claim 1, characterized in that: The 1 piece of 1Lane of the Feiteng X100 chip is output as DP display output signal to the panel; the DP differential signal passes through a common mode inductor CMW2012-90T2; and an interface protection circuit is added near the DP interface.

7. The display control module based on Feiteng X100 according to claim 1, characterized in that: The Feiteng X100 chip integrates 8 USB host controllers, which support 8 independent USB3.1 Gen1 interfaces; 5 USB controllers of the Feiteng X100 chip realize 5 USB outputs, one of which is connected with a CS5263 chip, and the remaining 4 are connected to the VPX connector; the USB differential signal passes through a common mode inductor CMW2012-90T2; and an interface protection circuit is added near the connector.

8. The display control module based on Feiteng X100 according to claim 1, characterized in that: The Feng X100 chip internally integrates two CAN controllers; the CAN interface level is 1.8V CMOS level standard; the CAN interface adopts a digital isolation method for isolation, and the isolation chip is selected from the NSI8220N type, and the two-way CAN signal output by the Feng X100 is first converted in level by the CPLD, and then converted into a 3.3V level, and then isolated by the digital isolation chip and output to the CAN transceiver to convert the signal into a CAN protocol signal and output to the VPX connector, and the isolation power supply 5V adopts the B0505ST16-W05 type.

9. The display control module based on Feng X100 according to claim 1, characterized in that: The Feng X100 chip integrates four full-featured UARTs and a debugging UART; the UART signal output by the two full-featured UARTs of the Feng X100 chip is first converted in level by the CPLD, and then converted into a 3.3V level, and then isolated by the digital isolation chip and output to the RS232 transceiver to convert the signal into an RS232 format and output to the VPX connector, and the isolation power supply 5V adopts the B0505ST16-W05 type, the isolation chip is selected from the NSI8220N type, and the RS232 transceiver is selected from the SM3232AE type.

10. The display control module based on Feng X100 according to claim 1, characterized in that: The UART signal output by the debugging UART integrated in the Feng X100 chip is first converted in level by the CPLD, and then converted into a 3.3V level, and then output to the RS232 transceiver to convert the signal into an RS232 format as a debugging serial port; and the RS232 transceiver is selected from the SM3232AE type.

11. The display control module based on Feng X100 according to claim 1, characterized in that: The display control module includes an MCU chip GD32F407, and the MCU chip GD32F407 in the display control module is connected with the main control module in the case through the I2C bus and the VPX connector.

12. The display control module based on Feng X100 according to claim 1, characterized in that: The PCIe 100MHz synchronous clock of the display control module is provided with a synchronous clock signal by a clock generator in the main control module in the case; the display control module expands four 100MHz clock signals by the AU5411 clock chip and provides them for the Feng X100 chip; and the remaining clocks are provided by the crystal oscillator.

13. The display control module based on Feng X100 according to claim 1, characterized in that: The Feng X100 chip integrates one X16 PCIe3.0 uplink interface, eight PCIe3.0 downlink interfaces including two X2 and six X1; and the display control module outputs one X8 PCIe3.0 uplink interface to the VPX connector.

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