Startup and shutdown circuit and electronic equipment
By designing a power-on/off circuit that uses an FPGA to detect changes in the input level and control the switching transistor's on/off state, the problem of increased cost and power consumption caused by the lack of a power management unit in the FPGA is solved, resulting in reduced circuit power consumption and smaller product size.
Patent Information
- Application Number
- CN202423100022.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2034-12-16
AI Technical Summary
In electronic products that use Field Programmable Gate Arrays (FPGAs) as processors, the lack of a built-in power management unit necessitates the use of an external microcontroller for power-on and power-off operations, leading to increased costs and power consumption. Furthermore, this approach is unsuitable for products with size constraints or high power consumption requirements.
Design a power-on/off circuit that controls the conduction of the first and second switching transistors through a first switching circuit, and controls the conduction or cutoff of the third switching transistor by combining the level change detection of the FPGA input terminal, thereby realizing power supply and power-off without the need for an external microcontroller.
While ensuring reliable power-on and power-off functions, reduce circuit power consumption, lower production costs, shrink product size, and simplify circuit structure.
Smart Images
Figure CN223584156U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of circuit protection, in particular to a low-voltage protection circuit and an electronic device. BACKGROUND
[0002] At present, the power-on and power-off circuit of an electronic product is usually controlled by a power management unit (PMU) built in a system on a chip (SoC) or a single-chip microcomputer, so as to realize the power-on and power-off functions of the system. When a field-programmable gate array (FPGA) is used as a processor in the electronic product, since the FPGA lacks a built-in power management unit, an external single-chip microcomputer is needed to complete the power-on and power-off operation of the product. However, the use of the single-chip microcomputer to complete the power-on and power-off operation will lead to an increase in the cost and power consumption of the product, and will also increase the area of the circuit, which is not suitable for products with limited size and high power consumption requirements. CONTENT OF THE UTILITY MODEL
[0003] The present application provides a power-on and power-off circuit and an electronic device, so as to improve the technical problem that the power-on and power-off circuit of the electronic device using an FPGA affects the power consumption and size of the circuit. In a first aspect, a power-on and power-off circuit is provided, which comprises a first switching circuit, a second switching circuit, a third switching circuit and an FPGA. The first switching circuit comprises a first switch and a first switch tube. The second switching circuit comprises a second switch tube. The first switch is connected between a power supply input end and a first end of the first switch tube. A second end of the first switch tube is coupled to a first end of the second switch tube, and a third end is grounded. A second end of the second switch tube is coupled to the power supply input end, and a third end is coupled to a power supply output end. The FPGA comprises a detection input end and a control output end. The detection input end is coupled to the first switch. The third switching circuit comprises a third switch tube. A first end of the third switch tube is coupled to the control output end, a second end is coupled to the power supply output end, and a third end is grounded. The FPGA is configured to control the conduction or turn-off of the third switching circuit through the control output end based on the level change of the detection input end.
[0004] The above power-on and power-off circuit controls the conduction of the first switch tube and the second switch tube through the state of the first switch in the first switching circuit, so as to realize power supply. In the power-on state, the FPGA controls the conduction of the third switch tube through the detection of the level change of the first switch, so as to realize the power-off of the circuit. With a relatively simple circuit structure, the power-on and power-off functions can be reliably realized without the need for an external single-chip microcomputer, thereby reducing the power consumption of the circuit, lowering the production cost, and reducing the size of the product.
[0005] Optionally, the first switch circuit further comprises a first resistor, a second resistor, a third resistor and a first diode; the first resistor, the second resistor and the first diode are connected in series between the first switch and the first terminal of the first switch tube; and the third resistor is connected in series between the first terminal of the first switch tube and the ground terminal.
[0006] Optionally, the first switch circuit further comprises a fourth resistor, a fifth resistor, a first capacitor and a first voltage stabilizing tube; the fourth resistor and the fifth resistor are connected in series between the first terminal of the first capacitor and the first switch; a second terminal of the first capacitor is coupled to the detection input terminal, and a first terminal of the first capacitor is grounded; an anode of the first voltage stabilizing tube is coupled to the first terminal of the first capacitor, and a cathode of the first voltage stabilizing tube is coupled to the detection input terminal.
[0007] Optionally, the first switch circuit further comprises a second capacitor and a second diode; a first terminal of the second capacitor is coupled between the first resistor and the anode of the first diode, and a second terminal of the second capacitor is grounded; an anode of the second diode is coupled to the anode of the first diode, and a cathode of the second diode is coupled to the first switch.
[0008] Optionally, the second switch circuit further comprises a sixth resistor; the sixth resistor is connected between the first terminal and the second terminal of the second switch tube.
[0009] Optionally, the second switch circuit further comprises a third capacitor and a fourth capacitor; the third capacitor is connected in series between the power input terminal and the ground terminal; and the fourth capacitor is connected in series between the power output terminal and the ground terminal.
[0010] Optionally, the second switch circuit further comprises a fuse; the fuse is connected in series between the third terminal of the second switch tube and the power output terminal.
[0011] Optionally, the third switch circuit further comprises a seventh resistor, an eighth resistor and a ninth resistor; the seventh resistor is connected between the second terminal of the third switch tube and the power output terminal; the eighth resistor is connected between the first terminal and the third terminal of the third switch tube; and the ninth resistor is connected between the control output terminal and the first terminal of the third switch tube.
[0012] Optionally, the third switch circuit further comprises a third diode, a fourth diode and a fifth capacitor; an anode of the third diode is coupled to the control output terminal, and a cathode of the third diode is coupled to the ninth resistor; an anode of the fourth diode is coupled between the power output terminal and the seventh resistor; and the fifth capacitor is connected in parallel with the eighth resistor.
[0013] In a second aspect, an electronic device is provided, comprising the switch-on / off circuit provided in the first aspect. BRIEF DESCRIPTION OF DRAWINGS
[0014] The drawings used in the description of the embodiments of the present application are briefly described as follows:
[0015] Figure 1A circuit structure schematic diagram of a switching machine circuit provided in some embodiments of the present application is shown.
[0016] Figure 2 A circuit structure schematic diagram of another switching machine circuit provided in some embodiments of the present application is shown. DETAILED DESCRIPTION
[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the specific embodiments of the present application will be described below with reference to the drawings. The drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings or embodiments from these drawings or embodiments without creative labor, and any adjustment and improvement made without departing from the concept of the present application is within the protection scope of the present application.
[0018] In order to make the drawing simple, each drawing only shows the parts related to the embodiments, and they do not represent the actual structure of the product. In addition, in order to make the drawing simple and easy to understand, only some structures or components are shown schematically, and there can be more or less similar structures or components.
[0019] With the development of electronic technology, the processor of electronic equipment is constantly updated, and FPGA has flexibility and reconfigurability in processing tasks. Compared with SoC or MCU, FPGA can adapt to different application requirements. The programmability of FPGA allows them to be reused in different applications, and new functions can be realized by modifying its configuration file, so as to realize very efficient logic operation, and usually has parallel computing capability, can process a large amount of data, and is faster than traditional processors in some applications. For example, FPGA belongs to parallel computing, and can execute multiple instruction algorithms at a time, while traditional ASIC, DSP and even CPU are serial computing, and can only process one instruction set at a time. Since FPGA can be programmed to perform specific tasks, they can use energy more efficiently, thereby reducing power consumption. The above advantages make FPGA have wide application in the fields of communication, digital signal processing, rapid prototyping, etc. However, in actual application process, in order to realize the flexibility of FPGA, it usually does not integrate a power control unit, and in order to realize the switching function of electronic product, a single-chip microcomputer needs to be externally connected to the device using FPGA to complete the switching operation of the product. However, the use of a single-chip microcomputer to complete the switching will result in an increase in product cost and power consumption, and will increase the area of the circuit, which is not suitable for products with limited size and high power consumption requirements. Therefore, the present application provides a switching machine circuit, which, through circuit design, enables electronic products using FPGA to be connected without a single-chip microcomputer, and realizes the switching function through the functional combination of components.
[0020] The following description is in conjunction with the accompanying drawings:
[0021] Figure 1 The diagram shows a circuit structure schematic of a power-on / off circuit provided in some embodiments of this application. Please refer to it. Figure 1 The power-on / off circuit 100 includes: a first switch circuit 110, a second switch circuit 120, a third switch circuit 130, and an FPGA; the first switch circuit 110 includes: a first switch SW1 and a first switching transistor Q1; the second switch circuit 120 includes: a second switching transistor Q2; wherein, the first switch SW1 is connected between the power input terminal Vin and the first terminal of the first switching transistor Q1, the second terminal of the first switching transistor Q1 is coupled to the first terminal of the second switching transistor Q2, and the third terminal is grounded; the second terminal of the second switching transistor Q2 is coupled to the power input terminal Vin, and the third terminal is coupled to the power output terminal Vout; the FPGA includes: a detection input terminal FD and a control output terminal PO, the detection input terminal FD is coupled to the first switch SW1; the third switch circuit 130 includes: a third switching transistor Q3, the first terminal of the third switching transistor Q3 is coupled to the control output terminal, the second terminal is coupled to the power output terminal Vin, and the third terminal is grounded; the FPGA is configured to control the third switch circuit 130 to turn on or off through the control output terminal PO based on the level change of the detection input terminal FD.
[0022] In the above power-on / off circuit, when the electronic device is powered on, the user can press the first switch SW1 in the first switch circuit 110, which turns on the first switch transistor Q1, thereby controlling the second switch transistor Q2 in the second switch circuit 120 to turn on. This allows the power supplied by the power input terminal Vin to be output to the downstream load through the power output terminal Vout, thus powering on the electronic device. When the user presses the first switch SW1 in the first switch circuit 110 again, the FPGA's detection input terminal FD can detect a level change, such as a change from a low level to a high level in the system power-on state. This triggers the FPGA's control output terminal PO to control the third switch transistor Q3 to turn on, grounding the power output terminal Vout and powering off the electronic device.
[0023] Figure 2 The following is a schematic diagram of the circuit structure of another power-on / off circuit provided in some embodiments of this application. Please refer to it. Figure 2 The first switching circuit 110 further includes: a first resistor R1, a second resistor R2, a third resistor R3, and a first diode D1; the first resistor R1, the second resistor R2, and the first diode D1 are connected in series between the first switch SW1 and the first terminal of the first switching transistor Q1; the third resistor R3 is connected in series between the first terminal of the first switching transistor Q1 and the ground terminal.
[0024] After the first switch SW1 is pressed, a voltage is formed at the first end of the first switch tube Q1 through the voltage division of the first resistor R1, the second resistor R2 and the third resistor R3, for example, the first end of the first switch tube Q1 is the gate, and the first switch tube Q1 is turned on after the voltage division makes the first switch tube Q1 meet the turn-on condition, thereby providing a turn-on voltage for the second switch tube Q2, making the second switch tube Q2 meet the turn-on condition, and outputting the power of the power input terminal Vin from the power output terminal Vout to the subsequent load through the second switch tube Q2, thereby completing the start-up task.
[0025] With reference to Figure 2 , the first switch circuit 110 further comprises a fourth resistor R4, a fifth resistor R5, a first capacitor C1 and a first voltage stabilizing tube Z1; the fourth resistor R4 and the fifth resistor R5 are connected in series between the first end of the first capacitor C1 and the first switch SW1; the second end of the first capacitor C1 is coupled to the detection input terminal, and the first end of the first capacitor C1 is grounded; the anode of the first voltage stabilizing tube Z1 is coupled to the first end of the first capacitor C1, and the cathode is coupled to the detection input terminal FD.
[0026] The voltage at the first switch SW1 can be transmitted to the detection input terminal FD of the FPGA through the fourth resistor R4 and the fifth resistor R5, and the size of the voltage can be stabilized through the first capacitor C1, so that the FPGA determines the accurate voltage at the first switch SW1. Meanwhile, the first voltage stabilizing tube Z1 can clamp the voltage, avoiding the voltage change caused by circuit fluctuation from causing the FPGA to detect unstable voltage and misoperation, thereby improving the reliability of the circuit.
[0027] With reference to Figure 2 , the first switch circuit 110 further comprises a second capacitor C2 and a second diode D2; the first end of the second capacitor C2 is coupled between the first resistor R1 and the anode of the first diode D1, and the second end is grounded; the anode of the second diode D2 is coupled to the anode of the first diode D1, and the cathode is coupled to the first switch SW1.
[0028] The second switch circuit further comprises a sixth resistor R6; the sixth resistor R6 is connected between the first end and the second end of the second switch tube Q2.
[0029] The second switch circuit further comprises a third capacitor C3 and a fourth capacitor C4; the third capacitor C3 is connected in series between the power input terminal Vin and the ground terminal; the fourth capacitor C4 is connected in series between the power output terminal Vout and the ground terminal. The third capacitor C3 and the fourth capacitor C4 can stabilize and filter the input or output voltage, eliminate the noise in the voltage waveform, and improve the quality of power transmission and supply.
[0030] The second switch circuit further comprises a fuse FU; the fuse FU is connected in series between the third end of the second switch tube and the power output terminal Vout.
[0031] In some embodiments of the present application, with reference to Figure 2 , the third switch circuit further comprises: a seventh resistor R7, an eighth resistor R8 and a ninth resistor R9; the seventh resistor R7 is connected between the second end of the third switch tube Q3 and the power output terminal Vout; the eighth resistor R8 is connected between the first end and the third end of the third switch tube Q3; and the ninth resistor R9 is connected between the control output terminal and the first end of the third switch tube Q3.
[0032] In the power-on state, when the first switch SW1 is pressed again, the detection input terminal FD of the FPGA can change from low to high, at this time the FPGA adjusts the control output terminal PO to high, and provides the first end of the third switch tube through the voltage division of the ninth resistor R9, such as the gate, after the third switch tube Q3 meets the conduction condition, the power output terminal Vout is grounded through the seventh resistor R7 and the third switch tube Q3, thereby realizing the shutdown process. Avoid the case of applying FPGA without power management module, through circuit design can avoid external single-chip microcomputer and increase the complexity of the circuit and the production cost.
[0033] In some embodiments of the present application, with reference to Figure 2 , the third switch circuit further comprises: a third diode D3, a fourth diode D4 and a fifth capacitor C5; the anode of the third diode D3 is coupled to the control output terminal, and the cathode is coupled to the ninth resistor R9; the anode of the fourth diode D4 is coupled between the power output terminal Vout and the seventh resistor R7; and the fifth capacitor C5 is connected in parallel with the eighth resistor R8.
[0034] Based on the same technical concept, the present application also provides an electronic device comprising the start / stop circuit provided in the above embodiments.
[0035] In the present application, unless otherwise explicitly specified and limited, ordinal words such as "first", "second" and the like are only used to distinguish the description of the associated objects, and cannot be understood as indicating or implying the relative importance or order between the associated objects. In addition, the ordinal words do not represent the number of the associated objects.
[0036] "Multiple" includes two or more, and other quantifiers are similar.
[0037] The terms "or," "and / or," used in the context of the application, are used to describe a relationship between elements, and are understood to mean either the inclusive or exclusive sense, depending on the context. For example, "A and / or B" and "A or B" can include "A alone", "B alone", or "A and B", where "A" and "B" can include a single object or a plurality of objects. For another example, "A, B, and / or C", "A, B, or C", and "A, B, and C" can include "A alone", "B alone", "C alone", "A and B", "A and C", "B and C", or "A, B, and C", where "A", "B", and "C" can include a single object or a plurality of objects. In addition, " / " in the application is used to represent the relationship between the front and rear associated objects "or". The meanings of "at least one of A or B" and "one or more of A and B" in the application are the same as the meaning of "A or B" above, and the meanings of "one or more of A, B, and C" and "at least one of A, B, or C" are the same as the meaning of "A, B, or C" above. The meaning of "one or more of A, B, and C" is the same as the meaning of "A, B, or C" above.
[0038] In the above embodiments, the description of each embodiment is focused on, and the parts not described or recorded in detail in a certain embodiment can be referred to the relevant description of other embodiments. In addition, the above embodiments can be freely combined as needed.
Claims
1. A power on / off circuit, characterized in that, include: The first switching circuit, the second switching circuit, the third switching circuit, and the FPGA; The first switching circuit includes: a first switch and a first switching transistor; The second switching circuit includes: a second switching transistor; Wherein, the first switch is connected between the power input terminal and the first terminal of the first switching transistor, the second terminal of the first switching transistor is coupled to the first terminal of the second switching transistor, and the third terminal is grounded; the second terminal of the second switching transistor is coupled to the power input terminal, and the third terminal is coupled to the power output terminal. The FPGA includes a detection input terminal and a control output terminal, wherein the detection input terminal is coupled to the first switch; The third switching circuit includes: a third switching transistor, the first end of which is coupled to the control output terminal, the second end of which is coupled to the power output terminal, and the third end of which is grounded; The FPGA is configured to control the third switching circuit to turn on or off via the control output terminal based on the level change at the detection input terminal.
2. The power on / off circuit according to claim 1, characterized in that, The first switching circuit further includes: a first resistor, a second resistor, a third resistor, and a first diode; The first resistor, the second resistor, and the first diode are connected in series between the first switch and the first terminal of the first switching transistor; The third resistor is connected in series between the first terminal of the first switch and the ground terminal.
3. The power-on / off circuit according to claim 2, characterized in that, The first switching circuit further includes: a fourth resistor, a fifth resistor, a first capacitor, and a first Zener diode; The fourth resistor and the fifth resistor are connected in series between the first terminal of the first capacitor and the first switch; The second terminal of the first capacitor is coupled to the detection input terminal, and the first terminal of the first capacitor is grounded. The anode of the first Zener diode is coupled to the first terminal of the first capacitor, and the cathode is coupled to the detection input terminal.
4. The power on / off circuit according to claim 3, characterized in that, The first switching circuit further includes: a second capacitor and a second diode; The first terminal of the second capacitor is coupled between the first resistor and the anode of the first diode, and the second terminal is grounded; The anode of the second diode is coupled to the anode of the first diode, and the cathode is coupled to the first switch.
5. The power on / off circuit according to claim 4, characterized in that, The second switching circuit also includes: a sixth resistor; The sixth resistor is connected between the first and second terminals of the second switching transistor.
6. The power-on / off circuit according to claim 5, characterized in that, The second switching circuit also includes: a third capacitor and a fourth capacitor; The third capacitor is connected in series between the power input terminal and the ground terminal; The fourth capacitor is connected in series between the power output terminal and the ground terminal.
7. The power on / off circuit according to claim 6, characterized in that, The second switching circuit also includes: a fuse; The fuse is connected in series between the third terminal of the second switching transistor and the power output terminal.
8. The power on / off circuit according to claim 7, characterized in that, The third switching circuit also includes: a seventh resistor, an eighth resistor, and a ninth resistor; The seventh resistor is connected between the second terminal of the third switching transistor and the power output terminal. The eighth resistor is connected between the first and third terminals of the third switching transistor; The ninth resistor is connected between the control output terminal and the first terminal of the third switching transistor.
9. The power on / off circuit according to claim 8, characterized in that, The third switching circuit also includes: a third diode, a fourth diode, and a fifth capacitor; The anode of the third diode is coupled to the control output terminal, and the cathode is coupled to the ninth resistor; The anode of the fourth diode is coupled between the power output terminal and the seventh resistor; The fifth capacitor is connected in parallel with the eighth resistor.
10. An electronic device, characterized in that, Includes the power-on / off circuit as described in any one of claims 1-9.