Novel inductor and inductor integration module
By employing a design that combines built-in and external conductors in the inductor, the inductor electrodes are distributed on different surface patches, solving the problems of large module size and high loss in existing technologies, and realizing a miniaturized and low-cost inductor integrated module.
Patent Information
- Application Number
- CN202423199439.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-24
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2034-12-24
AI Technical Summary
In existing technologies, the way power inductors are connected to other devices results in large module size, high losses, high costs, and difficult PCB drilling processes, which cannot meet the requirements of miniaturization and high efficiency.
By employing a design with both built-in and external conductors, the electrodes of the inductor are distributed on different surface mounts. The built-in conductors are directly connected to the MOSFET and PCB board, reducing line losses and lowering manufacturing costs.
This has resulted in miniaturization of the modules, reduced costs, and decreased line losses, thereby improving space utilization and circuit efficiency.
Smart Images
Figure CN223598524U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to inductance technical field especially relates to a novel inductance and inductance integrated module. BACKGROUND
[0002] The current server, power module more and more tend to miniaturization, low loss, high efficiency. The server, power module usually contains power inductance, MOS tube, capacitor and other devices, wherein the conventional power inductance, two and more electrodes in the circuit are usually concentrated in a patch face, and need to be connected through pin or PCB built-in line in the application circuit. If not in the same patch face device, pin or PCB punching through copper plating process is also needed to conduct surrounding, upper and lower devices.
[0003] Among them, if the inductance electrode and each device are connected through the same patch face, and pin or PCB built-in line is used as medium communication, it will lead to large overall volume ratio of application module, high line loss and low overall efficiency. In order to meet the small overall volume, the utilization rate is high, and other devices (such as MOS tube, capacitor) except inductance need to be close to inductance, wherein inductance is connected to PCB board through the bottom, if other devices are placed on the top of inductance, pin or PCB punching through copper plating process is needed to connect up and down. But pin scheme still cannot achieve the smallest module volume, and PCB punching costs high and has great process difficulty.
[0004] The disclosure of the above background art content is only used to assist in understanding the concept and technical scheme of the utility model, which does not necessarily belong to the prior art of the present patent application. In the absence of explicit evidence that the above content has been disclosed on the filing date of the present patent application, the above background art should not be used to evaluate the novelty and inventiveness of the present application. UTILITY MODEL CONTENT
[0005] In order to solve the above technical problems, the utility model provides a novel inductance and inductance integrated module, which can reduce the overall volume of the module, and reduce the manufacturing cost and circuit loss.
[0006] In order to achieve the above purpose, the utility model adopts the following technical scheme:
[0007] The utility model discloses a novel inductor, including magnet, built -in conductor and external conductor, built -in conductor is at least partially built -in in the magnet, and the both ends of built -in conductor are formed the first patch face and the second patch face that mutually parallel respectively from the opposite both ends of magnet, be equipped with electrode respectively on the first patch face and the second patch face, the external conductor is external in the opposite both sides of magnet, and the both ends of external conductor are located with the first patch face and the second patch face corresponding two ends respectively.
[0008] In further embodiments, the number of built-in conductors is two, and the two built-in conductors are spaced apart and arranged in parallel in the magnet.
[0009] In further embodiments, the external conductors are divided into two groups, and the number of external conductors in each group is at least two, and the two groups of external conductors are respectively externally arranged in parallel on opposite sides of the magnet.
[0010] In further embodiments, the electrodes respectively provided on the first patch face and the second patch face are built-in conductive copper, a metallized layer, or an externally connected conductive copper.
[0011] In further embodiments, the first patch face and the second patch face respectively protrude from the top and bottom of the magnet.
[0012] In a second aspect, the utility model discloses an inductor integrated module, including MOS pipe, PCB board and the novel inductor of first aspect, wherein the MOS pipe is connected and arranged on the first patch face and is electrically connected with the first patch face and the first end of external conductor, the PCB board is connected and arranged on the second patch face and is electrically connected with the second patch face and the second end of external conductor.
[0013] In a third aspect, the utility model discloses a novel inductor, including magnet and built-in conductor, built-in conductor is at least partially built-in in the magnet, and the both ends of built-in conductor are formed the first patch face and the second patch face that mutually vertical respectively from the adjacent vertical two side surfaces of magnet, be equipped with electrode respectively on the first patch face and the second patch face.
[0014] In further embodiments, the number of built-in conductors is two, and the two built-in conductors are spaced apart and arranged in parallel in the magnet.
[0015] In further embodiments, the electrodes respectively provided on the first patch face and the second patch face are built-in conductive copper, a metallized layer, or an externally connected conductive copper.
[0016] In a fourth aspect, the utility model discloses a kind of inductance integrated module, it is characterized in that, including MOS tube, PCB board and the novel inductance of third aspect, wherein the MOS tube is connected and is arranged on the first patch face and with the first patch face electric connection, the PCB board is connected and is arranged on the second patch face and with the second patch face electric connection, and the MOS tube is electrically connected on the PCB board.
[0017] Compared with prior art, the utility model has the beneficial effects that: the novel inductance and inductance integrated module disclosed by the utility model, wherein the corresponding electrodes in the built-in conductor contained in the novel inductance are distributed on non-same patch faces, such as two patch faces parallel to each other or two patch faces perpendicular to each other, so that the inductance can be directly connected with surrounding devices, the overall volume of the module is reduced, and the manufacturing cost is reduced and the circuit loss is reduced. BRIEF DESCRIPTION OF DRAWINGS
[0018] Figure 1 is the structure schematic view of the novel inductance disclosed by the utility model embodiment one;
[0019] Figure 2 is the structure schematic view of the inductance integrated module disclosed by the utility model embodiment two;
[0020] Figure 3 is the structure schematic view of another view of the inductance integrated module disclosed by the utility model embodiment two;
[0021] Figure 4 is the structure schematic view of the novel inductance disclosed by the utility model embodiment three;
[0022] Figure 5 is the structure schematic view of the inductance integrated module disclosed by the utility model embodiment four. DETAILED DESCRIPTION
[0023] The embodiments of the utility model are described in detail below. It should be emphasized that the following description is merely exemplary, and is not intended to limit the scope of the utility model and its applications.
[0024] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element. In addition, the connection can be for fixing or for circuit / signal communication.
[0025] It should be understood that the terms "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the embodiments of the utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the utility model.
[0026] In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second" can explicitly or implicitly include one or more of the features. In the description of the embodiments of the utility model, the meaning of "a plurality of" is two or more, unless otherwise explicitly specified.
[0027] As Figure 1 shown, the utility model embodiment one discloses a novel inductance 10, including magnet 11, built -in conductor 12 and external conductor 13, built -in conductor 12 is at least partially built -in in magnet 11, and the both ends of built -in conductor 12 are formed with mutually parallel first patch face 121 and second patch face 122 respectively from the opposite two ends of magnet 11, and the electrode is respectively arranged on first patch face 121 and second patch face 122, external conductor 13 is externally arranged on the opposite two sides of magnet 11, and the both ends of external conductor 13 are respectively located in the two ends corresponding to first patch face 121 and second patch face 122.
[0028] Further, the number of built -in conductor 12 is two, and two built -in conductors 12 are spaced apart and arranged in parallel in magnet 11. In the embodiment, the built -in conductor 12 is built -in in the internal part of magnet 11 except the electrode part formed by first patch face 121 and second patch face 122; and the built -in conductor 12 located in the internal part of magnet 11 is arranged along the direction parallel to the multiple faces of magnet 11, to realize the maximum reduction of line loss. In the specific embodiment, built -in conductor 12 is divided into three sections, wherein the middle section is arranged parallel to the top face, and the head and tail sections are arranged parallel to the side face.
[0029] External conductor 13 is divided into two groups, and the number of each group of external conductor 13 is at least two, and two groups of external conductor 13 are externally arranged in parallel on the opposite two sides of magnet 11.
[0030] The electrodes respectively arranged on the first patch surface 121 and the second patch surface 122 are built-in conductive copper, a metalized layer (for example, a plating metalized layer, a PVD metalized layer or the like) or an external conductive copper, and in specific embodiments, the inductance feasibility and cost can be adjusted.
[0031] In the embodiment, the first patch surface 121 and the second patch surface 122 are respectively protruded from the top and the bottom of the magnet 11, that is, the first patch surface 121 and the second patch surface 122 are respectively arranged on the upper and lower surfaces of the magnet 11 and are centrally symmetric.
[0032] As shown in Figure 2 and Figure 3 embodiment two of the utility model discloses an inductance integrated module, including MOS tube 20, PCB board 30 and the novel inductance 10 in embodiment one, combine Figure 1 In which, MOS tube 20 is connected and arranged on the first patch surface 121 and is electrically connected with the first patch surface 121 and the first end of external conductive body 13 simultaneously, and PCB board 30 is connected and arranged on the second patch surface 122 and is electrically connected with the second patch surface 122 and the second end of external conductive body 13 simultaneously.
[0033] The novel inductance 10 is two-phase vertical inductance that is centrally symmetric up and down, wherein the module output Vin is communicated from the input port of PCB board 30 to the output port of MOS tube 20 through external conductive body 13, the output port of MOS tube 20 is communicated with the electrode on the top of novel inductance 10 (that is, the electrode arranged on the first patch surface 121), then is transmitted to the second patch surface 122 that is parallel and opposite to the first patch surface 121 through built-in conductive body 12, and finally is connected with PCB board 30 as output Vout directly through the electrode of second patch surface 122. The volume utilization rate of the inductance integrated module is high, the redundant route is less, and the line loss is low. In the utility model, the vertical inductance refers to the inductance that two patch surfaces are parallel or vertical structure.
[0034] As shown in Figure 4 embodiment three of the utility model discloses a novel inductance 40, including magnet 41 and built-in conductive body 42, built-in conductive body 42 is at least partially built-in in magnet 41, and the two ends of built-in conductive body 42 are respectively led out from the two adjacent vertical side surfaces of magnet 41 to form mutually perpendicular first patch surface 421 and second patch surface 422, and electrodes are respectively arranged on the first patch surface 421 and the second patch surface 422.
[0035] Further, the number of the built-in conductors 42 is two, and the two built-in conductors 42 are arranged in the magnet 41 in a manner of being spaced apart from each other and being parallel to each other. In the embodiment, the built-in conductors 42 are built in the magnet 41 except for the electrode parts formed by the first patch face 421 and the second patch face 422, and the built-in conductors 42 in the magnet 41 are arranged in a direction parallel to the plurality of faces of the magnet 41, so as to achieve the maximum reduction of line loss. In the specific embodiment, the built-in conductors 42 are divided into two sections, one of which is arranged parallel to the top face, and the other of which is arranged parallel to the side face.
[0036] In the embodiment, the electrodes respectively arranged on the first patch face 421 and the second patch face 422 are built-in conductive copper, a metalized layer (such as a plated metalized layer, a PVD metalized layer, etc.) or an external conductive copper, which can be adjusted according to the feasibility of inductance and low cost in specific embodiments.
[0037] In the embodiment, the first patch face 421 and the second patch face 422 are arranged on two adjacent and perpendicular faces of the magnet 41, wherein the first patch face 421 is arranged protruding on the side face of the magnet 41, and the second patch face 422 is arranged protruding on the bottom face of the magnet 41.
[0038] As shown in Figure 5 the fourth embodiment of the utility model discloses an inductance integrated module, including MOS tube 50, PCB board 60 and the novel inductance 40 in embodiment three, wherein the MOS tube 50 is connected and arranged on the first patch face 421 and is electrically connected with the first patch face 421, the PCB board 60 is connected and arranged on the second patch face 422 and is electrically connected with the second patch face 422, and the MOS tube 50 is electrically connected on the PCB board 60.
[0039] The novel inductance 40 is two-phase perpendicular inductance that is center-symmetrical left and right, wherein the module output Vin is directly connected with the MOS tube 50 from the input port of the PCB board 60, the output port of the MOS tube 50 is communicated with the electrode (i.e. the electrode arranged on the first patch face 421) of the side face of the novel inductance 40, then is transmitted to the second patch face 422 on the bottom which is perpendicular to the first patch face 421 through the built-in conductor 42, and finally is directly connected with the PCB board 60 through the electrode of the second patch face 422 as the output Vout. The volume utilization rate of the inductance integrated module is high, the redundant route is less, and the line loss is low.
[0040] The novel inductor provided by the utility model has low circuit loss, low manufacturing cost, small module size and high space utilization rate.
[0041] The novel inductor provided by the utility model has low circuit loss, low manufacturing cost, small module size and high space utilization rate.
[0042] The background part of the utility model can contain background information about the problems or environment of the utility model, rather than the prior art described by others. Therefore, the content contained in the background art part is not the acknowledgement of the prior art by the applicant.
[0043] The above content is a further detailed description of the utility model in combination with specific / preferred embodiments, and cannot be regarded as the specific implementation of the utility model being limited to these descriptions. For ordinary skilled persons in the technical field to which the utility model belongs, they can make several alternatives or modifications to the described embodiments without departing from the concept of the utility model, and these alternatives or modifications should be regarded as belonging to the protection scope of the utility model. In the description of the specification, the description of the reference terms "an embodiment", "some embodiments", "preferred embodiment", "example", "specific example" or "some examples" means that the specific features, structures, materials or characteristics described in combination with the embodiment or example are contained in at least one embodiment or example of the utility model. In the specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any suitable way in any one or more embodiments or examples. In addition, the skilled person in the art can combine and combine the different embodiments or features of the embodiments or examples described in the specification without contradiction. Although the embodiments of the utility model and their advantages have been described in detail, it should be understood that various changes, replacements and modifications can be made in this paper without departing from the scope defined by the appended claims.
Claims
1. A novel inductor, characterized in that, The device includes a magnet, a built-in conductor, and an external conductor. The built-in conductor is at least partially built into the magnet, and its two ends extend from opposite ends of the magnet to form a first patch surface and a second patch surface that are parallel to each other. Electrodes are provided on the first patch surface and the second patch surface. The external conductor is located on opposite sides of the magnet, and its two ends are located at the ends corresponding to the first patch surface and the second patch surface, respectively.
2. The novel inductor according to claim 1, characterized in that, The number of built-in conductors is two, and the two built-in conductors are arranged in the magnet body with spacing between them and parallel to each other.
3. The novel inductor according to claim 1, characterized in that, The external conductors are divided into two groups, with at least two external conductors in each group. The two groups of external conductors are respectively placed parallel to each other on opposite sides of the magnet.
4. The novel inductor according to claim 1, characterized in that, The electrodes provided on the first patch surface and the second patch surface are respectively internal conductive copper, metallized layer or external conductive copper.
5. The novel inductor according to claim 1, characterized in that, The first patch surface and the second patch surface protrude from the top and bottom of the magnet, respectively.
6. An integrated inductor module, characterized in that, The invention includes a MOSFET, a PCB board, and a novel inductor as described in any one of claims 1 to 5, wherein the MOSFET is connected to the first patch surface and is electrically connected to both the first patch surface and the first end of the external conductor, and the PCB board is connected to the second patch surface and is electrically connected to both the second patch surface and the second end of the external conductor.
7. A novel inductor, characterized in that, It includes a magnet and a built-in conductor, wherein at least part of the built-in conductor is built into the magnet, and the two ends of the built-in conductor are respectively led out from two adjacent perpendicular sides of the magnet to form a first patch surface and a second patch surface that are perpendicular to each other. Electrodes are respectively provided on the first patch surface and the second patch surface.
8. The novel inductor according to claim 7, characterized in that, The number of built-in conductors is two, and the two built-in conductors are arranged in the magnet body with spacing between them and parallel to each other.
9. The novel inductor according to claim 7, characterized in that, The electrodes provided on the first patch surface and the second patch surface are respectively internal conductive copper, metallized layer or external conductive copper.
10. An integrated inductor module, characterized in that, The invention includes a MOSFET, a PCB board, and a novel inductor as described in any one of claims 7 to 9, wherein the MOSFET is connected to and electrically connected to the first patch surface, the PCB board is connected to and electrically connected to the second patch surface, and the MOSFET is electrically connected to the PCB board.