CMOS data clearing device and liquid cooling system
By designing a CMOS data erasure device, which automatically turns on the RTC pin and GND pin using a microcontroller and switching unit, the problem of low CMOS data erasure efficiency in the prior art is solved, and efficient CMOS data erasure is achieved.
Patent Information
- Application Number
- CN202423106625.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2034-12-16
AI Technical Summary
Current CMOS data erasure technology has low efficiency and requires a lot of manual operation, resulting in low efficiency.
Design a CMOS data clearing device, including a microcontroller and a switching unit. The device automatically turns on after receiving a control signal by electrically connecting the RTC pin and GND pin of the CMOS jumper to clear the CMOS data.
The CMOS data can be cleared without manual removal of the server, and the efficiency of CMOS data clearing is improved by automatically turning on the RTC pin and GND pin.
Smart Images
Figure CN223637960U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Embodiments of the present application relate to the technical field of server, in particular to a CMOS data clearing device and a liquid cooling system. BACKGROUND
[0002] Complementary Metal Oxide Semiconductor (CMOS) refers to a technology for manufacturing large-scale integrated circuit chips or a chip manufactured by the technology, which is a Random Access Memory (RAM) chip on a computer or server motherboard that can be read and written. CMOS is often used to save basic startup information (such as date, time, startup settings, etc.) of a computer or server, as well as hardware configuration of a Basic Input / Output System (BIOS) and user settings for certain parameters.
[0003] When an exception occurs in a computer or server, the exception can sometimes be resolved by clearing the data in the CMOS on the motherboard. CMOS jumper mode can be used to clear CMOS data, which includes three pins. In general, a jumper cap is inserted into the No. 1 pin and the No. 2 pin of the CMOS jumper. In order to clear the CMOS data, the jumper cap needs to be inserted into the No. 2 pin and the No. 3 pin of the CMOS jumper, wherein the No. 2 pin and the No. 3 pin are RTC pins and GND pins. After the jumper cap is inserted into the No. 2 pin and the No. 3 pin, the RTC pins and the GND pins are turned on, thereby achieving the purpose of clearing the CMOS data. However, when using the CMOS jumper mode to clear the CMOS data, if a person needs to manually find the CMOS jumper on the motherboard and move the jumper cap, the CMOS data clearing efficiency will be low. CONTENT OF THE UTILITY MODEL
[0004] In view of the above problems, embodiments of the present application provide a CMOS data clearing device and a liquid cooling system to solve the problem of low CMOS data clearing efficiency in the prior art.
[0005] According to an aspect of an embodiment of the present application, a CMOS data clearing device is provided, which includes a microcontroller and a switch unit. The microcontroller includes a first pin, and the switch unit includes a second pin, a third pin and a fourth pin. The first pin is electrically connected to the second pin, and the third pin and the fourth pin are respectively used to be electrically connected to RTC pins and GND pins of a CMOS jumper of a server. The microcontroller is configured to send a first signal to the second pin through the first pin when a control signal is received, so as to turn on the third pin and the fourth pin.
[0006] In an optional mode, the device comprises n switch units, the microcontroller comprises n first pins, and the n first pins are electrically connected to the n second pins of the n switch units in one-to-one correspondence; the microcontroller is configured to, when receiving a control signal for enabling the i th first pin to send the first signal, send the first signal to the i th second pin through the i th first pin, so as to enable the i th second pin and the i th third pin to be conductive, where i and n are positive integers, n≥2, and i≤n.
[0007] In an optional mode, the microcontroller further comprises n registers, and the n first pins correspond to the n registers in one-to-one correspondence; the microcontroller is configured to, when the i th register receives the control signal, send the first signal to the i th second pin through the i th first pin.
[0008] In an optional mode, the device further comprises a connector, the connector comprises a fifth pin and a sixth pin, the third pin is electrically connected to the fifth pin, and the fourth pin is electrically connected to the sixth pin, where the fifth pin and the sixth pin are respectively used to be electrically connected to the RTC pin and the GND pin.
[0009] In an optional mode, the microcontroller is configured to, when receiving the control signal, send a high-level signal to the gate of the MOS tube through the first pin, so as to enable the source of the MOS tube and the drain of the MOS tube to be conductive.
[0010] In an optional mode, the switch unit comprises an N-channel enhancement-mode MOS tube and a resistor, where the gate, the source and the drain of the MOS tube are the second pin, the third pin and the fourth pin respectively, the drain is used to access the power supply through the resistor, and the source is used to be grounded.
[0011] According to another aspect of the embodiments of the present application, a liquid cooling system is provided for cooling a server, the liquid cooling system comprising a server, a programmable logic controller and a CMOS data clearing device as described above, wherein the programmable logic controller is in communication connection with the microcontroller, and the programmable logic controller is configured to send the control signal to the microcontroller.
[0012] In an optional mode, the liquid cooling system further comprises a power supply distributor, the power supply distributor is connected to the server through a power supply line, and the power supply distributor is configured to distribute working power for the server.
[0013] In an optional mode, the power distributor is a digital power distributor, the digital power distributor comprises a controlled pin, the programmable logic controller comprises a control pin, the controlled pin and the control pin are electrically connected; the programmable logic controller is configured to send a second signal and a third signal to the controlled pin through the control pin; the digital power distributor is configured to cut off the working power supply of the server when the second signal is received; and the digital power distributor is further configured to normally distribute the working power supply to the server when the third signal is received.
[0014] In an optional mode, the liquid cooling system comprises n servers and n switch units, the microcontroller comprises n first pins and n registers, the n first pins correspond to the n registers one by one, and the n first pins are electrically connected to the n second pins in the n switch units one by one; the programmable logic controller is configured to send a control signal to an i-th register in the microcontroller; and the microcontroller is configured to send the first signal to an i-th second pin through an i-th first pin when the i-th register receives the control signal, so as to make an i-th third pin and an i-th fourth pin conductive, where i and n are positive integers, n is greater than or equal to 2, and i is less than or equal to n.
[0015] In the embodiments of the present application, since the third pin and the fourth pin are respectively used to be electrically connected to the RTC pin and the GND pin of the CMOS jumper of the server, when the third pin and the fourth pin are conductive, the RTC pin and the GND pin of the CMOS jumper of the server are also correspondingly conductive, so that the CMOS data in the server is cleared. Since the microcontroller sends the first signal to the second pin through the first pin after receiving the control signal, the RTC pin and the GND pin of the CMOS jumper of the server are conductive, so that the CMOS data in the server can be cleared without manually removing the server from the liquid cooling system and disassembling the parts of the server, which greatly improves the efficiency of clearing the CMOS data in the server.
[0016] The above description is only a summary of the technical solutions of the embodiments of the present application, in order to more clearly understand the technical means of the embodiments of the present application, the embodiments of the present application can be implemented according to the content of the description, and in order to make the above and other purposes, characteristics and advantages of the embodiments of the present application more obvious and easy to understand, the specific embodiments of the present application are described below. BRIEF DESCRIPTION OF DRAWINGS
[0017] The accompanying drawings are only used to show the embodiments and are not considered as limitations of the present application. Moreover, the same reference signs are used to represent the same parts throughout the drawings. In the drawings:
[0018] Figure 1 A schematic diagram of a CMOS data clearing device provided by an embodiment of the present application is shown;
[0019] Figure 2 A schematic diagram of a CH32V103C8T6 chip is shown;
[0020] Figure 3 A schematic diagram of a switch unit provided by an embodiment of the present application is shown;
[0021] Figure 4 A schematic diagram of a connector is shown;
[0022] Figure 5 A schematic diagram of a liquid cooling system provided by an embodiment of the present application is shown;
[0023] Figure 6 A circuit schematic diagram of a CMOS data clearing device provided by an embodiment of the present application for converting a control signal sent by a PCL is shown;
[0024] Figure 7 A schematic diagram of a liquid cooling system provided by another embodiment of the present application is shown.
[0025] Reference signs in the detailed description of the embodiments are as follows:
[0026] 1. A liquid cooling system;
[0027] 10. A CMOS data clearing device; 20. A programmable logic controller; 30. A server; 40. A digital power distributor;
[0028] 110. A microcontroller; 120. A switch unit. DETAILED DESCRIPTION
[0029] Exemplary embodiments of the present application will be described herein below with reference to the accompanying drawings. Although exemplary embodiments of the present application are shown in the drawings, it is understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein.
[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application; the terms "comprising," "having," and "including," and variations thereof, as used herein are intended to be equivalent to the term "consisting of" and are intended to cover the inclusion of one or more integers, elements, components, steps, or combinations thereof, but not the exclusion of any other integers, elements, components, steps, or combinations thereof.
[0031] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise explicitly specified and limited.
[0032] Reference herein to "embodiments" means that the particular features, structures, or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily all refer to the same embodiment, nor is it necessarily a separate or alternative embodiment to other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0033] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating any combination of the listed objects. For example, "A and / or B" can mean that A exists, A and B exist at the same time, or B exists. In addition, the character " / " herein generally represents a "or" relationship between the associated objects before and after it.
[0034] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two), and similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).
[0035] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the embodiments of the present application.
[0036] In the description of the embodiments of the present application, unless otherwise explicitly specified and limited, the technical terms "mounting", "connection", "connection", "fixing" and the like should be understood in a broad sense, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the embodiments of the present application can be understood according to the specific circumstances.
[0037] Liquid cooling technology is one of the effective technologies for saving energy consumption of data center and reducing power usage effectiveness (PUE). In order to cool the server, the server can be placed in a tank containing cooling liquid in the immersion liquid cooling system, and the cooling liquid in direct contact with the server absorbs the heat generated by the server, thereby achieving the purpose of cooling the server.
[0038] For the server immersed in the immersion liquid cooling system, in order to clear the CMOS data, if the jumper cap is manually inserted into the No. 2 pin and the No. 3 pin, multiple people need to use the gantry to remove the server from the cooling liquid in the tank, then remove the upper cover of the server case, and sequentially remove other components in the server as needed until the CMOS jumper on the motherboard of the server is found, then the jumper cap is inserted into the No. 2 pin and the No. 3 pin of the CMOS jumper, so that the RTC pin and the GND pin are connected, thereby realizing the clearing of the CMOS data. After clearing the CMOS data, the removed components need to be installed back, and the server needs to be moved into the tank in the immersion liquid cooling system. It can be seen that the above-mentioned method of clearing the CMOS data needs to consume more manpower and is low in efficiency.
[0039] Therefore, in order to improve the efficiency of clearing the CMOS data, the embodiment of the present application provides a CMOS data clearing device, which comprises a microcontroller and a switch unit, the microcontroller is electrically connected with the switch unit, two pins of the switch unit are respectively electrically connected with an RTC pin and a GND pin of a CMOS jumper, and the microcontroller sends a first signal to the switch unit when receiving a control signal, so that the two pins of the switch unit electrically connected with the RTC pin and the GND pin of the CMOS jumper are connected, and the RTC pin and the GND pin of the CMOS jumper are also connected, thereby achieving the purpose of quickly clearing the CMOS data.
[0040] Figure 1 A schematic diagram of the CMOS data clearing device provided by the embodiment of the present application is shown. As shown in Figure 1 The CMOS data clearing device 10 comprises a microcontroller 110 and a switch unit 120, the microcontroller 110 comprises a first pin, and the switch unit 120 comprises a second pin, a third pin and a fourth pin. The first pin is electrically connected with the second pin, and the third pin and the fourth pin are respectively used for being electrically connected with an RTC pin and a GND pin of a CMOS jumper of a server. The microcontroller 110 is used for sending a first signal to the second pin through the first pin when receiving a control signal, so that the third pin and the fourth pin are connected.
[0041] In the embodiments of the present application, since the third pin and the fourth pin are respectively used for electrical connection with the RTC pin and the GND pin of the CMOS jumper of the server, after the third pin and the fourth pin are turned on, the RTC pin and the GND pin of the CMOS jumper of the server are also turned on accordingly, so as to realize the clearing of the CMOS data in the server. Since the microcontroller 110 sends the first signal from the first pin to the second pin after receiving the control signal, the RTC pin and the GND pin of the CMOS jumper of the server are turned on, without the need of manually removing the server from the liquid cooling system and disassembling the parts of the server, the clearing of the CMOS data in the server can be completed, and the efficiency of clearing the CMOS data in the server is greatly improved.
[0042] In order to better introduce the CMOS data clearing device provided in the present application, the microcontroller 110 is taken as a CH32V103C8T6 chip, and the switch unit 120 includes a metal-oxide-semiconductor field-effect transistor (MOS) and a resistor as an example for introduction. Figure 2 A schematic diagram of the CH32V103C8T6 chip is shown. Figure 3 A schematic diagram of the switch unit provided in the embodiments of the present application is shown.
[0043] As shown in FIG. 6, the switch unit 120 includes a first pin, a second pin, a third pin and a fourth pin. Figure 2 and Figure 3As shown, in the embodiment of the present application, the 16 pins of the CH32V103C8T6 chip, i.e., the 38th-46th pins, the 27th-28th pins, and the 14th-19th pins, can be used as the first pins. The CH32V103C8T6 chip internally includes 16 registers, and the 16 registers correspond to the 38th-46th pins, the 27th-28th pins, and the 14th-19th pins of the CH32V103C8T6 chip one by one. When the CH32V103C8T6 chip receives a control signal (i.e., a high-level signal) at the ith register, the CH32V103C8T6 chip will control the ith first pin to output a first signal (i.e., a high-level signal) accordingly. The gate, the source, and the drain of the MOS tube in the switch unit are the second pin, the third pin, and the fourth pin, respectively. The source of the MOS tube is used for grounding in addition to being electrically connected to the RTC pin of the CMOS jumper of the server. The drain of the MOS tube is used for being connected to the power supply VCC3_3VDD of 3.3V through the resistor R65 in addition to being electrically connected to the GND pin of the CMOS jumper of the server. In the figure, the gate of the MOS tube is electrically connected to the 38th pin of the CH32V103C8T6 chip. The CH32V103C8T6 chip is used for sending a high-level signal to the gate of the MOS tube through the 38th pin when the CH32V103C8T6 chip receives a high-level signal at the register corresponding to the 38th pin, so as to make the source and the drain of the MOS tube conductive, and thus the RTC pin and the GND pin of the CMOS jumper in the server connected to the MOS tube are conductive, thereby achieving the purpose of clearing the CMOS data.
[0044] It is worth noting that the embodiment of the present application only takes the CH32V103C8T6 chip and one switch unit as an example for introduction. As introduced above, the 16 pins of the CH32V103C8T6 chip, i.e., the 38th-46th pins, the 27th-28th pins, and the 14th-19th pins, can be used as the first pins. That is, the CH32V103C8T6 chip can control up to 16 switch units at the same time, that is, the RTC pin and the GND pin of the CMOS jumper of up to 16 servers can be made conductive at the same time. If it is needed to control multiple servers by using multiple first pins of the CH32V103C8T6 chip to connect to multiple switch units, the structures of the multiple switch units can refer to the structure of the switch unit shown in FIG. 2. Figure 3 The connection mode of the multiple first pins of the CH32V103C8T6 chip and the multiple switch units can refer to the connection mode of the first pin of the CH32V103C8T6 chip and the switch unit shown in FIG. 2. Figure 2 and Figure 3 This will not be described here again.
[0045] In order to facilitate the electrical connection between the CMOS data clearing device 10 and the RTC pin and the GND pin of the CMOS jumper of the server, in the embodiment of the present application, the CMOS data clearing device 10 further includes a connector 1000, Figure 4 The schematic diagram of the connector is shown in FIG. 10. As shown in FIG. 10, the connector 1000 includes a first pin 1001, a second pin 1002, and a third pin 1003. The first pin 1001 is electrically connected to the RTC pin of the CMOS jumper of the server, the second pin 1002 is electrically connected to the GND pin of the CMOS jumper of the server, and the third pin 1003 is electrically connected to the gate of the MOS tube in the switch unit.Figure 3 and Figure 4 as shown, Figure 3 the signal name of the drain of the MOS transistor in the MCU_S0_RTC_IO_0, Figure 4 the signal name of the No. 1 pin of the connector is also MCU_S0_RTC_IO_0, and the signal names are consistent, indicating that the drain of the MOS transistor is connected with the No. 1 pin of the connector. Similarly, Figure 3 the signal name of the source of the MOS transistor is MCU_S0_IO_1, Figure 4 the signal name of the No. 2 pin of the connector is also MCU_S0_IO_1, and the signal names are consistent, indicating that the source of the MOS transistor is connected with the No. 2 pin of the connector. Figure 4 the No. 1 pin and the No. 2 pin of the connector are the sixth pin and the fifth pin respectively. The GND pin and the RTC pin of the CMOS jumper of the server are directly connected with the No. 1 pin and the No. 2 pin of the connector respectively, that is, the drain and the source of the MOS transistor are connected with the GND pin and the RTC pin of the CMOS jumper of the server respectively. In the embodiment of the application, by setting the connector in the CMOS data clearing device 10, it is equivalent to directly providing an external interface for the GND pin and the RTC pin of the CMOS jumper of the server, so as to facilitate the connection of the MOS transistor with the GND pin and the RTC pin of the CMOS jumper.
[0046] It is worth noting that, Figure 4 the connector shown can be connected with at most 8 MOS transistors, that is, when the CMOS data clearing device 10 needs to be connected with 8 servers to control the conduction of the GND pin and the RTC pin of the CMOS jumper of the 8 servers, only one connector needs to be set. The embodiment of the application only takes the connection of the CMOS data clearing device 10 with one server as an example for introduction.
[0047] Figure 5 a schematic diagram of the liquid cooling system provided by the embodiment of the application is shown. As shown in Figure 5 the liquid cooling system 1 includes the CMOS data clearing device 10, the programmable logic controller (PLC) 20 and the server 30, wherein the programmable logic controller 20 is in communication connection with the microcontroller 110, and the programmable logic controller 20 is used to send a control signal to the microcontroller 110.
[0048] Figure 6 a circuit schematic diagram for converting the control signal sent by the PCL in the CMOS data clearing device provided by the embodiment of the application is shown. As shown in Figure 6As shown, the CMOS data clearing device 10 can convert the control signal sent by the programmable logic controller 20 to the microcontroller 110 in three ways to obtain the converted control signal, so that the microcontroller 10 can directly send the first signal to the second pin of the switch unit 120 according to the converted control signal after receiving the converted control signal. Among them, the first implementation is to convert the control signal sent by the PCL by the circuit composed of U1 and U2 in the figure, at this time, the optocoupler part R8, R28, R29, D1, R33, R32, R10, R34 and R35 are not included (i.e. not included), TP8485 part R3 and R4 are included (i.e. included), Nsi8140 part R2, R37 are included, R1 and R36 are not included, decoding output part R46 is included, R38, R44 and R45 are not included. The second way is to convert the control signal sent by the PCL by the circuit composed of U3 in the figure, at this time, the optocoupler part R8, R28, R29, D1 and R33 are included, R32, R10, R34 and R35 are not included, TP8485 part R3 and R4 are not included, Nsi8140 part R1, R2, R36 and R37 are not included, decoding output part R45 is included, R38, R44 and R46 are not included. The third way is to convert the control signal sent by the PCL by the circuit composed of U2 and U3 in the figure, at this time, the optocoupler part R32, R10, R34 and R35 are included, R8, R28, R29, D1 and R33 are not included, TP8485 part R3 and R4 are included, Nsi8140 part R1, R2, R36 and R37 are not included, decoding output part R44 is included, R38, R45 and R46 are not included.
[0049] In some embodiments, the liquid cooling system further comprises a power distribution unit (PDU), the PDU is connected with the server through a power line, and the PDU is used for distributing working power for the server.
[0050] Figure 7 A schematic of a liquid cooling system provided by another embodiment of the application is shown. As Figure 7As shown, the PDU in the liquid cooling system 1 is a digital power distributor 40, the digital power distributor 40 includes a controlled pin, the programmable logic controller 20 includes a control pin, and the controlled pin of the digital power distributor 40 and the control pin of the programmable logic controller 20 are electrically connected. The programmable logic controller 20 is configured to send a second signal (for example, a high-level signal) to the controlled pin through the control pin, and the digital power distributor 40 is configured to cut off the working power supply of the server when the second signal is received, so that the server is in a power-off state. The programmable logic controller 20 is also configured to send a third signal (for example, a low-level signal) to the controlled pin of the digital power distributor 40 through the control pin, and the digital power distributor 40 is also configured to normally distribute the working power supply to the server 30 when the third signal is received, so that the server 30 is connected to the power supply and normally works.
[0051] In some cases, when the server 30 is in a working state, if the RTC pin and the GND pin of the CMOS jumper of the server 30 are directly controlled to be connected, the CMOS data is cleared, which may cause adverse effects on the server 30. Therefore, in order to avoid adverse effects on the server 30, in the embodiment of the present application, the digital power distributor 40 is arranged in the liquid cooling system 1, the digital power distributor 40 distributes the working power supply to the server 30, before the RTC pin and the GND pin of the CMOS jumper of the server 30 are controlled to be connected and the CMOS data is cleared, the programmable logic controller 20 outputs the second signal to the digital power distributor 40, so that the digital power distributor 40 cuts off the working power supply of the server 30, and the server 30 is in a power-off state, then the programmable logic controller 20 outputs the control signal to the microcontroller 110, so that the microcontroller 110 outputs the first signal to the switch unit 120, and then the second pin and the third pin of the switch unit 120 are connected, so as to clear the CMOS data of the server 30. After the CMOS data of the server 30 is cleared, the programmable logic controller 20 can send a low-level signal to the register in the microcontroller 110, so that the first pin of the microcontroller 110 outputs a low-level signal to the second pin of the switch unit, and then the third pin and the fourth pin of the switch unit 120 are disconnected, that is, the RTC pin and the GND pin of the CMOS jumper of the server 30 are disconnected. Then the programmable logic controller 20 outputs the third signal to the digital power distributor 40, so that the digital power distributor 40 distributes the working power supply to the server 30, so that the server 30 is connected to the working power supply and normally works.
[0052] In some embodiments, the liquid cooling system 1 comprises n servers 30 and n switch units 120, the microcontroller 110 comprises n first pins and n registers, the n first pins correspond to the n registers one by one, and the n first pins are electrically connected to n second pins in the n switch units 120 one by one. The programmable logic controller 20 is configured to send a control signal to an i th register in the microcontroller 110, so that the microcontroller 110 sends a first signal to an i th second pin through an i th first pin when the i th register receives the control signal, and an i th third pin and an i th fourth pin are turned on, so as to clear CMOS data of an i th server 30 in the n servers 30.
[0053] In the description provided herein, a large number of specific details are explained. However, it can be understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure the understanding of the present description.
[0054] Similarly, it is to be understood that the above- described description of exemplary embodiments of the application is intended to be illustrative only and not limiting of the scope of the application as set forth in the claims. Thus, for example, while the above description illustrates the application with respect to a single embodiment, the application can be implemented with respect to any number of other embodiments, including but not limited to the following:
[0055] Those skilled in the art can understand that the modules in the device in the embodiments can be adaptively changed and arranged in one or more devices different from the embodiments. The modules or units or components in the embodiments can be combined into one module or unit or component, and can be divided into multiple sub-modules or sub-units or sub-components. Except that at least some of such features and / or processes or units are mutually exclusive, all combinations of all features disclosed in the specification (including the accompanying claims, abstract and drawings) and all processes or units of any method or device disclosed thus can be adopted. Unless explicitly stated otherwise, each feature disclosed in the specification (including the accompanying claims, abstract and drawings) can be replaced by an alternative feature providing the same, equivalent or similar purpose.
[0056] It should be noted that the above-mentioned embodiments illustrate rather than limit the application, and that one skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The application can be implemented by means of both hardware and software, and any combination thereof. In a unitary claim, several devices or means can be listed, comprising means which can be implemented by one and the same item of hardware. The use of the words "first", "second", and "third", etc. do not imply any order. These words are used to identify individual items.
Claims
1. A CMOS data clearing device, characterized by comprising: The device comprises a microcontroller and a switch unit, the microcontroller comprises a first pin, the switch unit comprises a second pin, a third pin and a fourth pin, wherein, The first pin is electrically connected with the second pin, and the third pin and the fourth pin are respectively used for being electrically connected with an RTC pin and a GND pin of a CMOS jumper of a server; The microcontroller is used for sending a first signal to the second pin through the first pin when a control signal is received, so as to make the third pin and the fourth pin conductive.
2. The apparatus of claim 1, wherein, The device comprises n switch units, and the microcontroller comprises n first pins, wherein the n first pins are electrically connected with n second pins of the n switch units in one-to-one correspondence; The microcontroller is used for sending the first signal to the i-th second pin through the i-th first pin when a control signal for making the i-th first pin send the first signal is received, so as to make the i-th second pin and the i-th third pin conductive, wherein i and n are positive integers, n≥2, and i≤n.
3. The apparatus of claim 2, wherein, The microcontroller further comprises n registers, and the n first pins are in one-to-one correspondence with the n registers; The microcontroller is used for sending the first signal to the i-th second pin through the i-th first pin when the i-th register receives the control signal.
4. The apparatus of claim 1, wherein, The device further comprises a connector, the connector comprises a fifth pin and a sixth pin, the third pin is electrically connected with the fifth pin, and the fourth pin is electrically connected with the sixth pin, wherein the fifth pin and the sixth pin are respectively used for being electrically connected with the RTC pin and the GND pin.
5. The apparatus of claim 1, wherein, The switch unit comprises an N-channel enhancement mode MOS tube and a resistor, wherein a gate, a source and a drain of the MOS tube are the second pin, the third pin and the fourth pin respectively, the drain is used for accessing a power supply through the resistor, and the source is used for grounding.
6. The apparatus of claim 5, wherein, The microcontroller is used for sending a high-level signal to the gate of the MOS tube through the first pin when the control signal is received, so as to make the source of the MOS tube and the drain of the MOS tube conductive.
7. A liquid cooling system for cooling a server, the system comprising: The liquid cooling system comprises a server, a programmable logic controller and the CMOS data clearing device of claim 1, wherein the programmable logic controller is in communication connection with the microcontroller, and the programmable logic controller is used for sending the control signal to the microcontroller.
8. The liquid cooling system of claim 7, wherein, The liquid cooling system further comprises a power supply distributor, the power supply distributor is connected with the server through a power supply line, and the power supply distributor is used for distributing working power supply for the server.
9. The liquid cooling system of claim 8, wherein, The power supply distributor is a digital power supply distributor, the digital power supply distributor comprises a controlled pin, the programmable logic controller comprises a control pin, and the controlled pin and the control pin are electrically connected; The programmable logic controller is used for sending a second signal and a third signal to the controlled pin through the control pin; The digital power distributor is configured to cut off the working power supply of the server when the second signal is received; The digital power distributor is further configured to normally distribute the working power supply to the server when the third signal is received.
10. The liquid cooling system of claim 7, wherein, The liquid cooling system comprises n servers and n switch units, the microcontroller comprises n first pins and n registers, the n first pins correspond to the n registers one by one, and the n first pins are electrically connected to the n second pins of the n switch units one by one. The programmable logic controller is configured to send a control signal to an i-th register in the microcontroller; The microcontroller is configured to send the first signal to an i-th second pin through an i-th first pin when the i-th register receives the control signal, so that an i-th third pin and an i-th fourth pin are turned on, wherein i and n are positive integers, n is greater than or equal to 2, and i is less than or equal to n.