Low-power-consumption circuit controlled through single key

Abstract

The utility model relates to a low-power-consumption circuit controlled through a single key, and the circuit comprises a switch, the first connection end of the switch is connected with the first end of a first power management device, the second connection end of the switch is connected with the second end of an electric chip, and the third end of the switch is connected with the third end of the electric chip; wherein the first end is used for indicating an on-off signal of the first power management device, the second end is used for indicating an on-off signal of the power utilization chip, and the third end is used for indicating an interrupt signal of the power utilization chip; wherein the first power management device is also connected with the power utilization chip and is used for supplying power to the power utilization chip. On the basis of the low-power-consumption circuit controlled through the single key, one-key power-off can be achieved under the condition that keys are not increased, and therefore the low-power-consumption requirement is met.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of electronic design, in particular to a low-power circuit controlled by a single key. BACKGROUND

[0002] In electronic circuit system, the switch key is usually connected to the power management module connected to the main electric chip (such as microcontroller, etc.), thereby serving as the system on-off control key. When the user presses the switch key, the power management module will execute the power-on or power-off operation according to the key signal, thereby controlling the start or shutdown of the whole system.

[0003] However, in the actual electronic system design, in addition to the power management module of the main electric chip, there are usually other independent power management modules for powering different functional modules of the system. For example, the peripheral circuits such as radio frequency module, sensor, communication interface, etc. usually have their own power management modules. The power management modules of these peripheral circuits will not be directly controlled by the main switch key, so even after the main electric chip enters the power-off mode, some peripheral circuits may still remain in the power-on state, thereby causing unnecessary power consumption. CONTENT OF THE INVENTION

[0004] In view of the above problems of the prior art, the present application provides a low-power circuit controlled by a single key, which can realize one-key shutdown of all power-consuming devices of the whole system, thereby meeting the low-power consumption requirement.

[0005] To achieve the above purpose, the first aspect of the present application provides a low-power circuit controlled by a single key, characterized in that it comprises: a switch, a first connection end of the switch being connected to a first end of a first power management device, a second connection end of the switch being connected to a second end of a power-consuming chip, and a third end of the switch being connected to a third end of the power-consuming chip; wherein the first end is used for indicating the start-stop signal of the first power management device, the second end is used for indicating the start-stop signal of the power-consuming chip, and the third end is used for indicating the interrupt signal of the power-consuming chip; wherein the first power management device is also connected to the power-consuming chip and used for powering the power-consuming chip.

[0006] According to the above, the switch is not only connected to the start-stop signal corresponding to the first power management device, but also connected to the start-stop signal corresponding to the power-consuming chip and the interrupt signal corresponding to the power-consuming chip, so that some devices can be individually turned off through the interrupt signal, thereby achieving the purpose of reducing power consumption.

[0007] As an implementation form of the aspect, the second power management device further comprises: a plurality of second power management devices, an output end of the second power management device is connected to a peripheral circuit of the power-consuming chip, and is used for supplying power to the corresponding peripheral circuit; an input end of each power management device is connected to a corresponding enable end of the power-consuming chip; and the input end of each second power management device is further connected to a pull-down resistor.

[0008] According to the above, by connecting a pull-down resistor to the input end of each second power management device, when the power chip is powered off, the pin connected to the peripheral circuit is pulled low to a low level, so that one-key shutdown of the entire system through the switch can be realized.

[0009] As an implementation form of the aspect, the second power management device comprises: an FPGA power management device, an output end of the FPGA power management device is connected to an FPGA chip, and is used for supplying power to the FPGA chip; and an input end of the FPGA power management device is connected to a first enable end of the power-consuming chip, wherein a pull-down resistor is further connected to a connection line between the input end and the power-consuming chip.

[0010] As an implementation form of the aspect, the second power management device comprises: a radio frequency power management device, an output end of the radio frequency power management device is connected to a radio frequency chip, and is used for supplying power to the radio frequency chip; and an input end of the radio frequency power management device is connected to a second enable end of the power-consuming chip, wherein a pull-down resistor is further connected to a connection line between the input end and the power-consuming chip.

[0011] As an implementation form of the aspect, the second power management device comprises: a display module management device, an output end of the display module management device is connected to a display module, and is used for supplying power to the display module; and an input end of the display module management device is connected to a third enable end of the power-consuming chip, wherein a pull-down resistor is further connected to a connection line between the input end and the power-consuming chip.

[0012] According to the above, the above lists some examples of the second power management device, and in other aspects, the second power management device can further comprise other peripheral circuits, such as a communication chip, etc. Through the above connection relationship, these peripheral circuits can be one-key closed based on the triggering of the switch, thereby saving energy.

[0013] As an implementation form of the aspect, the aspect further comprises: a charger, a first end of the charger is connected to an external power supply, a second end of the charger is connected to a battery, and a third end of the charger is connected to the first power management device and / or the second power management device; wherein the charger is used for, when the external power supply is connected, charging the battery and supplying power to the first power management device and / or the second power management device through the external power supply; and the charger is used for, when the external power supply is disconnected, switching to the battery to supply power to the first power management device and / or the second power management device.

[0014] From the above, by means of connecting the external power supply and the battery outside the charger, the whole system can be powered by the battery when the external power supply is not connected, so as to realize seamless connection of power supply.

[0015] As an implementation manner of the present aspect, the third end of the power-consuming chip comprises an interrupt end for indicating the on or off state of the radio frequency chip.

[0016] As an implementation manner of the present aspect, the third end of the power-consuming chip comprises an interrupt end for indicating the on or off state of the display module.

[0017] From the above, the above aspect lists that the third connection end of the switch can be connected to the interrupt end of the corresponding radio frequency chip, or can be connected to the interrupt end of the corresponding display module, which are exemplary descriptions, and the third connection end can be connected to the interrupt end of other peripherals according to other requirements.

[0018] As an implementation manner of the present aspect, the power-consuming chip comprises a KS2300 chip.

[0019] As an implementation manner of the present aspect, the first power management device comprises an AXP3160 device.

[0020] From the above, the above aspect lists a type of the power-consuming chip and the first power management device, and in other manners, the power-consuming chip can also select other types of processor chips, and the first power management device can also select other types of power management chips. BRIEF DESCRIPTION OF DRAWINGS

[0021] The various technical features of the present application and the relationship between them will be further described below with reference to the accompanying drawings. The drawings are exemplary, some technical features are not shown in actual proportion, and some technical features in the drawings can be omitted, which are conventional in the technical field to which the present application belongs and are not essential for understanding and implementing the present application, or additional technical features are shown, which are not essential for understanding and implementing the present application, that is, the combination of various technical features shown in the drawings is not used to limit the present application. In addition, the same reference signs refer to the same contents throughout the present application. The specific drawings are as follows:

[0022] Figure 1 A circuit structure schematic diagram of a low-power-consumption circuit controlled by a single key is provided for an embodiment of the present application. DETAILED DESCRIPTION

[0023] The technical solutions provided in this application will be further described below with reference to the accompanying drawings and embodiments. It should be understood that the circuit structures and business scenarios provided in the embodiments of this application are mainly for illustrating possible implementations of the technical solutions of this application and should not be construed as the sole limitation on the technical solutions of this application. Those skilled in the art will recognize that with the evolution of electronic circuit structures and the emergence of new business scenarios, the technical solutions provided in this application are equally applicable to similar technical problems.

[0024] It should be understood that the embodiments of this application provide a low-power circuit solution controlled by a single button. Since these technical solutions solve the same or similar problems, some repetitive details may not be repeated in the following descriptions of specific embodiments, but these specific embodiments should be considered as mutually referencing each other and can be combined with each other.

[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. In case of any inconsistency, the meaning set forth in this specification or derived from the content described herein shall prevail. Furthermore, the terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit the scope of this application.

[0026] The embodiments of this application will be described in detail below with reference to the accompanying drawings. First, the application scenarios of the low-power circuit controlled by a single button provided in the embodiments of this application will be introduced. This solution is suitable for miniaturized products (i.e., products containing only one power button) and scenarios with high requirements for system battery life, thereby achieving the goal of controlling the power-on and power-off of the entire system through a single power button, thus meeting the low-power requirement. For example, this circuit can be applied to embedded systems, smartphone systems, tablet systems, etc.

[0027] It should be understood that the above application scenarios are illustrative and are not intended to limit the scope of this application.

[0028] This application provides a low-power circuit controlled by a single button, which will be described in detail below with reference to the accompanying drawings. It should be noted that the "connection" between the devices and modules in the low-power circuit controlled by a single button in this application can be a physical connection or a communication connection.

[0029] like Figure 1The low-power circuit 10 controlled by a single key provided by the embodiment of the present application is shown, which comprises a switch 110, a first power management device 120, and a power-consuming chip 130. Next, the connection relationship between the components will be introduced in detail by taking the power-consuming chip as KS2300 chip and the first power management device as AXP3160 chip as an example. It should be understood that in other embodiments, the power-consuming chip 130 can be replaced by any other processor chip, and the first power management device 120 can be replaced by any other power management chip.

[0030] In the embodiment, the switch 110 comprises three connection ends. The first connection end is connected with the first end of the first power management device 120, which is used to indicate the on-off state of the first power management device 120, i.e. Figure 1 The PWRON pin on the AXP3160 chip is shown. The second connection end is connected with the second end of the power-consuming chip 130, which is used to indicate the on-off state of the power-consuming chip 130, i.e. Figure 1 The PMIC_ONOFF pin on the KS2300 chip is shown. The third connection end is connected with the third end of the power-consuming chip 130, which is used to indicate the interrupt state of the power-consuming chip 130, i.e. Figure 1 The INT pin on the KS2300 chip is shown. In addition, the first power management device 120 is also connected with the power-consuming chip 130, which is used to supply power to the power-consuming chip 130 through the first power management device 120.

[0031] In some embodiments, the third end of the power-consuming chip 130 can be an interrupt end indicating the on-off state of a display module. In some other embodiments, the third end of the power-consuming chip 130 can also be an interrupt end indicating the on-off state of a radio frequency chip.

[0032] In some embodiments, the switch 110 can be a physical key switch or a virtual touch button switch, which is not limited in the embodiment of the present application.

[0033] In some embodiments, the circuit 10 further comprises a plurality of second power management devices 140. The input end of the second power management device 140 is connected with the corresponding enable end of the power-consuming chip 130, and the output end of the second power management device 140 is connected with the peripheral circuit of the power-consuming chip 130, which is used to supply power to the corresponding peripheral circuit. The input end of each power management device is connected with the enable end of the power-consuming chip through a pull-down resistor.

[0034] For example Figure 1The second power management device 140 shown can be an FPGA power management device, the output end DCDC LDO1 of which is connected with the FPGA chip, for supplying power to the FPGA chip through the FPGA power management device; the input end EN1 of the FPGA power management device is connected with the first enable end GPIO1 of the power-consuming chip, and a pull-down resistor R1 is further connected on the connection line between the input end EN1 and the first enable end GPIO1. It should be understood that the pull-down resistor R1 referred to herein means that one end of the resistor is connected to the ground end.

[0035] For example Figure 1 The second power management device 140 shown can also be a radio frequency power management device, the output end DCDC LDO2 of which is connected with the radio frequency chip, for supplying power to the radio frequency chip through the radio frequency power management device; the input end EN2 of the radio frequency power management device is connected with the second enable end GPIO2 of the power-consuming chip. A pull-down resistor R2 is further connected on the connection line between the input end EN2 and the second enable end GPIO2.

[0036] For example Figure 1 The second power management device 140 shown can also be a display module management device, the output end DCDC LDO0 of which is connected with the display module, for supplying power to the display module through the display module management device; the input end EN0 of the display module management device is connected with the third enable end GPIO0 of the power-consuming chip. A pull-down resistor R0 is further connected on the connection line between the input end EN0 and the third enable end GPIO0.

[0037] It should be understood that the three peripheral circuits exemplified above are exemplary descriptions, and other peripheral circuits, such as a communication module, etc., can also be included in other embodiments or other power-consuming chips. For details, please refer to Figure 1 The output end of the other peripheral power device corresponding branch is connected with other peripherals, for supplying power to the corresponding peripherals, and the input end of the other peripheral power device corresponding branch is connected with the corresponding enable end of the power-consuming chip, and a corresponding pull-down resistor is further connected on the connection line between the input end and the corresponding enable end.

[0038] In some embodiments, the circuit 10 can further comprise a charger Charger, a first end IN of which is connected to an external power supply, a second end Bat of which is connected to the battery Battery, and a third end SYS of which is connected to the first power management device 120 and / or the second power management device 140 to realize system total power supply of VSYS (System Voltage). Through the above connection, the charger Charger can charge the battery Battery when the external power supply is connected, and supply power to the first power management device 120 and / or the second power management device 140 through the external power supply. The charger Charger is also used to switch to the battery Battery to supply power to the first power management device 120 and / or the second power management device 140 when the external power supply is disconnected, so as to realize seamless switching of power supply. It should be understood that the external power supply here can be a mains power supply.

[0039] In some embodiments, the opening or closing of the entire system or a part of the system can be realized by triggering the switch for different lengths of time or different operation forms (such as single click or double click, etc.), so as to realize the opening and closing of the one-key control system. The introduction of the part can be referred to the introduction of the working principle below.

[0040] Next, the working principle of the above-mentioned circuit 10 is introduced.

[0041] In the circuit 10, the power supply input of the first power management device 120 and the second power management device 140 is from the VSYS total power supply of the charger Charger, and the power supply of the first power management device 120 can be turned off by performing the first trigger mode on the switch 110, so that the power of the power chip 130 connected with the first power management device 120 is turned off, at this time, the output of each GPIO pin of the power chip 130 becomes a suspended state, but because the input pin end EN of the second power management device 140 in the circuit 10 of the present application is increased with a pull-down resistor, the enable signal of the input of each second power management device 140 is low, at this time, the output of each second power management device 140 is in the closing state, that is, by performing the first trigger mode on the switch 110, the first power management device 120, the power chip 130, the second power management device 140 and the peripherals supplied by the second power management device 140 are all powered off, so as to realize one-key closing of the entire system.

[0042] It should be noted that the above-mentioned floating state refers to setting the pins to a high-impedance state, in which the pins are neither driven to a high level nor to a low level, but are in a "disconnected" or "off" state. If a multimeter is used to measure a pin in a high-impedance state at this time, the reading may be indeterminate because it is not actively pulled high or low, resulting in system instability. Even if the shutdown function is triggered, only the first power device and the power-consuming chip are turned off, and it cannot be guaranteed that the second power management device and the corresponding peripherals are also turned off, resulting in power consumption. Through the above setting, the entire system can be turned off with one key, thereby achieving the purpose of energy saving.

[0043] In the circuit 10, the switch 110 is also connected to the second end PMIC_ONOFF of the power-consuming chip 130. Before the execution of each second power management device 140 is powered off, the executing control logic can be saved and then gradually powered off, which provides a soft power-off method to prevent damage caused by forced hard power-off.

[0044] In the circuit 10, the power supply of the first power management device 120 can be turned on by executing the second trigger mode on the switch 110, thereby powering on the power-consuming chip 130 connected to the first power management device 120. At this time, the power-consuming chip 130 can pull up or pull down each GPIO pin in sequence according to the power supply sequence to realize the opening of the second power management device 120 and its peripherals, thereby realizing the one-key starting function of the entire system.

[0045] In the circuit 10, the switch 110 is also connected to the interrupt pin (interrupt end) of the power-consuming chip. If the switch 110 is connected to the interrupt pin of the display module corresponding to the power-consuming chip, the opening of the display module (i.e., the corresponding screen-on action) can be controlled by the third trigger mode, or the closing of the display module (i.e., the corresponding screen-off action) can be controlled by the fourth trigger mode, thereby realizing the control of the opening or closing of the display module by the unit. If the switch 110 is connected to the interrupt pin of the radio frequency chip corresponding to the power-consuming chip, the opening of the radio frequency chip can be controlled by the fifth trigger mode, or the closing of the radio frequency chip can be controlled by the sixth trigger mode. Further, the purpose of reducing power consumption can also be achieved.

[0046] It should be noted that the first trigger mode, the second trigger mode, the third trigger mode, the fourth trigger mode, the fifth trigger mode, the sixth trigger mode and the like are set as different trigger modes, and the specific trigger mode is not specially limited in the present application. For example, the first trigger mode is to press the switch for 5 seconds, the second trigger mode is to press the switch for 2 seconds, the third trigger mode is to click the switch, the fourth trigger mode is to double-click the switch, the fifth trigger mode is to slide the switch from top to bottom, and the sixth trigger mode is to slide the switch from bottom to top.

[0047] Based on the circuit provided in the above embodiment, all devices in the entire circuit system can be controlled to be turned off by the switch, so that the purpose of truly reducing power consumption is achieved. In addition, based on the circuit provided above, soft shutdown of the entire system can be achieved, so that damage caused by forced power-on and power-off can be prevented. Furthermore, since devices such as display screens and radio frequency modules are not used all the time, the interrupt function in the above circuit can be used to control the turning on and turning off of a special device. Based on the circuit, the power consumption of the system can be greatly reduced, thereby prolonging the battery life.

[0048] It should be noted that the above are only preferred embodiments of the present application and the technical principles used. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and those skilled in the art can make various obvious changes, readjustments and substitutions without departing from the scope of the present application. Therefore, although the present application has been described in detail through the above embodiments, the present application is not limited to the above embodiments, and more other equivalent embodiments can be included without departing from the concept of the present application, and all belong to the protection scope of the present application.

Claims

1. A low power consumption circuit controlled by a single key, characterized by, Comprising: a switch, a first connection end of the switch is connected with a first end of a first power management device, a second connection end of the switch is connected with a second end of a power-consuming chip, and a third end of the switch is connected with a third end of the power-consuming chip; wherein the first end is used for indicating an on-off signal of the first power management device, the second end is used for indicating an on-off signal of the power-consuming chip, and the third end is used for indicating an interrupt signal of the power-consuming chip; wherein the first power management device is also connected with the power-consuming chip and is used for supplying power to the power-consuming chip.

2. The circuit of claim 1, wherein, Further comprising: a plurality of second power management devices, output ends of the second power management devices are connected with peripheral circuits of the power-consuming chip and are used for supplying power to corresponding peripheral circuits; an input end of each power management device is connected with a corresponding enable end of the power-consuming chip; wherein a pull-down resistor is also connected at the input end of each second power management device.

3. The circuit of claim 2, wherein, The plurality of second power management devices comprises: an FPGA power management device, an output end of the FPGA power management device is connected with an FPGA chip and is used for supplying power to the FPGA chip, and an input end of the FPGA power management device is connected with a first enable end of the power-consuming chip, wherein a pull-down resistor is also connected on a connection line between the input end and the power-consuming chip.

4. The circuit of claim 2, wherein, The plurality of second power management devices comprises: a radio frequency power management device, an output end of the radio frequency power management device is connected with a radio frequency chip and is used for supplying power to the radio frequency chip, and an input end of the radio frequency power management device is connected with a second enable end of the power-consuming chip, wherein a pull-down resistor is also connected on a connection line between the input end and the power-consuming chip.

5. The circuit of claim 2, wherein, The plurality of second power management devices comprises: a display module power management device, an output end of the display module power management device is connected with a display module and is used for supplying power to the display module, and an input end of the display module power management device is connected with a third enable end of the power-consuming chip, wherein a pull-down resistor is also connected on a connection line between the input end and the power-consuming chip.

6. The circuit of claim 1 or 2, wherein Further comprising: a charger, a first end of the charger is connected with an external power source, a second end of the charger is connected with a battery, and a third end of the charger is connected with the first power management device and / or the second power management device; wherein the charger is used for charging the battery and supplying power to the first power management device and / or the second power management device through the external power source when the external power source is connected, and is used for switching to the battery to supply power to the first power management device and / or the second power management device when the external power source is disconnected.

7. The circuit of claim 4, wherein, The third end of the power-consuming chip comprises an interrupt end used for indicating an on or off state of the radio frequency chip.

8. The circuit of claim 5, wherein, The third end of the power-consuming chip comprises an interrupt end used for indicating an on or off state of the display module.

9. The circuit of claim 1, wherein, The power-consuming chip comprises a KS2300 chip.

10. The circuit of claim 1, wherein, The first power management device comprises an AXP3160 device.

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