Addressable semiconductor laser array and laser transmitter circuit
By arranging cathodes and anodes on the lower surface of the substrate, combined with extended electrodes and an insulating layer, the problem that 2D addressable semiconductor laser arrays cannot achieve simultaneous emission of specific laser units is solved. This enables flexible control and multiple arrangements of laser units, improving the flexibility of laser scanning and reducing production costs.
Patent Information
- Application Number
- CN202423311724.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2034-12-31
AI Technical Summary
Existing 2D addressable semiconductor laser arrays cannot achieve simultaneous emission of specific laser units.
The laser units are arranged in an array on the substrate, with the cathode and anode both located on the lower surface of the substrate. They are connected to P-type contact electrodes by an extended electrode and protected by an insulating layer, enabling independent control and flexible wiring for each laser unit.
It enables flexible control and various arrangements of laser units, improving the flexibility and accuracy of laser scanning, simplifying the production process and reducing costs.
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Figure CN223638786U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of laser equipment, in particular to an addressable semiconductor laser array and a laser emitter circuit. BACKGROUND
[0002] Semiconductor lasers emitting perpendicular to the cavity surface (such as photonic crystal surface emitting lasers, vertical cavity surface emitting lasers) have a light beam emitted perpendicular to the basic surface, and have many advantages such as low threshold current, circular spot, high modulation bandwidth, single longitudinal mode lasing, easy to realize high-density two-dimensional array, and low manufacturing cost, and are widely used in many fields.
[0003] It is worth mentioning that in the application of laser radar, the addressable technology of the semiconductor laser array emitting perpendicular to the cavity surface can be used to realize laser scanning without the help of any rotating parts. Compared with the mechanical laser radar which realizes laser scanning through rotating parts, the influence of the stability (such as structural stability, rotation accuracy stability) and reliability of the rotating parts on the accuracy of the scanning result during operation can be avoided, and the production process can be simplified and the production cost can be reduced.
[0004] Specifically, the addressable technology can be used to realize the partitioned lighting of the laser chips in the semiconductor laser array, and the projection range and direction of the laser can be controlled by controlling the lighting area and lighting sequence, so that the laser emitted by different regions of the laser chip is gradually projected to each part of the target area to be measured in a specific sequence, thereby realizing laser scanning.
[0005] However, the current addressable technology of the semiconductor laser array still has some problems. For example, the 2D addressable semiconductor laser array cannot realize simultaneous lighting of specific laser units. CONTENT OF THE INVENTION
[0006] The present application provides an addressable semiconductor laser array and a laser emitter circuit to solve the defect that the addressable semiconductor laser array in the prior art cannot realize lighting of specific laser units.
[0007] The present application provides an addressable semiconductor laser array, comprising:
[0008] a substrate;
[0009] a plurality of laser units, the plurality of laser units are arranged in an array and are located on the upper surface of the substrate, each laser unit has a P-type contact electrode and an N-type contact electrode;
[0010] a cathode and an anode, both of which are located on the lower surface of the substrate, the anode is electrically connected to the P-type contact electrode, and the cathode is electrically connected to the N-type contact electrode.
[0011] The addressable semiconductor laser array provided in the application is characterized in that an extension electrode is arranged between the P-type contact electrode and the anode, and the extension electrode penetrates the substrate.
[0012] The addressable semiconductor laser array provided in the application is characterized in that an insulating layer is arranged between the extension electrode and the laser unit.
[0013] The addressable semiconductor laser array provided in the application is characterized in that the insulating layer is arranged on the peripheral wall of the laser unit.
[0014] The addressable semiconductor laser array provided in the application is characterized in that the plurality of laser units arranged in an array includes a plurality of rows and a plurality of columns,
[0015] All the laser units in each column share an anode and are arranged in parallel, and the anodes of each column are arranged at intervals in the extension direction of the row.
[0016] All the laser units in each row share a cathode and are arranged in parallel, and the cathodes of each row are arranged at intervals in the extension direction of the column.
[0017] The addressable semiconductor laser array provided in the application is characterized in that the plurality of laser units arranged in an array includes a plurality of rows and a plurality of columns,
[0018] All the laser units in each column share an anode and are arranged in parallel, and the anodes of each column are arranged at intervals in the extension direction of the row.
[0019] Each laser unit in each column has an independent cathode, and all the cathodes are arranged in parallel.
[0020] The addressable semiconductor laser array provided in the application is characterized in that the lead-out structures of all the cathodes are arranged at intervals in the circumferential direction of the substrate.
[0021] The addressable semiconductor laser array provided in the application is characterized in that the substrate has a first edge and a second edge, a plurality of anodes are arranged at the first edge, and the cathodes are led to the second edge.
[0022] The application further provides a laser emitter circuit comprising the addressable semiconductor laser array as described above.
[0023] The addressable semiconductor laser array and the laser emitter circuit provided in the application can avoid the wiring structure of the anode or the cathode from shielding light, and the cathode and the anode can be flexibly wired on the lower surface of the substrate to plan the circuit according to actual needs. BRIEF DESCRIPTION OF DRAWINGS
[0024] To more clearly illustrate the technical solutions in this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0025] Figure 1 This is a schematic diagram of the addressable semiconductor laser array provided in this application;
[0026] Figure 2 This is a schematic diagram of the addressable semiconductor laser array provided in this application;
[0027] Figure 3 This is a schematic diagram of the addressable semiconductor laser array provided in this application.
[0028] Figure label:
[0029] 100. Addressable semiconductor laser array;
[0030] 110. Substrate; 111. First edge; 112. Second edge;
[0031] 120. Laser unit; 121. P-type contact electrode; 122. N-type contact electrode; 123. Extension electrode; 124. Insulating layer;
[0032] 125. N-type DBR layer; 126. Active region layer; 127. Current limiting layer; 128. P-type DBR layer;
[0033] 130, cathode; 140, anode. Detailed Implementation
[0034] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0035] The following is combined with Figures 1-3 This application describes an addressable semiconductor laser array 100 and a laser emitter circuit. It is to be understood that the following description is merely illustrative and not a specific limitation of this application.
[0036] It should be noted that the addressable semiconductor laser array 100 is a special laser technology which allows individual control and addressing of each emitter in the laser array. Due to the independent control of each laser unit 120, the addressable array can achieve more complex light field distribution and dynamic patterns, which is very important for applications requiring precise beam control.
[0037] According to the addressable semiconductor laser array 100 of the embodiment of the present application, the addressable semiconductor laser array 100 comprises a substrate 110, a plurality of laser units 120, and a cathode 130 and an anode 140 both arranged on the lower surface of the substrate 110.
[0038] Specifically, the plurality of laser units 120 can be arranged in an array on the substrate 110, i.e., the plurality of laser units 120 share the substrate 110. The substrate 110 can be made of a III-V semiconductor material such as GaAs, InP, or GaSb.
[0039] Each of the laser units 120 has a P-type contact electrode 121 and an N-type contact electrode 122. Referring to Figure 2 As shown, the anode 140 is electrically connected to the P-type contact electrode 121, and the cathode 130 is electrically connected to the N-type contact electrode 122. It should be noted that titanium, platinum, and gold are commonly used metals and can be used to form the P-type contact electrode 121. In some preparation methods, this layer of metal electrode can be deposited by electron beam evaporation, and then a lift-off process is performed to form the electrode structure. It should be further noted that gold germanium nickel or gold is a commonly used N-type contact electrode 122 material. Using an alloy of gold, germanium, and nickel as the N-type contact electrode 122 material can provide good ohmic contact, and through appropriate annealing treatment, the contact resistance can be further reduced.
[0040] In combination with Figure 1 and Figure 2 As shown, the plurality of laser units 120 are all located on the upper surface of the substrate 110, and the cathode 130 and the anode 140 are both arranged on the lower surface of the substrate 110. It should be noted that light is emitted from the upper surface side of the substrate 110, and the anode 140 and the cathode 130 are both arranged on the lower surface of the substrate 110, so that the wiring structure of the anode 140 or the cathode 130 can be avoided to block the light, and the cathode 130 and the anode 140 can be flexibly wired on the lower surface of the substrate 110. On the one hand, the wiring flexibility of the cathode 130 and the anode 140 can be improved, and thus the light emission flexibility of the addressable semiconductor laser array can be improved, so that the addressable semiconductor laser array 100 has more light emission arrays; on the other hand, the structural layout on the light emission side can also be optimized.
[0041] According to the addressable semiconductor laser array 100 of the embodiments of the present application, by locating the plurality of laser units 120 on the upper surface of the substrate 110 and arranging the cathode 130 and the anode 140 on the lower surface of the substrate 110, the wiring structure of the anode 140 or the cathode 130 can be avoided to shield the light, and the cathode 130 and the anode 140 can be flexibly wired on the lower surface of the substrate 110 to plan the circuit according to the actual needs.
[0042] According to some embodiments of the present application, referring to Figure 2 As shown, the P-type contact electrode 121 and the anode 140 are provided with an extension electrode 123 penetrating the substrate 110. The extension electrode 123 can be arranged to electrically connect the P-type contact electrode 121 and the anode 140. The extension electrode 123 and the laser unit 120 are provided with an insulating layer 124, so as to simultaneously protect the extension electrode 123 and the laser unit 120, and prevent the extension electrode 123 from short-circuiting with other structures on the laser unit 120. The extension electrode 123 can be attached to the insulating layer 124. Further, the insulating layer 124 is located on the outer peripheral wall of the laser unit 120. In this way, the extension electrode 123 can be arranged on the outer periphery of the laser unit 120, so as to optimize the structural design of the addressable semiconductor laser array 100.
[0043] According to some embodiments of the present application, referring to Figure 1 As shown, the plurality of laser units 120 arranged in an array include a plurality of rows and a plurality of columns, all the laser units 120 in each column share the anode 140 and are arranged in parallel, and the anodes 140 of each column are arranged at intervals in the extension direction of the row; all the laser units 120 in each row share the cathode 130 and are arranged in parallel, and the cathodes 130 of each row are arranged at intervals in the extension direction of the column. In this way, loading a power supply to a single anode 140 and a single cathode 130 can make the laser units 120 located at the intersection of the anode 140 and the cathode 130 emit light individually.
[0044] For example, in combination with Figure 1As shown, the 4*4 addressable semiconductor laser array 100 is taken as an example, which includes sixteen laser units 120 arranged in a 4*4 array, forming a four-row four-column structure, each row including four spaced-apart laser units 120, and each column including four spaced-apart laser units 120. The anodes 140 of the laser units 120 in each column are connected in parallel (i.e., the four anodes 140 in each column are connected in parallel), and the anodes 140 of the four columns are arranged in a spaced-apart manner along the row direction; the cathodes 130 of the laser units 120 in each row are connected in parallel (i.e., the four cathodes 130 in each row are connected in parallel), and the cathodes 130 of the four rows are arranged in a spaced-apart manner along the column direction. In this way, a single anode 140 and a single cathode 130 are loaded with power, and the single laser unit 120 at the intersection of the anode 140 and the cathode 130 emits light.
[0045] It should be noted that, taking the structure of the 4*4 addressable semiconductor laser array 100 as an example, any 2*2 array includes a laser unit 120A, a laser unit 120B, a laser unit 120C, and a laser unit 120D. Among the laser units 120A-120D, the laser unit 120A and the laser unit 120B are in the same row, the laser unit 120C and the laser unit 120D are in the same row, the laser unit 120A and the laser unit 120C are in the same column, and the laser unit 120B and the laser unit 120D are in the same column. Among them, the laser unit 120A and the laser unit 120B share an anode 140, and the laser unit 120A and the laser unit 120C share a cathode 130. When controlling any one of the laser units 120 to emit light, the anode 140 and the cathode 130 corresponding to the laser unit 120 are loaded with power respectively, for example, when the anode 140 is loaded with power and the cathode 130 is loaded with power separately, only the laser unit 120A emits light. However, this structure cannot realize that any three laser units 120 in any 2*2 array emit light at the same time, and the other laser unit 120 does not emit light. For example, this structure cannot realize that the laser unit 120A, the laser unit 120B, and the laser unit 120C emit light, and the laser unit 120D does not emit light.
[0046] Therefore, in order to enable the laser units 120 in the addressable semiconductor laser array 100 to have more arrangement combinations, according to some embodiments of the present application, referring to Figure 3 As shown, the plurality of laser units 120 arranged in an array includes a plurality of rows and a plurality of columns, all the laser units 120 in each column share an anode 140 and are arranged in parallel, and the anodes 140 of the columns are arranged in a spaced-apart manner in the extension direction of the rows; each of the laser units 120 in each column has an independent cathode 130, and all the cathodes 130 are arranged in parallel.
[0047] It is understandable that the cathode 130 of any laser unit 120 in the addressable semiconductor laser array 100 is an independent electrode. In this way, when one or more laser units 120 need to emit light, the corresponding anode 140 and cathode 130 can be powered on.
[0048] For example, combining Figure 3 As shown, taking a 4x4 addressable semiconductor laser array 100 as an example, it includes sixteen laser units 120 arranged in a 4x4 array, forming a four-row, four-column structure. Each row includes four spaced-apart laser units 120, and each column includes four spaced-apart laser units 120. The anodes 140 of the laser units 120 in each column are connected in parallel (i.e., the four anodes 140 in each column are connected in parallel), and the anodes 140 in the four columns are spaced apart along the row direction. In the array, each laser unit 120 has a cathode 130, and all cathodes 130 are spaced apart. In this way, when a power source is applied to an anode 140 and a cathode 130 individually, the anode 140 and cathode 130 at the corresponding positions emit light. This not only enables the laser unit 120 at a single position to emit light, but also enables multiple laser units 120 to emit light in combination.
[0049] According to some embodiments of this application, the lead-out structures of all cathodes 130 are spaced apart along the circumferential direction of the substrate 110. This optimizes the layout of the cathode 130 lead-out structures. In some embodiments, the substrate 110 has a quadrilateral layout, with a first edge 111 and a second edge 112. A plurality of anodes 140 are disposed at the first edge 111, and the cathodes 130 are guided to the second edge 112. This allows all cathodes 130 and all anodes 140 to fully utilize the space on the lower surface of the substrate 110, enabling independent control of each laser unit 120, thereby improving the light output flexibility of the addressable semiconductor laser array 100. To facilitate guiding the lead-out structures of the cathodes 130 to the edge positions of the substrate 110, in some embodiments, some cathode 130 lead-out structures have a bending structure. The bending structure can change the orientation of the lead-out structure, thereby facilitating optimization of the cathode 130 layout.
[0050] According to some embodiments of the present application, the laser unit 120 can include an N-type DBR layer 125, an active region layer 126, a current confinement layer 127, and a P-type DBR layer 128. Specifically, the N-type DBR layer 125 is disposed on the upper surface of the substrate 110, and the N-type contact electrode 122 is electrically connected to the N-type DBR layer 125. The active region layer 126 is disposed above the N-type DBR layer 125. The current confinement layer 127 is disposed above the active region layer 126. The P-type DBR layer 128 is disposed above the current confinement layer 127, and the P-type DBR layer 128 is electrically connected to the P-type contact electrode 121.
[0051] According to the laser emitter circuit provided by the present application, the addressable semiconductor laser array 100 as described above is included.
[0052] According to the laser emitter circuit provided by the present application, by locating the plurality of laser units 120 on the upper surface of the substrate 110, and disposing the cathode 130 and the anode 140 on the lower surface of the substrate 110, the wiring structure of the anode 140 or the cathode 130 can be avoided from shielding light, and the cathode 130 and the anode 140 can be flexibly wired on the lower surface of the substrate 110 to plan the circuit according to actual needs.
[0053] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. An addressable semiconductor laser array (100), characterized in that Comprising: a substrate (110); a plurality of laser units (120) arranged in an array, each of the laser units (120) having a P-type contact electrode (121) and an N-type contact electrode (122), and each of the laser units (120) being located on an upper surface of the substrate (110); a cathode (130) and an anode (140) both located on a lower surface of the substrate (110), the anode (140) being electrically connected to the P-type contact electrode (121), and the cathode (130) being electrically connected to the N-type contact electrode (122).
2. Addressable semiconductor laser array (100) according to claim 1, characterized in that An extension electrode (123) is provided between the P-type contact electrode (121) and the anode (140), the extension electrode (123) penetrating the substrate (110).
3. Addressable semiconductor laser array (100) according to claim 2, characterized in that An insulating layer (124) is provided between the extension electrode (123) and the laser units (120).
4. Addressable semiconductor laser array (100) according to claim 3, characterized in that The insulating layer (124) is located on an outer peripheral wall of the laser units (120).
5. The addressable semiconductor laser array (100) of claim 1, characterized in that The plurality of laser units (120) arranged in an array comprises a plurality of rows and a plurality of columns, all of the laser units (120) in each column share the anode (140) and are arranged in parallel, and the anodes (140) of each column are arranged in an interval in an extension direction of the rows; all of the laser units (120) in each row share the cathode (130) and are arranged in parallel, and the cathodes (130) of each row are arranged in an interval in an extension direction of the columns.
6. The addressable semiconductor laser array (100) of claim 1, characterized in that The plurality of laser units (120) arranged in an array comprises a plurality of rows and a plurality of columns, all of the laser units (120) in each column share the anode (140) and are arranged in parallel, and the anodes (140) of each column are arranged in an interval in an extension direction of the rows; each of the laser units (120) in each column has an independent cathode (130), and all of the cathodes (130) are arranged in parallel.
7. Addressable semiconductor laser array (100) according to claim 6, characterized in that Lead-out structures of all of the cathodes (130) are arranged in an interval along a circumferential direction of the substrate (110).
8. The addressable semiconductor laser array (100) according to claim 6, characterized in that The substrate (110) has a first edge (111) and a second edge (112), a plurality of the anodes (140) are provided at the first edge (111), and the cathode (130) is led to the second edge (112).
9. A laser transmitter circuit, characterized by The addressable semiconductor laser array (100) according to any one of claims 1-8.