Circuit board and electronic equipment

By setting ground holes on the stepped surface of the intermediate layer and connecting them to the ground layer, the problem of insufficient test bandwidth of the intermediate layer was solved, and the signal return path was shortened and the bandwidth was significantly improved.

CN223652427UActive Publication Date: 2025-12-09DONGGUAN YIYUN INFORMATION SYST CO LTD
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Patent Information

Application Number
CN202520295388.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-24
Publication Date
2025-12-09
Estimated Expiration
2035-02-24

AI Technical Summary

Technical Problem

The existing stepped plate interlayer has low bandwidth in the test, which cannot meet the user requirements. The signal return path is too long, which leads to a reduction in test bandwidth.

Method used

A grounding hole is set on the second step surface of the intermediate layer and covered with a ground copper sheet. The grounding hole is processed by back drilling to shorten the signal return path. Test points are set on the first step surface. The grounding hole is connected to the ground layer to form a low impedance path.

Benefits of technology

Significantly improve the signal testing bandwidth of the intermediate layer, increasing it to at least 10GHz, to meet user needs and reduce signal transmission delay and attenuation.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a circuit board and electronic equipment, and belongs to the technical field of printed circuit boards. The circuit board comprises an interposer, the interposer comprises a first surface and a second surface along the thickness direction, and the first surface is step-shaped; the first surface comprises a first step surface and a second step surface, the first step surface is provided with a component and a test point used for testing the component, the second step surface is provided with a grounding hole, and the grounding hole is covered with a grounding copper sheet. According to the circuit board disclosed by the utility model, the ground backflow path of the test point is shortened, so that the signal test bandwidth of the intermediate layer is improved.
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Description

Technical Field

[0001] This utility model belongs to the field of printed circuit board technology, and in particular relates to a circuit board and electronic equipment. Background Technology

[0002] Interposers are commonly used in distributed systems to facilitate information exchange between nodes at higher or lower levels.

[0003] Because of the high particle spacing density on storage circuit boards, the interposer layer is prone to interference with the devices, necessitating a stepped interposer structure. However, existing stepped interposer layers exhibit low bandwidth during testing, failing to meet user requirements. Utility Model Content

[0004] This utility model provides a circuit board and an electronic device, which can...

[0005] To achieve the above objectives, this utility model provides the following technical solution:

[0006] A circuit board includes an interposer layer, the interposer layer including a first surface and a second surface along the thickness direction, wherein the first surface is stepped;

[0007] The first surface includes a first stepped surface and a second stepped surface. Components and test points for testing the components are provided on the first stepped surface. A grounding hole is provided on the second stepped surface, and the grounding hole is covered with a ground copper sheet.

[0008] According to another embodiment of the present invention, the grounding hole is an HDI GND hole.

[0009] According to another embodiment of the present invention, the grounding hole is obtained by back-drilling the GND through hole.

[0010] According to another embodiment of the present invention, the diameter of the grounding hole is 6 to 10 mil.

[0011] According to another embodiment of the present invention, the second surface is stepped, and components are disposed on the second surface.

[0012] According to another embodiment of the present invention, the distance between the grounding hole and the projection of the test point on the water surface is 100 to 200 mil.

[0013] Furthermore, there are multiple grounding holes, and the distance between the multiple grounding holes is 50 to 100 mil.

[0014] According to another embodiment of the present invention, a plurality of grounding holes are arranged around the first stepped surface.

[0015] According to another embodiment of the present invention, a grounding layer is provided on the second surface, and the grounding hole connects the second stepped surface and the grounding layer.

[0016] Secondly, this utility model also provides an electronic device, including a circuit board as described in any of the first aspects.

[0017] The advantages of this utility model compared with the prior art are:

[0018] The circuit board disclosed in this utility model includes an interposer layer. The interposer layer is designed with a stepped first surface and / or a second surface. Test points are provided on the first surface, and grounding holes are made on the second surface near the test points where ground copper is covered, thereby shortening the ground return path of the test points and improving the signal test bandwidth of the interposer layer. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 A schematic diagram of the existing intermediate layer structure of the stepped slab;

[0021] Figure 2 A schematic diagram of the existing intermediate layer test structure for a stepped slab;

[0022] Figure 3 The diagram shows the bandwidth test results for the existing stepped plate interlayer.

[0023] Figure 4 A schematic diagram of the circuit board structure provided for an embodiment of this utility model;

[0024] Figure 5 A cross-sectional view of the circuit board structure provided in an embodiment of this utility model;

[0025] Figure 6 The diagram shows the circuit board bandwidth test results provided in this embodiment of the utility model.

[0026] The labels for the attached figures are as follows:

[0027] 1. Intermediate layer; 2. First surface; 21. First step surface; 211. Component; 212. Test point; 22. Second step surface;

[0028] 3. Second surface; 31. Grounding layer;

[0029] 4. Grounding hole. Detailed Implementation

[0030] The following description provides specific application scenarios and requirements for this specification, intended to enable those skilled in the art to make and use the contents of this specification. Various partial modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this specification. Therefore, this specification is not limited to the embodiments shown, but rather to the widest scope consistent with the claims.

[0031] It should be understood that in this utility model, "electrical connection" can be understood as physical contact and electrical conduction between components; it can also be understood as a form of connection between different components in a circuit structure through physical lines that can transmit electrical signals, such as copper foil or wires on a printed circuit board (PCB). "Communication connection" can refer to the transmission of electrical signals, including wireless communication connections and wired communication connections. Wireless communication connections do not require a physical medium and are not a connection relationship that limits the product structure. "Connection" and "connected" can both refer to a mechanical or physical connection relationship, that is, A and B being connected or connected can mean that there are fastening components (such as screws, bolts, rivets, etc.) between A and B, or A and B being in contact with each other and difficult to separate.

[0032] Interposers are commonly used in distributed systems to facilitate information exchange between nodes at higher or lower levels.

[0033] Because of the high particle spacing density on storage circuit boards, the interposer layer is prone to interference with the devices. Therefore, the interposer layer needs to be designed with a stepped plate structure, such as... Figure 1 and Figure 2 As shown, Figure 1 This is a schematic diagram of the existing intermediate layer 1 structure of the stepped slab. Figure 2 This is a schematic diagram of the test structure for the existing stepped slab intermediate layer 1. However, as... Figure 3 The figure shown is a bandwidth test result diagram of the existing step plate intermediary layer 1. It can be seen that the existing step plate intermediary layer 1 has a low test bandwidth and cannot meet the user's requirements.

[0034] The inventors discovered through analysis that, for example Figure 2 As shown, the signal test point 212 on interposer layer 1 lacks a complete return path in the vicinity, resulting in an excessively long signal return path and reduced bandwidth during testing of interposer layer 1. The second step surface 22 is located outside the first step surface 21; the signal return path only reaches the ground terminal through a capacitor ground pin connected to the ground surface via a via, resulting in an excessively long signal return path. See [link / reference] Figure 3 In this case, the intermediate layer 1 has a narrow test bandwidth and begins to resonate around 3.5 GHz.

[0035] On the one hand, combined with Figures 3-6 As shown, this utility model provides a circuit board, including an interposer layer 1. The interposer layer 1 includes a first surface 2 and a second surface 3 along the thickness direction. The first surface 2 is stepped. The first surface 2 includes a first stepped surface 21 and a second stepped surface 22. Components 211 and test points 212 for testing components 211 are provided on the first stepped surface 21. A grounding hole 4 is provided on the second stepped surface 22, and the grounding hole 4 is covered with a ground copper sheet.

[0036] The thickness direction of interposer layer 1 is the stacking direction of the entire circuit board.

[0037] The circuit board provided by this utility model connects the first stepped surface 21 to the grounding terminal by setting a grounding hole 4 at the position where the ground copper foil covers the second stepped surface 22, thereby reducing the signal return path and improving the test bandwidth of the interposer layer 1. See also Figure 5 With the addition of grounding hole 4, the test bandwidth of the intermediate layer 1 provided by this utility model is significantly increased to at least 10GHz.

[0038] It should be noted that the above-mentioned stepped shape can have multiple forms. For example, the first surface 2 can be stepped, or the second surface 3 can be stepped, or both the first surface 2 and the second surface 3 can be stepped.

[0039] For example, the number of first surfaces 2 and / or second surfaces 3 formed by the step-shaped first surface 2 and / or second surface 3 is related to the number of steps in the step shape. A first-step step shape can form two step surfaces, a second-step step shape can form three step surfaces, and so on. The step heights of the multiple step surfaces can be the same or different.

[0040] The stepped first step surface 21 and / or the second step surface 22 can be formed by CNC machine tool machining or by using PCB (Printed Circuit Board) opening technology.

[0041] In some implementations, the component 211 includes, but is not limited to, functional chips, electrical connectors, etc., wherein the functional chip is, for example, an FPGA (Field Programmable Gate Array), CPU, GPU, HBM (High Bandwidth Memory), memory, digital-to-analog converter, or radio frequency chip.

[0042] Preferably, in order to shorten the signal transmission distance, reduce signal transmission delay and attenuation, and improve signal integrity and transmission quality, grounding hole 4 is an HDI GND hole.

[0043] Preferably, in order to enhance the anti-interference capability of the circuit board and reduce the copper foil on the hole wall, the grounding hole 4 is obtained by back-drilling the GND through hole.

[0044] Furthermore, the diameter of the grounding hole 4 is 6 to 10 mil. The minimum diameter of a conventional via in a circuit board is usually required to be no less than 6 mil. Preferably, the diameter of the grounding hole 4 in this embodiment is 8 mil, which can increase the electrical performance of the circuit board while ensuring the difficulty and cost of perforation.

[0045] To ensure the integrity of signal transmission, the distance between the projections of the grounding hole 4 and the test point 212 on the horizontal plane is set to 100-200 mil. This avoids situations where the distance between the grounding hole 4 and the test point 212 is too close, making it difficult to accurately connect the test probe, or too far, increasing signal transmission loss and interference, thus affecting the test results. Preferably, the distance between the projections of the grounding hole 4 and the test point 212 on the horizontal plane is set to 100 mil.

[0046] By making the interposer layer 1 into a stepped structure, the stacking area of ​​the interposer layer 1 can be fully utilized, thereby improving the stacking utilization rate of the interposer layer 1. It can be understood that the first surface 2 in the interposer layer 1 is stepped, and the second surface 3 can also be made into a stepped shape (not shown in the figure). Components 211 are set on the second surface 3, so that the components 211 are stacked with the interposer layer 1 at different height positions, while avoiding interference and conflict problems that may occur when they are arranged on the same plane.

[0047] To optimize signal transmission and facilitate heat dissipation, such as Figure 5 As shown, multiple grounding holes 4 are provided. To reduce manufacturing costs and avoid parasitic capacitance and inductance effects, the spacing between the multiple grounding holes 4 is 50-100 mil. Preferably, in this embodiment, the spacing between the multiple grounding holes 4 is 100 mil, providing a low-impedance path for signal return.

[0048] Furthermore, in order to increase the electromagnetic compatibility and improve the safety of the circuit board, multiple grounding holes 4 are arranged around the first step surface 21, and the multiple grounding holes 4 are as close as possible to the signal test point 212 to shorten the return current path.

[0049] In addition, such as Figure 5As shown, a grounding layer 31 is provided on the second surface 3, and an inner ground copper layer is laid on the grounding layer 31. The grounding hole 4 connects the second step surface 22 and the inner ground copper layer of the grounding layer 31, thereby shortening the ground return path and improving the signal test bandwidth. In another embodiment, the second surface 3 can also be grounded by capacitor or floating ground to shorten the ground return signal.

[0050] Secondly, this utility model also discloses an electronic device that, by using the circuit board described in the above embodiments, can reduce the signal return path and increase the test bandwidth of the intermediary layer 1.

[0051] Example

[0052] like Figure 4 As shown, an HDI GND hole is drilled on the outer ground copper layer at the step where test point 212 is located to connect the outer ground copper layer with the inner ground copper layer, thereby improving the return current, shortening the ground return path, and thus increasing the signal test bandwidth. Figure 6 As shown, the bandwidth of the signal SI test of the stepped plate after the HDI GND hole was fabricated increased significantly (to at least 10 GHz or more).

[0053] In this invention, the electronic device can be referred to as a user device or terminal, etc. For example, the electronic device can be a tablet computer, personal digital processing device, handheld device with wireless communication function, computing device, vehicle-mounted device, wearable device, virtual reality terminal device, augmented reality terminal device, wireless terminal in industrial control, wireless terminal in autonomous driving, wireless terminal in telemedicine, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, wireless terminal in smart home, etc., mobile or fixed terminal. The form of the terminal device is not specifically limited in the embodiments of this invention.

[0054] It should be noted that in this article, "at least one" and "several" refer to one or more, while "multiple" and "at least two" refer to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0055] In the description of this specification, the references to the terms "certain embodiments", "one embodiment", "some embodiments", "illustrative embodiment", "example", "specific example", or "some examples" refer to specific features, structures, materials, or characteristics described in connection with the embodiments or examples that are included in at least one embodiment or example of the present invention.

[0056] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this utility model, and these modifications or substitutions should all be covered within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the scope of the claims.

Claims

1. A circuit board, characterized in that, The intermediate layer includes a first surface and a second surface along the thickness direction, wherein the first surface is stepped. The first surface includes a first stepped surface and a second stepped surface. Components and test points for testing the components are provided on the first stepped surface. A grounding hole is provided on the second stepped surface, and the grounding hole is covered with a ground copper sheet.

2. The circuit board according to claim 1, characterized in that, The grounding hole is an HDI GND hole.

3. The circuit board according to claim 1, characterized in that, The grounding hole is obtained by back-drilling the GND through hole.

4. The circuit board according to claim 1, characterized in that, The diameter of the grounding hole is 6 to 10 mil.

5. The circuit board according to claim 1, characterized in that, The distance between the grounding hole and the projection of the test point on the horizontal plane is 100 to 200 mil.

6. The circuit board according to claim 1, characterized in that, The second surface is stepped, and components are disposed on the second surface.

7. The circuit board according to any one of claims 1 to 6, characterized in that, There are multiple grounding holes, and the distance between the multiple grounding holes is 50 to 100 mil.

8. The circuit board according to claim 7, characterized in that, Multiple grounding holes are arranged around the first step surface.

9. The circuit board according to claim 1, characterized in that, A grounding layer is provided on the second surface, and the grounding hole connects the second stepped surface and the grounding layer.

10. An electronic device, characterized in that, Includes the circuit board as described in any one of claims 1 to 9.