Shutdown abnormity protection circuit and vehicle
By adding a voltage divider circuit and a detection circuit to the vehicle, a high-level signal is generated and output to prevent the vehicle from restarting. This solves the shutdown problem caused by the main control chip malfunction, realizes normal shutdown and fault detection, and reduces costs and safety risks.
Patent Information
- Application Number
- CN202423258902.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-12-16
- Estimated Expiration
- 2034-12-27
AI Technical Summary
When the vehicle is turned off, the main control chip malfunctions and fails to output a shutdown signal, causing the vehicle to fail to shut down properly and resulting in a restart problem.
A voltage divider circuit and a detection circuit are added. The voltage divider circuit generates and outputs a third signal to the detection circuit, which causes the detection circuit to output a high-level signal for a certain period of time to prevent the vehicle from restarting. The vehicle will be restarted after the fault is detected.
The problem of abnormal vehicle shutdown was solved, the cost of the vehicle was reduced, the static current was reduced, the safety risks were reduced, and a normal shutdown process was achieved.
Smart Images
Figure CN223681051U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to vehicle technical field especially relates to a kind of shutdown abnormal protection circuit and vehicle. BACKGROUND
[0002] The rapid development of automobile also brings great challenge to the reliability and cost of automobile.In recent years, when vehicle is shutting down, mainly by turning the key counterclockwise to "OFF" gear to output shutdown signal to the main control chip, the main control chip receives the signal, and outputs the shutdown signal to control other modules of the vehicle to complete shutdown.
[0003] But in the abnormal process of main control chip, the main control chip cannot output shutdown signal, so that the vehicle is always in the open state. SUMMARY
[0004] The embodiment of the utility model provides a kind of shutdown abnormal protection circuit and vehicle, can solve the problem of vehicle exception.
[0005] First, the utility model provides a kind of shutdown abnormal protection circuit, the shutdown abnormal protection circuit includes: voltage division circuit and detection circuit;Voltage division circuit is configured to receive first signal and second signal, and according to first signal and second signal, generates and outputs third signal, and the level of third signal is first level;The input end of detection circuit is configured to receive third signal, and detection circuit is configured according to third signal, outputs fourth signal, and makes the first level of fourth signal maintain first set time length.
[0006] Based on the above scheme, some embodiments of the application provide a kind of shutdown abnormal protection circuit, which solves the problem of shutdown exception by adding voltage division circuit and detection circuit.Through voltage division circuit, when the input second signal is high level, third signal can be output to detection circuit, and the output fourth signal of detection circuit is all high level within a certain period, so that the problem of restart does not occur, and the fault problem of vehicle is detected, and after the problem is solved, i.e.after first set time length, restart.
[0007] As a possible implementation manner, voltage division circuit includes: switch subcircuit and voltage division subcircuit;The control end of switch subcircuit is configured to receive first signal;The first end of switch subcircuit is electrically connected with the second end of voltage division subcircuit, and the second end of switch subcircuit is electrically connected with ground terminal;The first end of voltage division subcircuit is configured to receive second signal;The third end of voltage division subcircuit is electrically connected with the input end of detection circuit, and the third end of voltage division subcircuit is configured to generate and output third signal.
[0008] As a possible implementation manner, the switch sub-circuit comprises: a transistor; a control terminal of the transistor is a control terminal of the switch sub-circuit, a first terminal of the transistor is a first terminal of the switch sub-circuit, and a second terminal of the transistor is a second terminal of the switch sub-circuit; the control terminal of the transistor is configured to receive the first signal, and is turned off when the level of the first signal is the first level and is turned on when the level of the first signal is the second level.
[0009] As a possible implementation manner, the voltage division sub-circuit comprises: a first resistor and a second resistor; a first terminal of the first resistor is electrically connected with a second terminal of the second resistor, the first terminal of the first resistor is a third terminal of the voltage division sub-circuit, and a second terminal of the first resistor is a second terminal of the voltage division sub-circuit; and a first terminal of the second resistor is a first terminal of the voltage division sub-circuit.
[0010] As a possible implementation manner, the detection circuit comprises: a voltage threshold detection module and an inverter; an input terminal of the voltage threshold detection module is an input terminal of the detection circuit, and an output terminal of the voltage threshold detection module is electrically connected with an input terminal of the inverter; an output terminal of the inverter is an output terminal of the detection circuit; the voltage threshold detection module is configured to output a delay signal when the level of the third signal is greater than the threshold voltage, and to keep the first level of the delay signal for a first set time length; and the inverter is configured to convert the delay signal into the fourth signal.
[0011] As a possible implementation manner, the shutdown abnormality protection circuit further comprises: a level detection module, a restart module and a master control chip; an output terminal of the level detection module is electrically connected with the voltage division circuit; the output terminal of the level detection module is configured to provide the first signal; an input terminal of the restart module is electrically connected with an output terminal of the detection circuit and an input terminal of the master control chip; the restart module is configured to receive the fourth signal and work when the fourth signal is the second level; and an output terminal of the master control chip is electrically connected with the voltage division circuit, and the master control chip is configured to provide the second signal.
[0012] In a second aspect, the present application further provides a vehicle comprising the above-mentioned shutdown abnormality protection circuit.
[0013] The beneficial effects of the second aspect are refer to the beneficial effects of the first aspect, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS
[0014] Figure 1 FIG. 1 is a schematic view of a prior art shutdown abnormality protection circuit;
[0015] Figure 2 FIG. 2 is a timing diagram of the prior art shutdown abnormality protection circuit;
[0016] Figure 3 FIG. 3 is a schematic view of a shutdown abnormality protection circuit provided by the present application;
[0017] Figure 4 A timing diagram of the abnormal power-off protection circuit provided by the utility model;
[0018] Figure 5 A timing diagram of the abnormal power-off protection circuit provided by the utility model;
[0019] Figure 6 A schematic diagram of a vehicle provided by the utility model.
[0020] Reference signs
[0021] 1, voltage dividing circuit; 2, detection circuit; 11, switch sub-circuit; 12, voltage dividing sub-circuit; 13, voltage threshold detection module; 3, level detection module; 4, restart module; 5, main control chip; 100, abnormal power-off protection circuit; 200, vehicle; Q, transistor; INV, inverter; R1, first resistor; R2, second resistor. DETAILED DESCRIPTION
[0022] The technical solutions in the embodiments of the utility model will be apparently and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all the other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the utility model.
[0023] The terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the utility model, unless otherwise specified, the meaning of "a plurality of" is two or more.
[0024] In the description of the utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "mounting", "connection" and "connection" should be understood in a broad sense, for example, it can be fixed connection, or detachable connection, or integrally connected; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through intermediate medium, or the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances. In addition, when describing pipelines or channels, "connection" and "connection" used in the application have the meaning of conducting. The specific meaning needs to be understood in combination with the context.
[0025] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.
[0026] The rapid development of automobiles has also brought significant challenges to their reliability and cost. In recent years, when a vehicle is turned off, it primarily sends a shutdown signal to the main control chip by turning the key counterclockwise to the "OFF" position. The main control chip receives the signal and outputs a shutdown signal to control other modules of the vehicle to complete the shutdown process.
[0027] However, when the main control chip is malfunctioning, it cannot output a shutdown signal, thus keeping the vehicle in the on state.
[0028] For details, please refer to Figure 1 The output of the level detection module is electrically connected to the main control chip, the output of the restart module is also electrically connected to the main control chip, and the output of the main control chip is electrically connected to other circuit modules (not shown in the figure).
[0029] The level detection module outputs a detection signal ACC-DET to the main control chip. The detection signal ACC-DET refers to the signal indicating whether the car is started or stopped. If the car is started, the detection signal ACC-DET is high; if the car is stopped, the detection signal ACC-DET is low. At the same time, the level detection module also transmits the detection signal ACC-DET to the main control chip. The main control chip controls other circuits to start or stop. The main control chip outputs a power-off signal SoC-Power upon receiving the detection signal ACC-DET.
[0030] For details, please refer to Figure 2 In the timing diagram, when the detection signal ACC-DET is low, the shutdown signal SoC-Power output by the main control chip is low, and the restart signal RESET output by the restart module is also high. At this time, the vehicle will not restart. The vehicle will only restart when the restart signal RESET is low. However, when the main control chip malfunctions, the shutdown signal SoC-Power output by the main control chip is high. This will cause the restart signal RESET output by the restart module to be low, thus causing the vehicle to keep restarting and making it impossible to detect vehicle faults.
[0031] Based on this, some embodiments of this application provide a shutdown abnormality protection circuit 100, such as... Figure 3 As shown, the shutdown abnormality protection circuit 100 includes: a voltage divider circuit 1 and a detection circuit 2.
[0032] The voltage dividing circuit 1 is configured to receive the first signal ACC-DET and the second signal SOC-Power, and generate and output a third signal SOC-Power-DIVDER according to the first signal ACC-DET and the second signal SOC-Power, the third signal SOC-Power-DIVDER being at a first level; the input end of the detection circuit 2 is configured to receive the third signal SOC-Power-DIVDER, and the detection circuit 2 is configured to output a fourth signal RESET according to the third signal SOC-Power-DIVDER, and maintain the fourth signal RESET at the first level for a first set time length.
[0033] With reference to Figure 3 and Figure 5 , when the master control chip 5 is abnormal, the first level is high; the voltage dividing circuit 1 receives the first signal ACC-DET and the second signal SOC-Power, the first signal ACC-DET is converted from high to low, and the second signal SOC-Power remains high, so the level of the third signal SOC-Power-DIVDER is converted from low to high.
[0034] When the detection circuit 2 detects that the level of the third signal SOC-Power-DIVDER is converted from low to high, the fourth signal RESET is output, and the level of the fourth signal RESET remains low and is maintained for a first set time length, so that the problem of restarting does not occur, which is convenient for detecting the fault problem of the vehicle 200, and after the problem is solved, i.e., after the first set time length, the vehicle 200 is restarted.
[0035] In some embodiments, the first set time length is 257s (with reference to Figure 5 ).
[0036] Based on the above scheme, some embodiments of the present application provide a shutdown abnormality protection circuit 100, which solves the problem of shutdown abnormality by adding a voltage dividing circuit 1 and a detection circuit 2. Through the voltage dividing circuit 1, when the input second signal SOC-Power is high, the third signal SOC-Power-DIVDER can be output to the detection circuit 2, and the fourth signal RESET output by the detection circuit 2 is high for a certain time period, so that the problem of restarting does not occur, which is convenient for detecting the fault problem of the vehicle 200, and after the problem is solved, i.e., after the first set time length, the vehicle 200 is restarted.
[0037] As shown in Figure 4 , the voltage dividing circuit 1 includes a switching sub-circuit 11 and a voltage dividing sub-circuit 12.
[0038] The control end of the switch sub-circuit 11 is configured to receive a first signal ACC-DET; the first end of the switch sub-circuit 11 is electrically connected with the second end of the voltage division sub-circuit 12, and the second end of the switch sub-circuit 11 is electrically connected with the ground end.
[0039] The first end of the voltage division sub-circuit 12 is configured to receive a second signal SOC-Power; the third end of the voltage division sub-circuit 12 is electrically connected with the input end of the detection circuit 2, and the third end of the voltage division sub-circuit 12 is configured to generate and output a third signal SOC-Power-DIVDER.
[0040] The switch sub-circuit 11 is turned on and then turned off when the first signal ACC-DET received by the switch sub-circuit 11 is converted from high level to low level, so that the voltage output by the third end of the voltage division sub-circuit 12 is converted from low level to high level, and the detection circuit 2 can be detected, so that the fourth signal RESET output by the detection circuit 2 is high level in a certain period of time.
[0041] As shown in Figure 4 The switch sub-circuit 11 includes a transistor Q.
[0042] The control end of the transistor Q is the control end of the switch sub-circuit 11, the first end of the transistor Q is the first end of the switch sub-circuit 11, and the second end of the transistor Q is the second end of the switch sub-circuit 11; the control end of the transistor Q is configured to receive the first signal ACC-DET, and the transistor Q is turned off when the level of the first signal ACC-DET is the first level and turned on when the level of the first signal ACC-DET is the second level.
[0043] In some embodiments, the transistor Q is an NMOS tube, and the control end of the transistor Q is the gate of the NMOS tube, and the source and drain of the NMOS tube are turned on when the gate of the NMOS tube receives a high level.
[0044] As shown in Figure 4 The voltage division sub-circuit 12 includes a first resistor R1 and a second resistor R2.
[0045] The first end of the first resistor R1 is electrically connected with the second end of the second resistor R2, the first end of the first resistor R1 is the third end of the voltage division sub-circuit 12, the second end of the first resistor R1 is the second end of the voltage division sub-circuit 12; and the first end of the second resistor R2 is the first end of the voltage division sub-circuit 12.
[0046] The level of the third signal SOC-Power-DIVDER is the voltage across the first resistor R1. When the transistor Q is turned on, the voltage across the first resistor R1 is the voltage divided by the first resistor R1 and the second resistor R2. When the transistor Q is turned off, the voltage across the first resistor R1 is the voltage of the second signal SOC-Power. Therefore, the level of the third signal SOC-Power-DIVDER is converted from low to high.
[0047] As shown in Figure 4 , the detection circuit 2 comprises a voltage threshold detection module 13 and an inverter INV.
[0048] The input end of the voltage threshold detection module 13 is the input end of the detection circuit 2, and the output end of the voltage threshold detection module 13 is electrically connected with the input end of the inverter INV. The output end of the inverter INV is the output end of the detection circuit 2.
[0049] The voltage threshold detection module 13 is configured to output a delay signal Power-ERROR-DET when the level of the third signal SOC-Power-DIVDER is greater than the threshold voltage, and to keep the first level of the delay signal Power-ERROR-DET for a first set time length.
[0050] The inverter INV is configured to convert the delay signal Power-ERROR-DET into a fourth signal RESET.
[0051] In some embodiments, the threshold voltage is 2.8V, and the SOC-Power is 3.3V. After voltage division, the third signal SOC-Power-DIVDER is lower than 2.8V. If the transistor is not turned on, the voltage of the third signal SOC-Power-DIVDER is 3.3V, which is higher than 2.8V. At this time, the voltage threshold detection module 13 outputs the delay signal Power-ERROR-DET and keeps it for a first set time length.
[0052] As shown in Figure 4 , the shutdown abnormality protection circuit 100 further comprises a level detection module 3, a restart module 4 and a master control chip 5.
[0053] The output end of the level detection module 3 is electrically connected with the voltage division circuit 1. The output end of the level detection module 3 is configured to provide a first signal ACC-DET.
[0054] The input end of the restart module 4 is electrically connected with the output end of the detection circuit 2, and is also electrically connected with the input end of the master control chip 5. The restart module 4 is configured to receive the fourth signal RESET, and works when the fourth signal RESET is at the second level.
[0055] The output of the main control chip 5 is electrically connected to the voltage divider circuit 1, and the main control chip 5 is configured to provide the second signal SOC-Power.
[0056] In some embodiments, the second level is a low level.
[0057] like Figure 6 As shown, this application also provides a vehicle 200 including the aforementioned shutdown abnormality protection circuit 100.
[0058] The vehicle 200 shuts down normally via a shutdown anomaly protection circuit 100, which addresses shutdown anomalies by adding a voltage divider circuit 1 and a detection circuit 2. Through the voltage divider circuit 1, when the input second signal SOC-Power is high, a third signal SOC-Power-DIVDER is output to the detection circuit 2. For a certain period, the detection circuit 2 outputs a fourth signal RESET that is high, thus preventing restarts and facilitating the detection of vehicle 200 malfunctions. After the problem is resolved, i.e., after the first set time, the vehicle restarts. Furthermore, the shutdown anomaly protection circuit 100 in this application can be implemented without a controller, further reducing vehicle costs, and its low quiescent current further reduces safety risks.
[0059] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model should be included within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the protection scope of the claims.
Claims
1. A power-off abnormality protection circuit characterized by comprising: The power-off abnormality protection circuit comprises: a voltage dividing circuit and a detection circuit; the voltage dividing circuit is configured to receive a first signal and a second signal, and generate and output a third signal according to the first signal and the second signal, the third signal being at a first level; an input end of the detection circuit is configured to receive the third signal, the detection circuit being configured to output a fourth signal according to the third signal, and the first level of the fourth signal being maintained for a first set time length.
2. The shutdown anomaly protection circuit of claim 1, wherein, the voltage dividing circuit comprises a switching sub-circuit and a voltage dividing sub-circuit; a control end of the switching sub-circuit is configured to receive the first signal; a first end of the switching sub-circuit is electrically connected with a second end of the voltage dividing sub-circuit; and a second end of the switching sub-circuit is electrically connected with a ground end; a first end of the voltage dividing sub-circuit is configured to receive the second signal; a third end of the voltage dividing sub-circuit is electrically connected with the input end of the detection circuit, and the third end of the voltage dividing sub-circuit is configured to generate and output the third signal.
3. The shutdown anomaly protection circuit of claim 2, wherein, the switching sub-circuit comprises a transistor; a control end of the transistor is the control end of the switching sub-circuit; a first end of the transistor is the first end of the switching sub-circuit; and a second end of the transistor is the second end of the switching sub-circuit; the control end of the transistor is configured to receive the first signal, and is turned off when the first signal is at the first level, and is turned on when the first signal is at a second level.
4. The shutdown anomaly protection circuit of claim 2, wherein, the voltage dividing sub-circuit comprises a first resistor and a second resistor; a first end of the first resistor is electrically connected with a second end of the second resistor; the first end of the first resistor is the third end of the voltage dividing sub-circuit; a second end of the first resistor is the second end of the voltage dividing sub-circuit; and a first end of the second resistor is the first end of the voltage dividing sub-circuit.
5. The shutdown anomaly protection circuit of claim 1, wherein, the detection circuit comprises a voltage threshold detection module and an inverter; an input end of the voltage threshold detection module is the input end of the detection circuit; an output end of the voltage threshold detection module is electrically connected with an input end of the inverter; and an output end of the inverter is the output end of the detection circuit; the voltage threshold detection module is configured to output a delay signal when the level of the third signal is greater than a threshold voltage, and the first level of the delay signal is maintained for the first set time length; the inverter is configured to convert the delay signal into the fourth signal.
6. The power-off anomaly protection circuit according to any one of claims 1 to 5, characterized by The power-off abnormality protection circuit further comprises a level detection module, a restart module and a master control chip; an output end of the level detection module is electrically connected with the voltage dividing circuit; and the output end of the level detection module is configured to provide the first signal; an input end of the restart module is electrically connected with an output end of the detection circuit, and is further electrically connected with an input end of the master control chip; the restart module is configured to receive the fourth signal, and works when the fourth signal is at the second level; an output end of the master control chip is electrically connected with the voltage dividing circuit, and the master control chip is configured to provide the second signal.
7. A vehicle characterized by comprising: The vehicle comprises the power-off abnormality protection circuit according to any one of claims 1 to 6.