Optical fiber driving unit test circuit

By using the control unit and forwarding unit of the fiber optic drive unit test circuit, the problem of time-consuming and labor-intensive testing of fiber optic drive units in the prior art is solved, enabling rapid testing without disassembling the equipment, thus saving time and labor costs.

CN223711021UActive Publication Date: 2025-12-23HUA TIANXIN INTELLIGENT IOT CO LTD
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Patent Information

Application Number
CN202520149499.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-01-22
Publication Date
2025-12-23
Estimated Expiration
2035-01-22

AI Technical Summary

Technical Problem

In existing technologies, testing of fiber optic drive units requires removing the fiber from the equipment cable tray, which results in time-consuming and labor-intensive testing.

Method used

A test circuit for an optical fiber driver unit is provided, including a control unit, a relay unit, and a power supply. The control unit and the relay unit are connected through a voltage conversion unit, enabling testing without disassembling the device.

Benefits of technology

It enables fast and convenient testing of fiber optic drive units, saving time and manpower costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses an optical fiber driving unit test circuit, comprising a control unit connected with a driving unit and used for emitting laser with different frequencies to the driving unit; the forwarding unit is used for transmitting the received laser to the optical fiber driving unit and receiving a return optical signal; the power supply is respectively connected with the control unit and the forwarding unit through the voltage conversion unit, through the scheme of the application, the equipment does not need to be disassembled, the light driving unit can be rapidly and conveniently tested, and the time and the labor cost are saved.
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Description

TECHNICAL FIELD

[0001] The utility model belongs to the technical field of optical fiber test, specifically relates to a kind of optical fiber drive unit test circuit. BACKGROUND

[0002] In order to ensure the communication speed between the control unit and the drive unit matched with the power module in the high-voltage frequency converter equipment, optical fiber communication is usually used, and a wire slot is arranged in the equipment to place the optical fibers. However, the optical fiber drive unit needs to be tested regularly due to the working environment or other reasons to ensure the normal operation of the drive unit. In the prior art, the optical fiber needs to be taken out of the wire slot before testing the drive unit, and the equipment needs to be disassembled to take out the optical fiber, which is time-consuming and labor-intensive.

[0003] Therefore, how to quickly and conveniently test the optical fiber drive unit is a technical problem to be solved by those skilled in the art. UTILITY MODEL CONTENTS

[0004] The utility model aims at solving the technical problem of time-consuming and labor-intensive in testing the optical fiber drive unit in the prior art. Therefore, the utility model provides an optical fiber drive unit test circuit, which comprises:

[0005] A control unit is connected to the drive unit and used to emit laser beams with different frequencies to the drive unit.

[0006] A forwarding unit is used to emit the received laser beams to the optical fiber drive unit and receive the returned optical signals.

[0007] A power supply is connected to the control unit and the forwarding unit through a voltage conversion unit.

[0008] Further, the control unit specifically comprises:

[0009] Pin 8 of chip D2 is connected to the other end of resistor R9 and one end of button S1, pin 7 of chip D2 is connected to the other end of resistor R10 and one end of button S2, pin 6 of chip D2 is connected to the other end of resistor R11 and one end of button S3, the other end of button S1, the other end of button S2 and the other end of button S3 are grounded, one end of resistor R9, one end of resistor R10 and one end of resistor R11 are connected to VCC power supply, pin 6 of chip D2 is also connected to pin 1 of download interface X2, pin 5 of chip D2 is connected to pin 2 of download interface X2, pin 3 of download interface X2 is grounded, pin 5, pin 3 and pin 1 of chip D2 are connected to the forwarding unit, pin 2 and pin 4 of the chip are grounded.

[0010] Further, the forwarding unit specifically comprises:

[0011] The pin 1, pin 19, pin 10, pin 11 and pin 13 of the chip D1 are grounded, the pin 2 and pin 4 of the chip D1 are connected with the pin 1 of the chip D2, the pin 6 and pin 8 of the chip D1 are connected with the pin 3 of the chip D2, the pin 15 and pin 17 of the chip D1 are connected with the pin 5 of the chip D2, the pin 16 of the chip D1 is grounded through the resistor R8 and the light emitting diode V1 in sequence, the pin 12 of the chip D1 is grounded through the resistor R13 and the light emitting diode V2 in sequence, the pin 3 of the chip D1 is grounded through the resistor R14 and the light emitting diode V3 in sequence, the pin 18 of the chip D1 is connected with the transmitter VT1 in the fiber driving unit through the resistor R4, the pin 14 of the chip D1 is connected with the transmitter VT2 in the fiber driving unit through the resistor R12, and the pin 5 of the chip D1 is connected with the transmitter VT3 in the fiber driving unit through the resistor R16.

[0012] Further, the transmitter VT1, the transmitter VT2 and the transmitter VT3 have the same structure, and the transmitter VT1 specifically comprises:

[0013] The pin 1 of the transmitter VT1 is connected with the VCC power supply through the resistor R1, the pin 2 of the transmitter VT1 is connected with the collector of the triode Q1, the pin 5 and pin 8 of the transmitter VT1 are grounded, the base of the triode Q1 is connected with the resistor R4, the emitter of the triode Q1 is grounded, and the internal pin 1 and pin 2 of the transmitter VT1 are connected with the light emitting diode.

[0014] Further, the power supply specifically comprises:

[0015] The pin 1 of the interface X1 is connected with the pin 2 of the toggle switch S4, the pin 2 of the interface X1 is grounded, the pin 3 of the toggle switch S4 is connected with the external 9V power supply, and the pin 4 and pin 5 of the toggle switch S4 are grounded.

[0016] Further, the voltage conversion unit specifically comprises:

[0017] Pin 5 of converter chip N1 is connected to the 9V power supply, one end of capacitor C2, and one end of resistor R3, respectively. The other end of capacitor C2 is grounded. The other end of resistor R3 is connected to pin 4 of converter chip N1. Pin 2 of converter chip N1 is grounded. Pin 1 of converter chip N1 is connected to one end of capacitor C1. Pin 6 of converter chip N1 is connected to the other end of capacitor C1 and one end of inductor L1, respectively. The other end of inductor L1 outputs VCC power supply. The other end of inductor L1 is also connected to one end of resistor R2. The other end of resistor R2 is grounded through LED V4. Pin 3 of converter chip N1 is connected to one end of resistor R6 and one end of resistor R5, respectively. The other end of resistor R5 is connected to one end of capacitor C3 and one end of resistor R2, respectively. The other ends of resistor R6 and capacitor C3 are both grounded.

[0018] Compared with the prior art, the beneficial effects of this utility model are:

[0019] This utility model provides a test circuit for an optical fiber driving unit. Compared with the prior art, this circuit includes a control unit connected to the driving unit for emitting lasers of different frequencies to the driving unit; a relay unit for transmitting the received lasers to the optical fiber driving unit and receiving the returned optical signals; and a power supply connected to the control unit and the relay unit respectively through a voltage conversion unit. With this solution, the optical fiber driving unit can be tested quickly and conveniently without disassembling the equipment, saving time and labor costs. Attached Figure Description

[0020] To more clearly illustrate the embodiments of this specification, the accompanying drawings used in the embodiments will be briefly introduced below. The drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 The diagram shown is a schematic representation of the overall structure of the fiber optic drive unit test circuit provided in the embodiments of this specification.

[0022] Figure 2 The diagram shown is a structural schematic of the control unit provided in an embodiment of this specification;

[0023] Figure 3 The diagram shown is a structural schematic of the forwarding unit provided in the embodiment of this specification;

[0024] Figure 4 The diagram shown is a structural schematic of the power supply provided in an embodiment of this specification;

[0025] Figure 5The diagram shown is a structural schematic of the voltage conversion unit provided in the embodiment of this specification;

[0026] Figure 6 The diagram shown is a structural schematic of the transmitter VT1 provided in the embodiment of this specification. Detailed Implementation

[0027] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this specification, and not all embodiments. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this specification.

[0028] like Figure 1 The diagram shown illustrates the overall structure of the fiber optic drive unit test circuit provided in this embodiment. While this specification provides the structures shown in the embodiments or accompanying drawings, based on conventional methods or without creative effort, the structures may include more or fewer components after merging. These structures are not limited to those shown in the embodiments or accompanying drawings. In practical applications of devices or terminal products, the structures described can be executed sequentially or in parallel according to the embodiments or module structures.

[0029] The fiber optic drive unit test circuit provided in the embodiments of this specification includes:

[0030] The control unit, connected to the drive unit, is used to emit lasers of different frequencies to the drive unit;

[0031] The relay unit is used to transmit the received laser light to the fiber optic drive unit and receive the returned optical signal.

[0032] The power supply is connected to the control unit and the forwarding unit respectively through a voltage conversion unit.

[0033] Specifically, the power supply can use a rechargeable 9V lithium battery to power the entire circuit. The voltage conversion unit uses a DC / DC power chip to convert the 9V voltage to 5V to power the control unit and the forwarding unit. The control unit uses 6 I / O pins, with 3 I / O pins used to implement button functions and the other 3 I / O pins to implement PWM (Pulse Width Modulation) output functions. According to the definition of the 3 buttons, they correspond to the control of 3 PWM pins of the microcontroller. Then, through the driver, the laser emission of the fiber optic socket is controlled, and the corresponding indicator lights are turned on and off to represent the emission and cutoff of the fiber laser. More specifically, the first button achieves PWM control by controlling the high and low levels of the microcontroller I / O pins; the second button achieves PWM control by controlling the microcontroller interrupt; and the third button achieves PWM control by controlling the microcontroller timer.

[0034] In the embodiments of this application, such as Figure 2 The diagram shown is a structural schematic of the control unit, which specifically includes:

[0035] Pin 8 of chip D2 is connected to the other end of resistor R9 and one end of button S1, respectively. Pin 7 of chip D2 is connected to the other end of resistor R10 and one end of button S2, respectively. Pin 6 of chip D2 is connected to the other end of resistor R11 and one end of button S3, respectively. The other ends of buttons S1, S2, and S3 are all grounded. One end of resistor R9, R10, and R11 is connected to the VCC power supply. Pin 6 of chip D2 is also connected to pin 1 of download interface X2. Pin 5 of chip D2 is connected to pin 2 of download interface X2. Pin 3 of download interface X2 is grounded. Pins 5, 3, and 1 of chip D2 are all connected to the forwarding unit. Pins 2 and 4 of the chip are both grounded.

[0036] Specifically, the control unit includes a microcontroller chip D2. Its pins P3.1, P3.2, and P3.3 are connected to one end of buttons S1, S2, and S3, respectively, and are also connected to resistors R9, R10, and R11, respectively. The other end of resistors R9, R10, and R11 is connected to VCC to provide pull-up voltage, and the other end of buttons S1, S2, and S3 is grounded. P3.0 and P3.1 of D2 are connected to X2, which is the microcontroller's download interface. P3.0, P3.4, and P3.5 of D2 are output I / O pins. The VCC pin of the D2 chip is grounded through capacitor C5.

[0037] In the embodiments of this application, such as Figure 3 The diagram shown illustrates the structure of a forwarding unit, which specifically includes:

[0038] Pins 1, 19, 10, 11, and 13 of chip D1 are all grounded. Pins 2 and 4 of chip D1 are connected to pin 1 of chip D2. Pins 6 and 8 of chip D1 are connected to pin 3 of chip D2. Pins 15 and 17 of chip D1 are connected to pin 5 of chip D2. Pin 16 of chip D1 is grounded through resistor R8 and LED V1. Pin 12 of chip D1 is grounded through resistor R13 and LED V2. Pin 3 of chip D1 is grounded through resistor R14 and LED V3. Pin 18 of chip D1 is connected to transmitter VT1 in the fiber optic drive unit through resistor R4. Pin 14 of chip D1 is connected to transmitter VT2 in the fiber optic drive unit through resistor R12. Pin 5 of chip D1 is connected to transmitter VT3 in the fiber optic drive unit through resistor R16.

[0039] Specifically, I / O port P3.0 of chip D2 is connected to pins 2A3 and 2A4 of the two-channel input of chip D1. Pins 2A1 and 2A2 of the two-channel input of D1 are grounded. Pin 2Y3 of the two-channel output of D1 is connected to one end of resistor R16. The other end of resistor R16 is connected to the base of transistor Q3. The emitter of transistor Q3 is grounded. The collector of transistor Q3 is connected to pin 2 of transmitter VT3. Pin 1 of transmitter VT3 is connected to one end of resistor R15. The other end of resistor R15 is connected to VC. C; In chip D1, the 2Y4 output terminal of channel 2 is connected to one end of resistor R14, and the other end of resistor R14 is connected to the positive terminal of LED V3. The negative terminal of LED V3 is grounded, used to indicate the working status of transmitter VT3; The I / O port P3.5 of chip D2 is connected to pins 1A3 and 1A4 of the 1st channel input terminal of chip D1. The 1Y3 output terminal of channel 1 in D1 is connected to one end of resistor R12, and the other end of resistor R12 is connected to the base of transistor Q2. The emitter of transistor Q2 is grounded. The collector of Q2 is connected to pin 2 of transmitter VT2. Pin 1 of transmitter VT2 is connected to one end of resistor R7, and the other end of resistor R7 is connected to VCC. IY4, the output terminal of channel 1 in D1, is connected to one end of resistor R13. The other end of resistor R13 is connected to the positive terminal of LED V2, and the negative terminal of LED V2 is grounded, used to indicate the operating status of transmitter VT2. I / O port P3.4 of chip D2 is connected to pins 1A1 and 1A2 of the input terminal of channel 1 in chip D1. The output terminal of channel 1 in D1... One of the 1Y1 terminals is connected to one end of resistor R4, and the other end of resistor R4 is connected to the base of transistor Q1. The emitter of transistor Q1 is grounded, and the collector of transistor Q1 is connected to pin 2 of transmitter VT1. Pin 1 of transmitter VT1 is connected to one end of resistor R1, and the other end of resistor R1 is connected to VCC. One of the 1Y2 terminals of the 1st channel output terminal of D1 is connected to one end of resistor R8, and the other end of resistor R8 is connected to the positive terminal of LED V1. The negative terminal of LED V1 is grounded, which is used to indicate the working status of transmitter VT1.

[0040] The transmitters VT1, VT2, and VT3 have identical structures, as follows: Figure 6 The diagram shown is a structural schematic of transmitter VT1, which specifically includes:

[0041] Pin 1 of the transmitter VT1 is connected to the VCC power supply through resistor R1. Pin 2 of the transmitter VT1 is connected to the collector of transistor Q1. Pins 5 and 8 of the transmitter VT1 are both grounded. The base of transistor Q1 is connected to resistor R4. The emitter of transistor Q1 is grounded. Pins 1 and 2 of the transmitter VT1 are connected through a light-emitting diode.

[0042] In the embodiments of this application, such as Figure 4 The diagram shown is a structural schematic of a power supply, which specifically includes:

[0043] Pin 1 of interface X1 is connected to pin 2 of toggle switch S4. Pin 2 of interface X1 is grounded. Pin 3 of toggle switch S4 is connected to an external 9V power supply. Pins 4 and 5 of toggle switch S4 are both grounded.

[0044] Specifically, the power supply section includes an X1 interface and an S4 toggle switch. One end of X1 is connected to the negative terminal of the power supply, and the other end of X1 is connected to the normally closed terminal of the S4 toggle switch. The normally open terminal of the S4 toggle switch is the internal 9V voltage input terminal, and the other interfaces of the S4 toggle switch are grounded.

[0045] In the embodiments of this application, such as Figure 5 The diagram shown is a structural schematic of a voltage conversion unit, which specifically includes:

[0046] The voltage conversion unit specifically includes:

[0047] Pin 5 of converter chip N1 is connected to the 9V power supply, one end of capacitor C2, and one end of resistor R3, respectively. The other end of capacitor C2 is grounded. The other end of resistor R3 is connected to pin 4 of converter chip N1. Pin 2 of converter chip N1 is grounded. Pin 1 of converter chip N1 is connected to one end of capacitor C1. Pin 6 of converter chip N1 is connected to the other end of capacitor C1 and one end of inductor L1, respectively. The other end of inductor L1 outputs VCC power supply. The other end of inductor L1 is also connected to one end of resistor R2. The other end of resistor R2 is grounded through LED V4. Pin 3 of converter chip N1 is connected to one end of resistor R6 and one end of resistor R5, respectively. The other end of resistor R5 is connected to one end of capacitor C3 and one end of resistor R2, respectively. The other ends of resistor R6 and capacitor C3 are both grounded.

[0048] Specifically, the voltage conversion unit includes a DC / DC converter chip N1, whose input terminal is grounded through a positive capacitor C2, and connected to the EN enable terminal of N1 through a resistor R3. A capacitor C1 is connected between the BS and SW pins of N1 to provide a floating power supply for the high-side switch drive. The SW pin of N1 is connected to one end of an L1 circuit, the other end of which is the output terminal, grounded through a positive capacitor C3. The FB pin of N1 controls the output voltage value through resistors R6 and R5. The output terminal is grounded through resistor R2 and an LED V4, serving as an indicator of the output voltage. The output voltage VCC is 5V.

[0049] It should be understood that when an element is referred to as “fixed to” or “set on” another element, it may be directly on the other element or may be interposed with an intervening element; when an element is referred to as “connected to” another element, it may be directly connected to the other element or may be interposed with an intervening element. Furthermore, the term “connected” as used herein may include wireless connections; the word “and / or” as used includes any and all combinations of one or more of the associated listed items.

[0050] It should be understood that various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0051] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0052] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0053] The storage media mentioned above can be read-only memory, disk, or optical disk, etc.

[0054] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0055] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

[0056] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the protection scope of the present invention.

Claims

1. A test circuit for an optical fiber driver unit, characterized in that, The test circuit includes: The control unit, connected to the drive unit, is used to emit lasers of different frequencies to the drive unit; The relay unit is used to transmit the received laser light to the fiber optic drive unit and receive the returned optical signal. The power supply is connected to the control unit and the forwarding unit respectively through a voltage conversion unit.

2. The fiber optic driver unit test circuit as described in claim 1, characterized in that, The control unit specifically includes: Pin 8 of chip D2 is connected to the other end of resistor R9 and one end of button S1, respectively. Pin 7 of chip D2 is connected to the other end of resistor R10 and one end of button S2, respectively. Pin 6 of chip D2 is connected to the other end of resistor R11 and one end of button S3, respectively. The other ends of buttons S1, S2, and S3 are all grounded. One end of resistor R9, R10, and R11 is connected to the VCC power supply. Pin 6 of chip D2 is also connected to pin 1 of download interface X2. Pin 5 of chip D2 is connected to pin 2 of download interface X2. Pin 3 of download interface X2 is grounded. Pins 5, 3, and 1 of chip D2 are all connected to the forwarding unit. Pins 2 and 4 of the chip are both grounded.

3. The fiber optic drive unit test circuit as described in claim 2, characterized in that, The forwarding unit specifically includes: Pins 1, 19, 10, 11, and 13 of chip D1 are all grounded. Pins 2 and 4 of chip D1 are connected to pin 1 of chip D2. Pins 6 and 8 of chip D1 are connected to pin 3 of chip D2. Pins 15 and 17 of chip D1 are connected to pin 5 of chip D2. Pin 16 of chip D1 is grounded through resistor R8 and LED V1. Pin 12 of chip D1 is grounded through resistor R13 and LED V2. Pin 3 of chip D1 is grounded through resistor R14 and LED V3. Pin 18 of chip D1 is connected to transmitter VT1 in the fiber optic drive unit through resistor R4. Pin 14 of chip D1 is connected to transmitter VT2 in the fiber optic drive unit through resistor R12. Pin 5 of chip D1 is connected to transmitter VT3 in the fiber optic drive unit through resistor R16.

4. The fiber optic driver unit test circuit as described in claim 3, characterized in that, The transmitters VT1, VT2, and VT3 have the same structure, and the transmitter VT1 specifically includes: Pin 1 of the transmitter VT1 is connected to the VCC power supply through resistor R1. Pin 2 of the transmitter VT1 is connected to the collector of transistor Q1. Pins 5 and 8 of the transmitter VT1 are both grounded. The base of transistor Q1 is connected to resistor R4. The emitter of transistor Q1 is grounded. Pins 1 and 2 of the transmitter VT1 are connected through a light-emitting diode.

5. The fiber optic driver unit test circuit as described in claim 1, characterized in that, The power source specifically includes: Pin 1 of interface X1 is connected to pin 2 of toggle switch S4. Pin 2 of interface X1 is grounded. Pin 3 of toggle switch S4 is connected to an external 9V power supply. Pins 4 and 5 of toggle switch S4 are both grounded.

6. The fiber optic driver unit test circuit as described in claim 5, characterized in that, The voltage conversion unit specifically includes: Pin 5 of converter chip N1 is connected to the 9V power supply, one end of capacitor C2, and one end of resistor R3, respectively. The other end of capacitor C2 is grounded. The other end of resistor R3 is connected to pin 4 of converter chip N1. Pin 2 of converter chip N1 is grounded. Pin 1 of converter chip N1 is connected to one end of capacitor C1. Pin 6 of converter chip N1 is connected to the other end of capacitor C1 and one end of inductor L1, respectively. The other end of inductor L1 outputs VCC power supply. The other end of inductor L1 is also connected to one end of resistor R2. The other end of resistor R2 is grounded through LED V4. Pin 3 of converter chip N1 is connected to one end of resistor R6 and one end of resistor R5, respectively. The other end of resistor R5 is connected to one end of capacitor C3 and one end of resistor R2, respectively. The other ends of resistor R6 and capacitor C3 are both grounded.