Reconfigurable discrete magnitude input and output module based on PXIe bus

Abstract

The utility model discloses a reconfigurable discrete magnitude input and output module based on a PXIe bus. The reconfigurable discrete magnitude input and output module based on the PXIe bus comprises an input network, an output network and a reconfigurable processing unit. According to the utility model, the PXIe bus interface is connected with a master control circuit in an electronic test system, so that high-speed data communication is realized; and the discrete magnitude output mode and the threshold value are adjusted through the reconfigurable processing unit, so that the flexibility is higher, and the application requirements of different test scenes are met.

Description

TECHNICAL FIELD

[0001] The utility model relates to electronic testing technical field especially, it relates to a reconfigurable discrete quantity input output module based on PXIe bus. BACKGROUND

[0002] In electronic testing system, discrete quantity input output module plays a very key role for guaranteeing the normal control and test of electron, however, the traditional discrete quantity input output module function is fixed, and the flexibility is poor, leading to the reliability of discrete quantity signal acquisition and output is low, difficult to adapt to different application scenes. UTILITY MODEL CONTENTS

[0003] The utility model discloses a reconfigurable discrete quantity input output module based on PXIe bus, and aims at solving the problems of the traditional discrete quantity input output module function fixed, flexibility poor, leading to the reliability of discrete quantity signal acquisition and output is low, difficult to adapt to different application scenes.

[0004] In order to realize the above-mentioned purpose, the utility model provides a reconfigurable discrete quantity input output module based on PXIe bus, the reconfigurable discrete quantity input output module based on PXIe bus includes:

[0005] Input network and output network;

[0006] Reconfigurable processing unit, the reconfigurable processing unit is connected with main control circuit through PXIe bus interface, the input of reconfigurable processing unit is connected with input network, the output of reconfigurable processing unit is connected with output network, and reconfigurable processing unit is used to gather discrete quantity input signal, access the control signal output of main control circuit, and according to the control signal, the parameter configuration of discrete quantity input signal is carried out, and the corresponding discrete quantity output signal is output.

[0007] In an embodiment, the reconfigurable processing unit includes:

[0008] Analog-digital converter, the analog-digital converter is used to carry out analog-digital conversion to analog input signal and output the discrete quantity input signal;

[0009] Digital-analog converter, the digital-analog converter is used to carry out digital-analog conversion to the discrete quantity output signal and output;

[0010] Processor, the input of processor is connected with analog-digital converter, and the output of processor is connected with digital-analog converter, and the processor is used to access the discrete quantity input signal, and according to the control signal, the parameter configuration of discrete quantity input signal is carried out, and the corresponding discrete quantity output signal is output to the digital-analog converter.

[0011] In an embodiment, the processor is an FPGA.

[0012] In an embodiment, the PXIe bus based reconfigurable discrete input output module further comprises:

[0013] an input signal conditioning network disposed between the input network and the analog to digital converter;

[0014] an output signal conditioning network disposed between the digital to analog converter and the output network.

[0015] In an embodiment, the PXIe bus based reconfigurable discrete input output module further comprises a power management unit connected to the reconfigurable processing unit, the power management unit configured to provide operating power to the reconfigurable processing unit.

[0016] The utility model discloses the beneficial effect lies in:

[0017] The PXIe bus based reconfigurable discrete input output module is connected with the main control circuit in the electronic test system through the PXIe bus interface, realizes high -speed data communication, and adjusts the discrete output mode and threshold through the reconfigurable processing unit, and the flexibility is higher, to satisfy the application demand of different test scene. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 It is the overall block diagram of the PXIe bus based reconfigurable discrete input output module of the utility model. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical scheme and advantage of the embodiments of the utility model clearer, the technical scheme in the embodiments of the utility model will be described clearly and completely below in combination with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all the embodiments. The components of the embodiments of the utility model described and shown in the drawings here can be arranged and designed in various different configurations.

[0020] Therefore, the following detailed description of the embodiments of the utility model provided in the drawings is not intended to limit the scope of the claimed utility model, but only represents selected embodiments of the utility model. Based on the embodiments in the utility model, all other embodiments obtained by those of ordinary skill in the art without creative labor belong to the scope of protection of the utility model.

[0021] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0022] In the description of this utility model, it should be understood that the terms "upper", "lower", "inner", "outer", "left", "right", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the utility model product is usually placed in during use, or the orientation or positional relationship that is commonly understood by those skilled in the art. They are only used to facilitate the description of this utility model and to simplify the description, and are not intended to indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0023] Furthermore, the terms "first," "second," etc., are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0024] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, terms such as "set" and "connection" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0025] In electronic testing systems, traditional discrete input / output modules have fixed functions and poor flexibility, resulting in low reliability of discrete signal acquisition and output, making it difficult to adapt to different application scenarios.

[0026] To address the aforementioned problems, this invention proposes a reconfigurable discrete input / output module based on the PXIe bus. The specific embodiments of this invention will be described in detail below with reference to the accompanying drawings.

[0027] like Figure 1 As shown, the reconfigurable discrete input / output module based on the PXIe bus includes:

[0028] Input network and output network;

[0029] A reconfigurable processing unit is provided, which is connected to the main control circuit via a PXIe bus interface. The input terminal of the reconfigurable processing unit is connected to the input network, and the output terminal of the reconfigurable processing unit is connected to the output network. The reconfigurable processing unit is used to acquire discrete input signals, receive control signals output by the main control circuit, configure the parameters of the discrete input signals according to the control signals, and output corresponding discrete output signals.

[0030] In one embodiment, the reconfigurable processing unit includes:

[0031] An analog-to-digital converter, wherein the analog-to-digital converter is used to convert an analog input signal into a digital signal and output the discrete input signal;

[0032] A digital-to-analog converter, wherein the digital-to-analog converter is used to convert the discrete output signal into a digital-to-analog signal and then output it;

[0033] The processor has its input terminal connected to the analog-to-digital converter and its output terminal connected to the digital-to-analog converter. The processor is used to receive the discrete input signal, configure the parameters of the discrete input signal according to the control signal, and output the corresponding discrete output signal to the digital-to-analog converter.

[0034] In one embodiment, the processor is an FPGA.

[0035] In one embodiment, the PXIe bus-based reconfigurable discrete input / output module further includes:

[0036] An input signal conditioning network is provided between the input network and the analog-to-digital converter;

[0037] An output signal conditioning network is provided, wherein the output signal processing network is located between the digital-to-analog converter and the output network.

[0038] Existing discrete input / output modules only have two states, 1 and 0, and their input / output modes and thresholds are fixed. This results in fixed functionality, poor flexibility, and difficulty in adapting to different testing scenarios. Therefore, this embodiment sets up a reconfigurable processing unit to set the input / output modes and thresholds, adjust the output voltage or current range to adapt to the driving requirements of different types of loads, and select different input / output modes to meet the application needs of different testing scenarios.

[0039] In this embodiment, the reconfigurable processing unit is connected to the main control circuit of the electronic test system via a PXIe bus interface. The PXIe bus offers advantages such as high bandwidth, high transmission rate, and good scalability, enhancing the performance and flexibility of the electronic test system. The main control circuit outputs corresponding control signals to the reconfigurable processing unit according to actual test requirements, enabling the configuration of different discrete output modes and thresholds. Essentially, the reconfigurable processing unit reconfigures the mode and threshold of the discrete input signal based on the control signals. This involves comparing the voltage value of the discrete input signal with a voltage threshold to determine the level state of the discrete input signal, and then setting the output level of the discrete output signal based on this level state.

[0040] Specifically, the reconfigurable processing unit includes an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and a processor. The processor can be implemented using an FPGA (Field Programmable Gate Array). The FPGA converts analog input signals into discrete input signals via the ADC, thereby acquiring discrete input signals. The FPGA configures the parameters of the discrete input signals according to control signals, i.e., configuring the FPGA's output mode and adjusting the output voltage or current of the discrete output signals. Then, the DAC converts the output discrete output signals back into analog output signals, which are then output through an output network to adapt to the driving requirements of different types of loads, thus meeting the application needs of different testing scenarios. The input / output modes can be configured as "power / on" and "ground / on"; the output threshold range is -5V to +40V; the input network can use 64 input channels, and the output network can use 64 output channels, realizing multi-channel input / output. The discrete output signals are amplified and driven to meet the requirements for output signal power and driving capability.

[0041] This embodiment uses an input signal conditioning network to condition the discrete input channel and an output signal conditioning network to condition the discrete output channel.

[0042] This utility model features a reconfigurable discrete input / output module based on the PXIe bus. It connects to the main control circuit of the electronic test system via the PXIe bus interface to achieve high-speed data communication. Furthermore, it adjusts the discrete output mode and threshold through a reconfigurable processing unit, providing greater flexibility to meet the application requirements of different test scenarios.

[0043] In one embodiment, the PXIe bus-based reconfigurable discrete input / output module further includes a power management unit connected to the reconfigurable processing unit, which provides operating power to the reconfigurable processing unit.

[0044] In this embodiment, a power management unit provides operating power to the reconfigurable processing unit. The power management unit can be connected to a battery or municipal power supply for power supply.

[0045] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. A reconfigurable discrete input / output module based on PXIe bus, characterized in that, The PXIe bus-based reconfigurable discrete quantity input and output module comprises: an input network and an output network; a reconfigurable processing unit connected with a host circuit through a PXIe bus interface, an input end of the reconfigurable processing unit connected with the input network, and an output end of the reconfigurable processing unit connected with the output network, the reconfigurable processing unit configured to collect a discrete quantity input signal, access a control signal output by the host circuit, and output a corresponding discrete quantity output signal after parameter configuration of the discrete quantity input signal according to the control signal.

2. The PXIe bus based reconfigurable discrete input output module according to claim 1, wherein, The reconfigurable processing unit comprises: an analog-to-digital converter configured to output the discrete quantity input signal after analog-to-digital conversion of an analog input signal; a digital-to-analog converter configured to output the discrete quantity output signal after digital-to-analog conversion of the discrete quantity output signal; a processor, an input end of the processor connected with the analog-to-digital converter, and an output end of the processor connected with the digital-to-analog converter, the processor configured to access the discrete quantity input signal, and output the corresponding discrete quantity output signal to the digital-to-analog converter after parameter configuration of the discrete quantity input signal according to the control signal.

3. The PXIe bus based reconfigurable discrete input output module according to claim 2, wherein, The processor is an FPGA.

4. The PXIe bus based reconfigurable discrete input output module according to claim 2, wherein, The PXIe bus-based reconfigurable discrete quantity input and output module further comprises: an input signal conditioning network arranged between the input network and the analog-to-digital converter; an output signal conditioning network arranged between the digital-to-analog converter and the output network.

5. The PXIe bus based reconfigurable discrete input output module according to claim 1, wherein, The PXIe bus-based reconfigurable discrete quantity input and output module further comprises a power management unit connected with the reconfigurable processing unit, the power management unit configured to provide working power for the reconfigurable processing unit.

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