Overcurrent protection circuit for high-voltage bus of inverter

Abstract

The utility model discloses an over-current protection circuit for a high-voltage bus of an inverter, and relates to the field of over-current protection circuits. According to the specific implementation scheme, the inverter comprises a voltage division circuit, an analog switch chip selection circuit and an overcurrent protection circuit, the analog switch chip selection circuit is used for adjusting inversion overcurrent reference voltage for the voltage division circuit, and the analog switch chip selection circuit comprises a first analog switch chip selection circuit and a second analog switch chip selection circuit. The first analog switch chip selection circuit and the second analog switch chip selection circuit are both electrically connected with the voltage division circuit, and the overcurrent protection circuit is electrically connected with the voltage output end of the voltage division circuit. According to the utility model, the address of the analog chip selection switch is changed, so that the analog switch chip outputs different over-current point reference voltages, and the inversion over-current point can be adjusted according to the change of the bus voltage of the inverter at high voltage after passing through the universal over-current protection circuit, thereby achieving the accurate and rapid protection of the IGBT.

Description

TECHNICAL FIELD

[0001] The utility model relates to overcurrent protection circuit technical field especially relates to a kind of inverter high voltage bus overcurrent protection circuit. BACKGROUND

[0002] In the design of inverter, bus overvoltage protection circuit and inverter overcurrent protection circuit are very important part thereof. The existing bus overvoltage protection circuit overvoltage threshold is limited by the MPPT voltage range claimed, and the protection threshold will be set relatively high, and the inverter overcurrent protection threshold is limited by the maximum output current claimed, and the protection threshold will be set relatively high for the same reason, so that the inverter IGBT will be broken down due to the easy overvoltage between collector and emitter at high voltage and large current.

[0003] Currently, the protection threshold of the hardware inverter overcurrent protection circuit is single, and the IGBT may be broken down due to overvoltage when the input bus high voltage is 1.6 times superposition. UTILITY MODEL CONTENTS

[0004] Therefore, the utility model provides an inverter high voltage bus overcurrent protection circuit to solve the problem that the existing inverter overcurrent protection circuit may cause IGBT to be broken down due to overvoltage when the input bus high voltage is 1.6 times superposition.

[0005] The utility model provides an inverter high voltage bus overcurrent protection circuit, comprising:

[0006] The voltage output end of the voltage dividing circuit is electrically connected to the overcurrent protection circuit.

[0007] The voltage dividing circuit comprises an analog switch chip, a fifth resistor, an eleventh resistor, a sixth resistor, a twelfth resistor and a third capacitor; one end of the fifth resistor is electrically connected to pin 11 of the analog switch chip, the other end of the fifth resistor is electrically connected to pin 14 of the analog switch chip, and the other end of the fifth resistor is grounded through the eleventh resistor; one end of the sixth resistor is electrically connected to pin 11 of the analog switch chip, the other end of the sixth resistor is electrically connected to pin 12 of the analog switch chip, and the other end of the sixth resistor is grounded through the twelfth resistor; pins 6, 7 and 8 of the analog switch chip are grounded.

[0008] The voltage dividing circuit further comprises a third resistor, a ninth resistor and a thirteenth resistor, one end of the ninth resistor is electrically connected with the No. 13 pin of the analog switch chip via the third resistor, the other end of the ninth resistor is grounded through the thirteenth resistor, a first inverse variable overcurrent reference voltage point is arranged between the third resistor and the ninth resistor, and a second inverse variable overcurrent reference voltage point is arranged between the ninth resistor and the thirteenth resistor.

[0009] The first analog switch chip selection circuit comprises a first operational amplifier, a second capacitor, a fourth capacitor, a fifth capacitor, a first resistor, a second resistor, a fourth resistor, a seventh resistor, an eighth resistor, a tenth resistor and a twenty-first resistor, the fourth resistor is electrically connected with the inverting input terminal of the first operational amplifier, the inverting input terminal of the first operational amplifier is further grounded through the second capacitor, the first resistor is connected in parallel with the second capacitor, the non-inverting input terminal of the first operational amplifier is electrically connected with the No. 11 pin of the analog switch chip through the eighth capacitor, the non-inverting input terminal of the first operational amplifier is grounded through the fifth capacitor, the tenth resistor is connected in parallel with the fifth capacitor, the non-inverting input terminal of the first operational amplifier is connected with the output terminal through the twenty-first resistor, the output terminal of the first operational amplifier is electrically connected with one end of the seventh resistor, the other end of the seventh resistor is electrically connected with the No. 10 pin of the analog switch chip, and the other end of the seventh resistor is further grounded through the fourth capacitor.

[0010] The first analog switch chip selection circuit further comprises a first capacitor, the No. 8 pin of the first operational amplifier is electrically connected with the No. 16 pin of the analog switch chip, the first operational amplifier is further grounded through the first capacitor, and the No. 4 pin of the first operational amplifier is grounded.

[0011] The second analog switch chip selection circuit comprises a second operational amplifier, a sixth capacitor, a seventh capacitor, an eighth capacitor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor and a twenty-second resistor, the non-inverting input end of the second operational amplifier is electrically connected with the sixteenth resistor, the non-inverting input end of the second operational amplifier is grounded through the sixth capacitor, the fourteenth resistor is connected with the sixth capacitor in parallel, the non-inverting input end of the second operational amplifier is electrically connected with the No. 11 pin of the analog switch chip through the eighteenth resistor, the non-inverting input end of the second operational amplifier is grounded through the eighth capacitor, the nineteenth resistor is connected with the eighth capacitor in parallel, the output end of the second operational amplifier is electrically connected with one end of the seventeenth resistor, the other end of the seventeenth resistor is electrically connected with the No. 9 pin of the analog switch chip, and the other end of the seventeenth resistor is also grounded through the seventh capacitor; the non-inverting input end of the second operational amplifier is connected with the output end through the twenty-second resistor, and the output end of the second operational amplifier is also electrically connected with the other end of the second resistor through the fifteenth resistor.

[0012] The overcurrent protection circuit comprises a third operational amplifier, a fourth operational amplifier, an eleventh capacitor, a thirteenth capacitor, a twenty-third resistor and a twenty-seventh resistor, the non-inverting input end of the third operational amplifier is electrically connected with the twenty-third resistor, the non-inverting input end of the third operational amplifier is also grounded through the eleventh capacitor, the non-inverting input end of the third operational amplifier is electrically connected with the first inverter overcurrent reference voltage point, the output end of the third operational amplifier is electrically connected with one end of the twenty-seventh resistor, the other end of the twenty-seventh resistor is grounded through the thirteenth capacitor, the non-inverting input end of the fourth operational amplifier is electrically connected with the second inverter overcurrent reference voltage point, the non-inverting input end of the fourth operational amplifier is electrically connected with the non-inverting input end of the third operational amplifier, and the output end of the fourth operational amplifier is electrically connected with the output end of the third operational amplifier.

[0013] The overcurrent protection circuit further comprises a ninth capacitor, a tenth capacitor and a twentieth resistor, the No. 4 pin of the third operational amplifier is grounded, the No. 8 pin of the third operational amplifier is connected with +12V voltage, the No. 8 pin of the third operational amplifier is also grounded through the ninth capacitor, the output end of the third operational amplifier is electrically connected with one end of the twentieth resistor, the other end of the twentieth resistor is connected with +3.3V voltage, and the other end of the twentieth resistor is also grounded through the fourth capacitor.

[0014] Beneficial effects: the utility model discloses a change address of analog switch chip selection, so that the analog switch chip outputs different overcurrent reference voltage, and after the general overcurrent protection circuit, the inverter overcurrent point can be adjusted according to the change of inverter bus voltage at high voltage, so as to achieve accurate and rapid protection for IGBT.

[0015] It should be appreciated that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0016] The accompanying drawings are used to better understand the present application, and do not constitute a limitation on the present application. Among them:

[0017] Figure 1 is a schematic diagram of a voltage dividing circuit according to the present application;

[0018] Figure 2 is a schematic diagram of a first analog switch chip selection circuit according to the present application;

[0019] Figure 3 is a schematic diagram of a second analog switch chip selection circuit according to the present application;

[0020] Figure 4 is a schematic diagram of an overcurrent protection circuit according to the present application. DETAILED DESCRIPTION

[0021] The exemplary embodiments of the present application are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present application to help understanding, and should be considered only as exemplary. Therefore, those skilled in the art should realize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present application. Similarly, in order to be clear and concise, the description below omits the description of known functions and structures.

[0022] The present application provides an inverter high-voltage bus overcurrent protection circuit, comprising:

[0023] The voltage dividing circuit, the analog switch chip selection circuit for adjusting the inverter overcurrent reference voltage for the voltage dividing circuit, and the overcurrent protection circuit, the analog switch chip selection circuit includes a first analog switch chip selection circuit and a second analog switch chip selection circuit, the first analog switch chip selection circuit and the second analog switch chip selection circuit are electrically connected with the voltage dividing circuit, and the overcurrent protection circuit is electrically connected with the voltage output end of the voltage dividing circuit.

[0024] As Figure 1As shown, the voltage dividing circuit comprises an analog switch chip U2, a fifth resistor R5, an eleventh resistor R11, a sixth resistor R6, a twelfth resistor R12 and a third capacitor C3; one end of the fifth resistor R5 is electrically connected with the No. 11 pin of the analog switch chip U2, the other end of the fifth resistor R5 is electrically connected with the No. 14 pin of the analog switch chip U2, and the other end of the fifth resistor R5 is grounded through the eleventh resistor R11; one end of the sixth resistor R6 is electrically connected with the No. 11 pin of the analog switch chip U2, the other end of the sixth resistor R6 is electrically connected with the No. 12 pin of the analog switch chip U2, and the other end of the sixth resistor R6 is grounded through the twelfth resistor R12; the No. 6, 7 and 8 pins of the analog switch chip U2 are grounded.

[0025] The voltage dividing circuit further comprises a third resistor R3, a ninth resistor R9 and a thirteenth resistor R13; one end of the ninth resistor R9 is electrically connected with the No. 13 pin of the analog switch chip U2 via the third resistor R3, the other end of the ninth resistor R9 is grounded through the thirteenth resistor R13, a first inverter overcurrent reference voltage point is arranged between the third resistor R3 and the ninth resistor R9, and a second inverter overcurrent reference voltage point is arranged between the ninth resistor R9 and the thirteenth resistor R13.

[0026] The model of the analog switch chip U2 is 74LV4052PW, the voltage dividing circuit realizes multiple groups of reference power input analog switches by resistance voltage division, selects the output power signal through the address of the analog switch, and obtains two groups of reference source signals Ua and Ub as the inverter overcurrent reference points through resistance voltage division of the output power signal. Therefore, different inverter overcurrent reference voltage points Ua and Ub are obtained by changing the address of the analog switch.

[0027] According to the voltage division principle,

[0028] UR11=VCC 2*R11 / (R5+R11)

[0029] UR12=VCC 2*R12 / (R6+R12)

[0030] Ua=VREF1*(R9+R13) / (R 3+R9+R13)

[0031] Ub=VREF1*R13 / (R 3+R9+R13)

[0032] Wherein, UR11 represents the voltage corresponding to the eleventh resistance R11, UR12 represents the voltage corresponding to the twelfth resistance R12, VREF1 represents the voltage of the 13th pin of the analog switch chip U2, Ua represents the voltage of the first inverter overcurrent reference voltage point, and Ub represents the voltage of the second inverter overcurrent reference voltage point.

[0033] As shown in Figure 2 The first analog switch chip selection circuit includes a first operational amplifier U1A, a second capacitor C2, a fourth capacitor C4, a fifth capacitor C5, a first resistor, a second resistor, a fourth resistor, a seventh resistor, an eighth resistor, a tenth resistor, and a twenty-first resistor R21. The fourth resistor is electrically connected to the inverting input terminal of the first operational amplifier U1A. The inverting input terminal of the first operational amplifier U1A is also grounded through the second capacitor C2. The first resistor is connected in parallel with the second capacitor C2. The non-inverting input terminal of the first operational amplifier U1A is electrically connected to the 11th pin of the analog switch chip U2 through the eighth capacitor C8. The non-inverting input terminal of the first operational amplifier U1A is grounded through the fifth capacitor C5. The tenth resistor is connected in parallel with the fifth capacitor C5. The non-inverting input terminal of the first operational amplifier U1A is connected with the output terminal through the twenty-first resistor R21. The output terminal of the first operational amplifier U1A is electrically connected to one end of the seventh resistor. The other end of the seventh resistor is electrically connected to the 10th pin of the analog switch chip U2. The other end of the seventh resistor is also grounded through the fourth capacitor C4. The output terminal of the first operational amplifier U1A is also electrically connected to one end of the second resistor.

[0034] The first analog switch chip selection circuit further includes a first capacitor C1. The 8th pin of the first operational amplifier U1A is electrically connected to the 16th pin of the analog switch chip U2. The first operational amplifier U1A is also grounded through the first capacitor C1. The 4th pin of the first operational amplifier U1A is grounded.

[0035] As shown in Figure 3As shown, the second analog switch chip selection circuit includes a second operational amplifier U1B, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, and a twenty-second resistor R22, the inverting input terminal of the second operational amplifier U1B is electrically connected with the sixteenth resistor R16, the inverting input terminal of the second operational amplifier U1B is grounded through the sixth capacitor C6, the fourteenth resistor R14 is connected in parallel with the sixth capacitor C6, the non-inverting input terminal of the second operational amplifier U1B is electrically connected with the pin 11 of the analog switch chip U2 through the eighteenth resistor R18, the non-inverting input terminal of the second operational amplifier U1B is grounded through the eighth capacitor C8, the nineteenth resistor R19 is connected in parallel with the eighth capacitor C8, the output terminal of the second operational amplifier U1B is electrically connected with one end of the seventeenth resistor R17, the other end of the seventeenth resistor R17 is electrically connected with the pin 9 of the analog switch chip U2, the other end of the seventeenth resistor R17 is also grounded through the seventh capacitor C7, the non-inverting input terminal of the second operational amplifier U1B is connected with the output terminal through the twenty-second resistor R22, and the output terminal of the second operational amplifier U1B is also electrically connected with the other end of the second resistor through the fifteenth resistor R15.

[0036] The analog switch chip selection circuit is equivalent to a double-pole four-throw switch, and the specific channel to be connected is determined by address bits S0 and S1, and the truth value is shown in Table 1.

[0037] Table 1 Truth value of address bits S0 and S1

[0038]

[0039] Therefore, when S1=1, S0=1,

[0040] U1Z=VREF1

[0041] When S1=0, S0=1

[0042] U1Z=UR11=VCC 2*R11 / (R5+R11)

[0043] Ua=U1Z*(R9+R13) / (R 3+R9+R13)=VCC 2*R11 / (R5+R11)*(R9+R13) / (R 3+R9+R13)

[0044] Ub=U1Z*R13 / (R 3+R9+R13)=VCC 2*R11 / (R5+R11)*R13 / (R 3+R9+R13)

[0045] When S1=0, S0=0

[0046] U1Z = UR12 = VCC 2 * R12 / (R6 + R12)

[0047] Ua = U1Z * (R9 + R13) / (R13 + R9 + R13) = VCC 2 * R12 / (R6 + R12) * (R9 + R13) / (R13 + R9 + R13)

[0048] Ub = U1Z * R13 / (R13 + R9 + R13) = VCC 2 * R12 / (R6 + R12) * R13 / (R13 + R9 + R13)

[0049] Wherein, U1Z represents the 13-pin voltage of analog switch chip U2.

[0050] At the same time, in order to improve the protection speed, the address of the analog chip selection switch circuit is controlled by a hardware signal.

[0051] The voltage of the same direction input end of U1A and U1B:

[0052] U1A+ = VCC 2 * R10 / (R8 + R10)

[0053] U1B+ = VCC 2 * R19 / (R18 + R19)

[0054] The voltage of the opposite input end of U1A and U1B:

[0055] U1A- = U_BUSPN_Peak * R1 / (R1 + R4)

[0056] U1B- = U_BUSPN_Peak * R14 / (R14 + R16)

[0057] When U1A -> U1A+, the BUSPN_OVP1 level becomes low

[0058] That is, U_BUSPN_Peak * R1 / (R1 + R4) > VCC 2 * R10 / (R8 + R10)

[0059] U_BUSPN_Peak > VCC 2 * R10 * (R1 + R4) / (R8 + R10) / R1

[0060] When U1B -> U1B+, the BUSPN_OVP1 level becomes low

[0061] That is, U_BUSPN_Peak * R14 / (R14 + R16) > VCC 2 * R19 / (R18 + R19)

[0062] U_BUSPN_Peak > VCC2 * R19 * (R14 + R16) / (R18 + R19) / R14

[0063] wherein U_BUSPN_Peak represents the peak value of the overcurrent protection voltage.

[0064] Therefore, when the U_BUSPN_Peak voltage is higher than the calculated value above, the output ports BUSPN_OVP1 and BUSPN_OVP2 of the third operational amplifier U3A and the fourth operational amplifier U3B will trigger level inversion, thereby controlling the analog switch chip selection circuit and the different voltage signals Ua and Ub output by the voltage dividing circuit, solving the problem that the IGBT may be broken down due to overvoltage when the inverter overcurrent protection circuit is in a 1.6 times over-provisioned input bus high voltage.

[0065] As shown in Figure 4 the overcurrent protection circuit includes a third operational amplifier U3A, a fourth operational amplifier U3B, an eleventh capacitor C11, a thirteenth capacitor C13, a twenty-third resistor R23, and a twenty-seventh resistor. The inverting input terminal of the third operational amplifier U3A is electrically connected with the twenty-third resistor R23. The inverting input terminal of the third operational amplifier U3A is also grounded through the eleventh capacitor C11. The non-inverting input terminal of the third operational amplifier U3A is electrically connected with the first inverter overcurrent reference voltage point. The output terminal of the third operational amplifier U3A is electrically connected with one end of the twenty-seventh resistor. The other end of the twenty-seventh resistor is grounded through the thirteenth capacitor C13. The reverse input terminal of the fourth operational amplifier U3B is electrically connected with the second inverter overcurrent reference voltage point. The non-inverting input terminal of the fourth operational amplifier U3B is electrically connected with the inverting input terminal of the third operational amplifier U3A. The output terminal of the fourth operational amplifier U3B is electrically connected with the output terminal of the third operational amplifier U3A.

[0066] The overcurrent protection circuit further includes a ninth capacitor C9, a tenth capacitor C10, and a twentieth resistor R20. The pin 4 of the third operational amplifier U3A is grounded. The pin 8 of the third operational amplifier U3A is connected with +12V voltage. The pin 8 of the third operational amplifier U3A is also grounded through the ninth capacitor C9. The output terminal of the third operational amplifier U3A is electrically connected with one end of the twentieth resistor R20. The other end of the twentieth resistor R20 is connected with +3.3V voltage. The other end of the twentieth resistor R20 is also grounded through the fourth capacitor C4.

[0067] The model of the third operational amplifier U3A and the fourth operational amplifier U3B is LM2903BIDR.

[0068] The voltage of the non-inverting input terminal of U3A and the reverse input terminal of U3B:

[0069] U3A+ = Ua

[0070] U3B- = Ub

[0071] When INV_I>Ua or INV_I<Ub, the comparator triggers overcurrent protection, and the comparator output becomes low.

[0072] Wherein, INV_I represents input voltage.

[0073] The output of the universal bus overvoltage protection circuit built by the third operational amplifier U3A and the fourth operational amplifier U3B is connected to S1 and S0 of the analog chip selection switch circuit, with the change of the bus voltage, after triggering the bus protection, the level of S1 and S0 appears high-low level inversion, so that the output of the voltage dividing circuit is different overcurrent point reference voltage, and after the universal overcurrent protection circuit, the overcurrent point of the inverter can be adjusted according to the change of the inverter bus voltage, so as to achieve accurate and rapid protection of IGBT.

[0074] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited to this, any change or replacement within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An inverter high voltage bus overcurrent protection circuit, characterized in that, The application relates to an over-current protection circuit, which comprises a voltage dividing circuit, an analog switch chip selection circuit for adjusting an inverter over-current reference voltage for the voltage dividing circuit and an over-current protection circuit, the analog switch chip selection circuit comprises a first analog switch chip selection circuit and a second analog switch chip selection circuit, the first analog switch chip selection circuit and the second analog switch chip selection circuit are electrically connected with the voltage dividing circuit, and the over-current protection circuit is electrically connected with a voltage output end of the voltage dividing circuit. The voltage dividing circuit comprises an analog switch chip, a fifth resistor, an eleventh resistor, a sixth resistor, a twelfth resistor and a third capacitor; one end of the fifth resistor is electrically connected with a No. 11 pin of the analog switch chip, the other end of the fifth resistor is electrically connected with a No. 14 pin of the analog switch chip, the other end of the fifth resistor is further grounded through the eleventh resistor, one end of the sixth resistor is electrically connected with the No. 11 pin of the analog switch chip, the other end of the sixth resistor is electrically connected with a No. 12 pin of the analog switch chip, the other end of the sixth resistor is further grounded through the twelfth resistor, and No. 6, No. 7 and No. 8 pins of the analog switch chip are grounded. The voltage dividing circuit further comprises a third resistor, a ninth resistor and a thirteenth resistor, one end of the ninth resistor is electrically connected with a No. 13 pin of the analog switch chip via the third resistor, the other end of the ninth resistor is grounded through the thirteenth resistor, a first inverter over-current reference voltage point is arranged between the third resistor and the ninth resistor, and a second inverter over-current reference voltage point is arranged between the ninth resistor and the thirteenth resistor. The first analog switch chip selection circuit comprises a first operational amplifier, a second capacitor, a fourth capacitor, a fifth capacitor, a first resistor, a second resistor, a fourth resistor, a seventh resistor, an eighth resistor, a tenth resistor and a twenty-first resistor, the fourth resistor is electrically connected with an inverting input end of the first operational amplifier, the inverting input end of the first operational amplifier is further grounded through the second capacitor, the first resistor is connected in parallel with the second capacitor, a non-inverting input end of the first operational amplifier is electrically connected with the No. 11 pin of the analog switch chip through the eighth resistor, the non-inverting input end of the first operational amplifier is grounded through the fifth capacitor, the tenth resistor is connected in parallel with the fifth capacitor, the non-inverting input end of the first operational amplifier is connected with an output end of the first operational amplifier through the twenty-first resistor, the output end of the first operational amplifier is electrically connected with one end of the seventh resistor, the other end of the seventh resistor is electrically connected with a No. 10 pin of the analog switch chip, the other end of the seventh resistor is further grounded through the fourth capacitor, and the output end of the first operational amplifier is further electrically connected with one end of the second resistor.

2. The over-current protection circuit for high voltage bus of inverter according to claim 1, characterized in that: The first analog switch chip selection circuit further comprises a first capacitor, the No. 8 pin of the first operational amplifier is electrically connected with a No. 16 pin of the analog switch chip, the No. 8 pin of the first operational amplifier is further grounded through the first capacitor, and the No. 4 pin of the first operational amplifier is grounded.

3. The over-current protection circuit for high voltage bus of inverter according to claim 2, characterized in that: ​ 4. The over-current protection circuit for high-voltage bus of an inverter according to claim 2 or 3, characterized in that: The second analog switch chip selection circuit comprises a second operational amplifier, a sixth capacitor, a seventh capacitor, an eighth capacitor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor and a twenty-second resistor, the non-inverting input of the second operational amplifier is electrically connected with the sixteenth resistor, the non-inverting input of the second operational amplifier is grounded through the sixth capacitor, the fourteenth resistor is connected with the sixth capacitor in parallel, the non-inverting input of the second operational amplifier is electrically connected with the No. 11 pin of the analog switch chip through the eighteenth resistor, the non-inverting input of the second operational amplifier is grounded through the eighth capacitor, the nineteenth resistor is connected with the eighth capacitor in parallel, the output of the second operational amplifier is electrically connected with one end of the seventeenth resistor, the other end of the seventeenth resistor is electrically connected with the No. 9 pin of the analog switch chip, the other end of the seventeenth resistor is also grounded through the seventh capacitor, the twenty-second resistor is connected between the non-inverting input and the output of the second operational amplifier, and the output of the second operational amplifier is also electrically connected with the other end of the second resistor through the fifteenth resistor.

5. The over-current protection circuit for high voltage bus of an inverter according to claim 4, characterized in that: The overcurrent protection circuit comprises a third operational amplifier, a fourth operational amplifier, an eleventh capacitor, a thirteenth capacitor, a twenty-third resistor and a twenty-seventh resistor, the non-inverting input of the third operational amplifier is electrically connected with the twenty-third resistor, the non-inverting input of the third operational amplifier is also grounded through the eleventh capacitor, the non-inverting input of the third operational amplifier is electrically connected with the first inverter overcurrent reference voltage point, the output of the third operational amplifier is electrically connected with one end of the twenty-seventh resistor, the other end of the twenty-seventh resistor is grounded through the thirteenth capacitor, the non-inverting input of the fourth operational amplifier is electrically connected with the second inverter overcurrent reference voltage point, the non-inverting input of the fourth operational amplifier is electrically connected with the non-inverting input of the third operational amplifier, and the output of the fourth operational amplifier is electrically connected with the output of the third operational amplifier.

6. The over-current protection circuit for high voltage bus of an inverter according to claim 5, characterized in that: The overcurrent protection circuit further comprises a ninth capacitor, a tenth capacitor and a twentieth resistor, the No. 4 pin of the third operational amplifier is grounded, the No. 8 pin of the third operational amplifier is connected with +12V voltage, the No. 8 pin of the third operational amplifier is also grounded through the ninth capacitor, the output of the third operational amplifier is electrically connected with one end of the twentieth resistor, the other end of the twentieth resistor is connected with +3.3V voltage, and the other end of the twentieth resistor is also grounded through the fourth capacitor.

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