Relaxation oscillation circuit, circuit system and electronic equipment

Abstract

The utility model provides a relaxation oscillation circuit, a circuit system and an electronic device, the circuit comprises a voltage source, a resistor unit, a charging and discharging unit, a comparison unit, a delay unit and a compensation current generation unit, the resistor unit generates charging current according to power supply voltage output by the voltage source and charges the charging and discharging unit; the comparison unit is used for comparing the charging voltage of the charging and discharging unit with the reference voltage and outputting an oscillation clock signal according to a comparison result; the delay unit delays the oscillation clock signal for a first time and outputs a delayed oscillation clock signal. According to the utility model, the first time is compensated through the compensation current output by the compensation current generation unit. When the circuit temperature increases, the charging time is prolonged due to the increase of the equivalent resistance of the resistor unit, and the first time is shortened due to the increase of the compensation current. The period time of the delay oscillation clock signal is equal to the sum of the charging time and the first time, so that the period stability of the delay oscillation clock signal is realized.

Description

TECHNICAL FIELD

[0001] The utility model relates to electronic circuit field especially relates to a relaxation oscillator circuit, circuit system and electronic equipment. BACKGROUND

[0002] With the wide application of electronic equipment, the precision of clock circuit determines the maximum speed of circuit operation and the error rate of communication. When the frequency of clock signal deviates from the rated value, the digital module in the circuit will appear running error, thereby causing the communication module in the circuit to appear error code. Therefore, it is crucial to ensure the frequency stability of clock signal.

[0003] However, as a common existing clock circuit, the frequency of clock signal output by the relaxation oscillator circuit cannot be kept stable due to the influence of environmental temperature change.

[0004] Therefore, it has become a technical problem to be solved in the industry to provide a relaxation oscillator circuit with stable clock signal frequency. SUMMARY

[0005] Embodiments of the utility model provide a relaxation oscillator circuit, circuit system and electronic equipment to solve the influence of environmental temperature on the output clock signal of the relaxation oscillator circuit.

[0006] To solve the above technical problem, according to the first aspect of the utility model, a relaxation oscillator circuit is provided, comprising:

[0007] A voltage source is used to output a power supply voltage;

[0008] A resistance unit is used to output a charging current according to the power supply voltage, and the equivalent resistance of the resistance unit is positively correlated with temperature;

[0009] A charge and discharge unit is used to charge according to the charging current and output a charging voltage after completing charging;

[0010] A comparison unit is used to compare the charging voltage and a reference voltage, and output an oscillation clock signal according to the comparison result;

[0011] A delay unit is used to delay the oscillation clock signal for a first time and output a delayed oscillation clock signal, and the delayed oscillation clock signal is used as the output signal of the relaxation oscillator circuit;

[0012] A compensation current generation unit is used to output a compensation current to the delay unit to compensate the first time, and the compensation current is positively correlated with temperature;

[0013] The charge and discharge unit is also used for:

[0014] According to the first state of the delay oscillation clock signal, discharging to ground, and then pulling down the charging voltage;

[0015] According to the second state of the delay oscillation clock signal, stopping discharging to ground.

[0016] Optionally, the resistance unit comprises a single resistance, a first end of the resistance being connected to the positive pole of the voltage source, and a second end of the resistance being connected to the input end of the charge and discharge unit.

[0017] Optionally, the comparison unit comprises a comparator, a non-inverting input end of the comparator being connected to the charging voltage, and an inverting input end of the comparator being connected to the reference voltage, if the charging voltage is greater than the reference voltage, the oscillation clock signal output by the comparator is high, and if the charging voltage is less than the reference voltage, the oscillation clock signal output by the comparator is low.

[0018] Optionally, the delay unit comprises a first PMOS tube and a first NMOS tube.

[0019] The gate of the first PMOS tube is connected to the gate of the first NMOS tube, and the first PMOS tube is connected to the oscillation clock signal as an input end of the delay unit, the source of the first PMOS tube is connected to the compensation current, and the drain of the first PMOS tube is connected to the drain of the first NMOS tube, and the delay oscillation clock signal is output as an output end of the delay circuit.

[0020] The source of the first NMOS tube is connected to the ground end.

[0021] Optionally, the compensation current generation unit comprises a first current source, a second current source, a first transistor, a second transistor, a first resistance, and a second resistance.

[0022] The negative pole of the first current source and the negative pole of the second current source are both connected to the power supply voltage, the positive pole of the first current source is connected to the collector of the first transistor, and the positive pole of the second current source is connected to the collector of the second transistor.

[0023] The emitter of the second transistor is connected to the first end of the first resistance, the emitter of the first transistor is connected to the second end of the first resistance and the first end of the second resistance respectively, and the base of the first transistor is connected to the base of the second transistor and outputs the compensation current as an output end of the compensation current generation unit.

[0024] The second end of the second resistance is connected to the ground end.

[0025] Optionally, the first current source outputs a current equal to the current output by the second current source; the first transistor and the second transistor are the same type of device, and the first transistor and the second transistor have a parameter ratio of 1:N.

[0026] Optionally, the charge and discharge unit comprises a capacitor and a switch subunit.

[0027] The first end of the capacitor is an input and output end of the charge and discharge unit, and is connected to the second end of the resistor and the non-inverting input end of the comparator, and the second end of the capacitor is grounded.

[0028] The first end of the switch subunit is connected to the first end of the capacitor, the second end of the switch subunit is grounded, and the control end of the switch subunit is connected to the delay oscillation clock signal, and the switch subunit is used for:

[0029] being turned on by the delay oscillation clock signal at a high level;

[0030] being turned off by the delay oscillation clock signal at a low level.

[0031] Optionally, the switch subunit comprises a second PMOS tube, a second NMOS tube and an inverter; the source of the second PMOS tube is connected to the drain of the second NMOS tube and serves as the first end of the switch subunit, and the drain of the second PMOS tube is connected to the source of the second NMOS tube and serves as the second end of the switch subunit; the output end of the inverter is connected to the gate of the second PMOS tube, and the input end of the inverter is connected to the gate of the second NMOS tube and the delay oscillation clock signal.

[0032] The utility model embodiment further provides a circuit system, comprising the relaxation oscillation circuit.

[0033] The utility model embodiment further provides an electronic device, comprising the circuit system.

[0034] Compared with the prior art, the technical scheme provided by the utility model has the following beneficial effects:

[0035] The relaxation oscillation circuit provided by the technical scheme of the utility model, through the compensation current which is positively correlated with temperature, the first time is compensated. When the circuit temperature increases, the charging time of the charging and discharging unit will be prolonged due to the increase of the equivalent resistance of the resistance unit, and the first time will be shortened due to the increase of the compensation current. Since the period time of the delay oscillation clock signal is equal to the sum of the charging time and the first time, the charging time is compensated through the first time, so as to ensure that the period time of the delay oscillation clock signal will not change due to the increase of the circuit temperature, thereby realizing the period stability of the delay oscillation clock signal. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 It is the module schematic view of the relaxation oscillation circuit provided by the utility model embodiment;

[0037] Figure 2 It is the circuit structure schematic view of the relaxation oscillation circuit provided by the utility model;

[0038] Figure 3 It is the circuit structure schematic view of the switch subunit provided by the utility model;

[0039] Figure 4 It is the circuit structure schematic view of the delay unit provided by the utility model;

[0040] Figure 5 It is the circuit structure schematic view of the compensation current IPTAT generation unit 50 provided by the utility model. DETAILED DESCRIPTION

[0041] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all the other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application. The terms "first", "second", "third", "fourth" and the like (if exist) in the description of the present application and the claims and the above drawings are used to distinguish similar objects, and do not have to be used to describe a particular order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to the clearly listed steps or units, but can include other steps or units not clearly listed or inherent to the process, method, product or device.

[0042] As described in the background, the frequency of the clock signal output by the relaxation oscillator circuit cannot be kept stable due to the influence of the change of ambient temperature. The following will be described with reference to the drawings.

[0043] Therefore, the embodiments of the present application provide a new relaxation oscillator circuit to ensure that the clock signal is not affected by the change of ambient temperature.

[0044] wherein, Figure 1 is a module schematic diagram of the relaxation oscillator circuit provided by the embodiments of the present application.

[0045] Please refer to Figure 1 The relaxation oscillator circuit provided by the embodiments of the present application comprises:

[0046] a voltage source Vsource, which is used to output a power supply voltage V1;

[0047] a resistance unit 10, which is used to output a charging current according to the power supply voltage V1, and the equivalent resistance of the resistance unit 10 is positively correlated with temperature;

[0048] a charge-discharge unit 20, which is used to charge according to the charging current and output a charging voltage V2 after completing the charging;

[0049] a comparison unit 30, which is used to compare the charging voltage V2 and a reference voltage Vref, and output an oscillation clock signal va according to the comparison result;

[0050] a delay unit 40 configured to delay the oscillation clock signal va for a first time and output a delayed oscillation clock signal vb as an output signal of the relaxation oscillation circuit;

[0051] a compensation current IPTAT generation unit 50 configured to output a compensation current IPTAT to the delay unit 40 to compensate for the first time, the compensation current IPTAT being positively correlated with temperature;

[0052] The charge and discharge unit 20 is further configured to:

[0053] According to the first state of the delayed oscillation clock signal vb, discharge to ground and pull down the charging voltage V2.

[0054] According to the second state of the delayed oscillation clock signal vb, stop discharging to ground.

[0055] Through the above technical means, the delayed oscillation clock signal vb output by the comparison unit 30 is not affected by the ambient temperature, so that the period of the delayed oscillation clock signal vb is kept stable. The specific principle is as follows:

[0056] First, the normal working process of the relaxation oscillation circuit is introduced:

[0057] 1. The resistance unit 10 generates a charging current according to the power supply voltage V1 output by the voltage source Vsource, and charges the charge and discharge unit 20 through the charging current.

[0058] 2. After being charged by the charging current, the charge voltage V2 of the charge and discharge unit 20 increases to exceed the reference voltage Vref. After comparing the charge voltage V2 and the reference voltage Vref, the comparison unit 30 outputs the first state of the oscillation clock signal va. After delaying the oscillation clock signal va for a first time, the delay unit 40 outputs the first state of the delayed oscillation clock signal vb to the outside, and also outputs the delayed oscillation clock signal vb to the charge and discharge unit 20.

[0059] 3. The charge and discharge unit 20 discharges to ground according to the first state of the delayed oscillation clock signal vb, and pulls down the charging voltage V2. When the charging voltage V2 is lower than the reference voltage Vref, the comparison unit 30 outputs the second state of the oscillation clock signal va.

[0060] 4. The charge-discharge unit 20 stops discharging to the ground according to the second state of the delay oscillation clock signal vb, and the charging voltage V2 of the charge-discharge unit 20 is charged by the charging current again to make the delay oscillation clock signal vb become the first state again.

[0061] Therefore, according to the above workflow, the state of the delay oscillation clock signal vb is periodically cycled, and the cycle period, i.e. the clock period of the delay oscillation clock signal vb, is equal to the sum of the charging time of the charging voltage V2 to the charge-discharge unit 20 and the first time. Since the equivalent resistance of the resistance unit 10 increases with the increase of the ambient temperature, and the charging time is proportional to the equivalent resistance of the resistance unit 10, the charging time increases with the increase of the ambient temperature. However, the compensation current IPTAT also increases with the increase of the ambient temperature, and the first time is inversely proportional to the compensation current IPTAT, so the first time decreases with the increase of the ambient temperature. Therefore, when the ambient temperature increases, the clock period of the delay oscillation clock signal vb is not affected by the ambient temperature due to the increase of the charging time and the decrease of the first time, thereby maintaining the stability of the clock period of the delay oscillation clock signal vb.

[0062] In order to make the above-mentioned purposes, characteristics and beneficial effects of the utility model more obvious and easy to understand, the specific embodiments of the utility model will be described in detail below with reference to the drawings.

[0063] Among them, Figure 2 is the circuit structure schematic diagram of the relaxation oscillation circuit provided by the utility model.

[0064] Please refer to Figure 2 As a specific embodiment, the resistance unit 10 includes a single resistance, the first end of the resistance is connected to the positive pole of the voltage source Vsource, and the second end of the resistance is connected to the input end of the charge-discharge unit 20. Of course, the resistance unit 10 can also include a resistance network formed by a plurality of resistances in series and parallel, which is not limited here.

[0065] Please refer to Figure 2 As a specific embodiment, the comparison unit 30 includes a comparator Amp, the non-inverting input end of the comparator Amp is connected to the charging voltage V2, and the inverting input end is connected to the reference voltage Vref. If the charging voltage V2 is greater than the reference voltage Vref, the oscillation clock signal va output by the comparator Amp is high level, and if the charging voltage V2 is less than the reference voltage Vref, the oscillation clock signal va output by the comparator Amp is low level. Wherein, the specific structure of the comparator Amp is the conventional technical means in the art, which is not described here.

[0066] Please refer to Figure 2 , as a specific embodiment, the charge and discharge unit 20 includes: a capacitor and a switch subunit 21;

[0067] The first end of the capacitor is the input and output end of the charge and discharge unit 20, and is connected with the second end of the resistor and the non-inverting input end of the comparator Amp at the same time, and the second end of the capacitor is grounded.

[0068] The first end of the switch subunit 21 is connected with the first end of the capacitor, the second end of the switch subunit 21 is grounded, and the control end of the switch subunit 21 is connected with the delay oscillation clock signal vb, and the switch subunit 21 is used for:

[0069] Conducting by the delay oscillation clock signal vb of high level;

[0070] Turn off by the delay oscillation clock signal vb of low level.

[0071] Wherein, Figure 3 The circuit structure schematic diagram of the switch subunit provided by the utility model is shown in the figure.

[0072] Please refer to Figure 3 , the switch subunit 21 specifically includes: a second PMOS tube MP2, a second NMOS tube MN2 and an inverter D1; the source of the second PMOS tube MP2 is connected with the drain of the second NMOS tube MN2, and serves as the first end of the switch subunit 21, and the drain of the second PMOS tube MP2 is connected with the source of the second NMOS tube MN2, and serves as the second end of the switch subunit 21; the output end of the inverter D1 is connected with the gate of the second PMOS tube MP2, and the input end of the inverter D1 is connected with the gate of the second NMOS tube MN2 and the delay oscillation clock signal vb.

[0073] It should be noted that if the non-inverting input end of the comparator Amp is connected with the reference voltage Vref, and the inverting input end of the comparator Amp is connected with the charging voltage V2, then the output end of the inverter D1 is connected with the gate of the second NMOS tube MN2, and the input end of the inverter D1 is connected with the gate of the second PMOS tube MP2 and the delay oscillation clock signal vb. Therefore, the switch subunit 21 is turned on by the delay oscillation clock signal vb of low level, and is turned off by the delay oscillation clock signal vb of high level.

[0074] Of course, the specific structure of the switch subunit can also select other CMOS switch circuits with switch function, which is not limited here.

[0075] Wherein, Figure 4The utility model provides a circuit structure schematic drawing of delay unit.

[0076] Please refer to Figure 4 As a kind of specific implementation, the delay unit 40 includes: first PMOS MP1 and first NMOS MN1;

[0077] The gate of the first PMOS MP1 is connected with the gate of the first NMOS MN1, and the first PMOS MP1 is connected with the oscillation clock signal va as the input end of the delay unit 40, the source of the first PMOS MP1 is connected with the compensation current IPTAT, and the drain of the first PMOS MP1 is connected with the drain of the first NMOS MN1, and the first PMOS MP1 outputs the delay oscillation clock signal vb as the output end of the delay circuit;

[0078] The source of the first NMOS MN1 is connected with the ground terminal.

[0079] Among them, Figure 5 The utility model provides a circuit structure schematic drawing of compensation current IPTAT generation unit 50.

[0080] Please refer to Figure 5 As a kind of specific implementation, the compensation current IPTAT generation unit 50 includes: first current source IBIAS1, second current source IBIAS2, first triode Q1, second triode Q2, first resistance R1 and second resistance R2;

[0081] The negative pole of the first current source IBIAS1 and the negative pole of the second current source IBIAS2 are connected with the power supply voltage V1, the positive pole of the first current source IBIAS1 is connected with the collector of the first triode Q1, and the positive pole of the second current source IBIAS2 is connected with the collector of the second triode Q2;

[0082] The emitter of the second triode Q2 is connected with the first end of the first resistance R1, the emitter of the first triode Q1 is connected with the second end of the first resistance R1 and the first end of the second resistance R2 respectively, and the base of the first triode Q1 is connected with the base of the second triode Q2 and outputs the compensation current IPTAT as the output end of the compensation current IPTAT generation unit 50;

[0083] The second end of the second resistance R2 is connected with the ground terminal. Among them, the current value outputted by the first current source IBIAS1 and the second current source IBIAS2 is same.

[0084] The current outputted by the first current source IBIAS1 is equal to the current outputted by the second current source IBIAS2, the first transistor Q1 and the second transistor Q2 are the same type of devices, and the ratio of the parameters of the first transistor Q1 and the parameters of the second transistor Q2 is 1:N.

[0085] Please refer to Figure 2 , Figure 3 , Figure 4 and Figure 5 , the principles of the technical effects achieved by the embodiments of the utility model will be described as follows:

[0086] Firstly, the resistor charges the capacitor, so that the charging voltage V2 is equal to the reference voltage Vref in the charging time, and the formula is as follows:

[0087] t RC = RC·1n(V1 / (V1-V REF )); formula (1)

[0088] Wherein, t RC is used to represent the charging time; R is used to represent the resistance value of the resistor; C is used to represent the capacitance value of the capacitor; V REF is used to represent the voltage value of the reference voltage.

[0089] Because the resistance value of the resistor and the environmental temperature are positively correlated, that is, the resistance value of the resistor will increase with the increase of the environmental temperature. And through the above formula (1), it can be known that the charging time and R are positively correlated, so the charging time will increase with the increase of the environmental temperature.

[0090] Secondly, the formula of the first time is as follows:

[0091] t del = VDD·C PARA / I PTAT ; formula (2)

[0092] Wherein, t del is used to represent the first time; VDD is used to represent the power supply voltage V1 of the delay unit 40; C PARA is used to represent the total parasitic capacitance in the delay unit; I PTAT is used to represent the compensation current.

[0093] Wherein, the compensation current IPTAT is specifically the current flowing through the first resistor R1, and the current flowing through the first resistor R1 is as follows:

[0094] I PTAT = V R / R1; formula (3)

[0095] wherein, V R a voltage drop for characterizing the first resistance R1.

[0096] And the voltage drop of the first resistance R1 is as follows:

[0097]

[0098] wherein, V T a thermal voltage for characterizing the first triode Q1 or the second triode Q2; I BIAS1 an output current for characterizing the first current source; I BIAS2 an output current for characterizing the second current source; I S1 a characteristic current for characterizing the first triode; I S2 a characteristic current for characterizing the second triode; N a parameter ratio for characterizing the second triode and the first triode.

[0099] Because the output current of the first current source IBIAS1 is the same as the output current of the second current source IBIAS2, and the first triode Q1 and the second triode Q2 are the same type of devices, formula (3) combined with formula (4) is as follows:

[0100]

[0101] wherein, T is used to characterize the ambient temperature; q is used to characterize the static working point of the triode.

[0102] Therefore, it can be known from formula (5) that the compensation current IPTAT and the ambient temperature are positively correlated, that is, the compensation current IPTAT will also increase with the increase of the ambient temperature. It can be known from the above formula (2) that the first time and the compensation current IPTAT are negatively correlated, so the first time will decrease with the increase of the ambient temperature.

[0103] Finally, the formula of the time period of the delay oscillation clock signal vb is as follows:

[0104] t SUM = t del + t RC : formula (3)

[0105] wherein, t SUM is used to characterize the time period of the delay oscillation clock signal.

[0106] Since the first time is reduced with the increase of the ambient temperature, and the charging time is increased with the increase of the ambient temperature, the time period of the delay oscillation clock signal vb is not changed with the increase of the ambient temperature, so that the time period is kept stable with the increase of the ambient temperature.

[0107] In conclusion, the relaxation oscillation circuit provided by the embodiments of the present application compensates the first time by the compensation current which is positively correlated with the temperature. When the circuit temperature is increased, the charging time of the charging and discharging unit is extended due to the increase of the equivalent resistance of the resistance unit, and the first time is shortened due to the increase of the compensation current. Since the period time of the delay oscillation clock signal is equal to the sum of the charging time and the first time, the charging time is compensated by the first time, so that the period time of the delay oscillation clock signal is not changed with the increase of the circuit temperature, thereby realizing the period stability of the delay oscillation clock signal.

[0108] The embodiments of the present application further provide a circuit system comprising the relaxation oscillation circuit.

[0109] The embodiments of the present application further provide an electronic device comprising the circuit system.

[0110] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A relaxation oscillator circuit, characterized by comprising: The application relates to a relaxation oscillator circuit, comprising: a voltage source for outputting a power voltage; a resistance unit for outputting a charging current according to the power voltage, the equivalent resistance of the resistance unit being positively correlated with temperature; a charge-discharge unit for charging according to the charging current and outputting a charging voltage after charging is completed; a comparison unit for comparing the charging voltage and a reference voltage and outputting an oscillation clock signal according to a comparison result; a delay unit for delaying the oscillation clock signal for a first time and outputting a delayed oscillation clock signal as an output signal of the relaxation oscillator circuit; a compensation current generation unit for outputting a compensation current to the delay unit to compensate the first time, the compensation current being positively correlated with temperature; the charge-discharge unit is further used for: discharging to ground according to a first state of the delayed oscillation clock signal to pull down the charging voltage; stopping discharging to ground according to a second state of the delayed oscillation clock signal.

2. The relaxation oscillator circuit of claim 1, wherein, The resistance unit comprises a single resistance, a first end of the resistance being connected to a positive pole of the voltage source, and a second end of the resistance being connected to an input end of the charge-discharge unit.

3. The relaxation oscillator circuit of claim 2, wherein, The comparison unit comprises a comparator, a non-inverting input end of the comparator being connected to the charging voltage, an inverting input end of the comparator being connected to the reference voltage, the oscillation clock signal output by the comparator being high level if the charging voltage is greater than the reference voltage, and the oscillation clock signal output by the comparator being low level if the charging voltage is less than the reference voltage.

4. The relaxation oscillator circuit of claim 3, wherein, The delay unit comprises a first PMOS tube and a first NMOS tube. A gate of the first PMOS tube is connected to a gate of the first NMOS tube, and the gate of the first PMOS tube is connected to the oscillation clock signal as an input end of the delay unit, a source of the first PMOS tube is connected to the compensation current, a drain of the first PMOS tube is connected to a drain of the first NMOS tube, and the drain of the first PMOS tube outputs the delayed oscillation clock signal as an output end of the delay unit. A source of the first NMOS tube is connected to a ground end.

5. The relaxation oscillator circuit of claim 4, wherein, The compensation current generation unit comprises a first current source, a second current source, a first transistor, a second transistor, a first resistance and a second resistance. A negative pole of the first current source and a negative pole of the second current source are both connected to a power voltage, a positive pole of the first current source is connected to a collector of the first transistor, and a positive pole of the second current source is connected to a collector of the second transistor. An emitter of the second transistor is connected to a first end of the first resistance, emitters of the first transistor are respectively connected to a second end of the first resistance and a first end of the second resistance, a base of the first transistor is connected to a base of the second transistor, and the base of the first transistor outputs the compensation current as an output end of the compensation current generation unit. A second end of the second resistance is connected to a ground end.

6. The relaxation oscillator circuit of claim 5, wherein, The current outputted by the first current source is equal to the current outputted by the second current source; the first transistor and the second transistor are the same type of devices, and the parameter ratio of the first transistor and the second transistor is 1:N.

7. The relaxation oscillator circuit according to any one of claims 3 to 5, wherein The charge and discharge unit comprises a capacitor and a switch subunit; The first end of the capacitor is used as the input and output end of the charge and discharge unit, and is connected with the second end of the resistor and the non-inverting input end of the comparator at the same time, and the second end of the capacitor is grounded; The first end of the switch subunit is connected with the first end of the capacitor, the second end of the switch subunit is grounded, and the control end of the switch subunit is connected with the delay oscillation clock signal; the switch subunit is used for: being turned on by the high level of the delay oscillation clock signal; being turned off by the low level of the delay oscillation clock signal.

8. The relaxation oscillator circuit of claim 7, wherein, The switch subunit comprises a second PMOS tube, a second NMOS tube and an inverter; the source of the second PMOS tube is connected with the drain of the second NMOS tube and is used as the first end of the switch subunit, and the drain of the second PMOS tube is connected with the source of the second NMOS tube and is used as the second end of the switch subunit; the output end of the inverter is connected with the gate of the second PMOS tube, and the input end of the inverter is connected with the gate of the second NMOS tube and is connected with the delay oscillation clock signal.

9. Circuitry, characterized by The relaxation oscillation circuit comprises any one of claims 1 to 8.

10. An electronic device, comprising: The circuit system comprises claim 9.

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