Magnetron sputtering carrier plate and magnetron sputtering equipment
By setting a shield and a hollow structure on the substrate on the magnetron sputtering carrier, the coating area is adjusted, which solves the problem of reduced cell efficiency caused by Cu film diffusion, and achieves higher photovoltaic cell efficiency and carrier versatility.
Patent Information
- Application Number
- CN202423179321.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2026-01-02
- Estimated Expiration
- 2034-12-20
AI Technical Summary
Existing magnetron sputtering substrates are unable to form small-area coatings on silicon wafers, causing the Cu film to diffuse into the silicon substrate, increasing the series resistance and leakage current of the solar cell, and reducing the efficiency of the solar cell.
Design a magnetron sputtering carrier plate, comprising a substrate and a mask, the mask having a hollow structure to prevent coating deposition on the edge of the solar cell, and by adjusting the spacing between the mask and the substrate, controlling the coating area to ensure that the Cu layer does not penetrate into the silicon wafer.
By utilizing the edge effect of the shield, Cu diffusion into the silicon wafer is prevented, reducing internal defects in the cell, improving the efficiency of the photovoltaic cell, and enabling the carrier plate of the sputtering equipment to be compatible with various models, thus reducing spare parts costs.
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Figure CN223752879U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to photovoltaic technology field especially relates to a magnetron sputtering carrier plate, magnetron sputtering equipment. BACKGROUND
[0002] The statements in this section merely provide background information related to the utility model and do not necessarily constitute the prior art.
[0003] Heterojunction with Intrinsic Thin-layer (HJT) uses electroplating copper process to partially replace silver in order to reduce silver paste cost. The electroplating copper process needs to introduce Cu seed layer on the cell piece, and then electrochemical reaction with electroplating solution to form metal electrode.
[0004] In actual production, HJT cell needs to be deposited with Transparent Conductive Oxide (TCO) film on silicon wafer in vacuum environment by magnetron sputtering, and then Cu film is deposited on TCO film as Cu seed layer. Cu, as a deep energy level material, will diffuse to silicon substrate, and the energy level position is conducive to promoting carrier recombination, reducing minority carrier lifetime, resulting in excessive defects in the cell, increasing the series resistance and leakage current of the cell piece, and thus reducing the efficiency of solar cell. When the area of Cu film is greater than the area of TCO film, the edge of TCO film cannot block the diffusion of Cu to silicon substrate, which will cause the efficiency of HJT cell to decrease. UTILITY MODEL CONTENT
[0005] The utility model aims at providing a magnetron sputtering carrier plate and magnetron sputtering equipment to solve the technical problem that the existing magnetron sputtering carrier plate is difficult to form small-area film on silicon wafer.
[0006] In order to achieve the above-mentioned purpose, the utility model provides the following technical scheme:
[0007] In the first aspect, the utility model provides a magnetron sputtering carrier plate for film plating of photovoltaic cell piece, which comprises a substrate and at least one shutter, and the shutter has at least one first hollow structure;
[0008] The circumferential edge of the shutter is used for blocking film deposition on the circumferential edge of the photovoltaic cell piece, and the width of the circumferential edge is greater than the preset width;
[0009] The substrate has at least one second hollow structure, and the circumferential edge of the substrate located at the second hollow structure is used for supporting the photovoltaic cell piece;
[0010] A line connecting the center of each first hollow structure and the center of a corresponding second hollow structure is perpendicular to the substrate.
[0011] According to at least one embodiment of the present application, the distance between the shutter and the substrate is adjustable.
[0012] According to at least one embodiment of the present application, a plurality of studs are provided on the substrate, and the shutter has a plurality of through holes for the studs to penetrate, and the shutter is fixed on the studs by cooperating the locking nuts with the studs.
[0013] According to at least one embodiment of the present application, the locking nut has an elastic ring inside, and the locking nut is locked on the stud by the elastic force of the elastic ring.
[0014] According to at least one embodiment of the present application, the stud has a plurality of wedge surfaces distributed along the axial direction, the locking nut has a threaded hole penetrating from the outer surface to the internal thread, and one end of the screw abuts against a corresponding wedge surface through the threaded hole.
[0015] According to at least one embodiment of the present application, the stud has a first limiting protrusion and a second limiting protrusion, and the first limiting protrusion and the second limiting protrusion are arranged on the surface of the stud in a direction away from the substrate.
[0016] According to at least one embodiment of the present application, the number of shutters is a plurality, and each shutter has two first hollow structures.
[0017] The through hole of each shutter is located at a corner position of the shutter.
[0018] According to at least one embodiment of the present application, the number of shutters is a plurality, and at least one of the plurality of shutters is located on one side of the substrate, and at least one of the plurality of shutters is located on the other side of the substrate.
[0019] According to at least one embodiment of the present application, each stud is provided with two locking nuts, and the two locking nuts on the same stud are located on both sides of the shutter.
[0020] In the second aspect, the utility model provides a magnetron sputtering equipment, including the carrier plate of first aspect, the shutter is located between target material and the substrate.
[0021] In one or more technical solutions provided in the exemplary embodiments of the present application, at least one of the following beneficial effects can be achieved.
[0022] The utility model exemplary embodiment's magnetron sputtering carrier plate is used for the film coating of photovoltaic cell piece, and the carrier plate includes substrate and at least one shutter, the shutter has at least one first openwork structure, the substrate has at least one second openwork structure, and the first openwork structure and the second openwork structure one to one, wherein, the circumferential edge portion of the second openwork structure of substrate can support the photovoltaic cell piece to be coated. The shutter is arranged between the target material and the photovoltaic cell piece on the side of the photovoltaic cell piece to be coated, and the circumferential edge portion of the first openwork structure will shield a part of the sputtering target material, so that the remaining sputtering target material is deposited to the middle part of the photovoltaic cell piece through the first openwork structure, that is, the film coating area on the photovoltaic cell piece is small, so that the edge of the film coating and the photovoltaic cell piece have a certain spacing, and the spacing is the width of the circumferential edge of the photovoltaic cell piece. When the above width is greater than the preset width, taking the Cu film as an example, the film layer area on the photovoltaic cell piece before the Cu film is formed is larger than the Cu film, which will prevent Cu from diffusing to the silicon wafer, thereby reducing the internal defects of the cell and improving the efficiency of the photovoltaic cell. BRIEF DESCRIPTION OF DRAWINGS
[0023] The accompanying drawings illustrate exemplary embodiments of the present utility model and, together with the general description given above, serve to explain the principles of the present utility model, wherein these drawings are included to provide further understanding of the present utility model and are included in the present specification and constitute a part of the present specification;
[0024] Figure 1 It is the structural schematic diagram of magnetron sputtering carrier plate according to the utility model embodiment;
[0025] Figure 2 It is the structural schematic diagram of substrate according to the utility model embodiment;
[0026] Figure 3 It is the structural schematic diagram of shutter according to the utility model embodiment;
[0027] Figure 4 It is the structural schematic diagram of photovoltaic cell piece according to the utility model embodiment.
[0028] Sign: 10, shutter; 11, first openwork structure; 20, substrate; 22, second openwork structure; 30, stud; 31, lock nut; 40, silicon wafer; 41, TCO layer; 42, Cu layer; 421, measuring point. DETAILED DESCRIPTION
[0029] In order to make the technical problem, technical scheme and beneficial effect of the present utility model more clearly understood, the present utility model is further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present utility model and are not used to limit the present utility model.
[0030] Currently, HJT's TCO layer and Cu seed layer are both achieved using vacuum PVD magnetron sputtering, with the silicon wafer placed horizontally on the substrate for deposition. However, in actual production, different manufacturers use different magnetron sputtering equipment and substrates, resulting in varying effective thin film areas for the formed TCO and Cu layers.
[0031] If the effective thin film area is mismatched, such that the effective area of the Cu layer is larger than that of the TCO layer, metallic Cu will penetrate into the silicon wafer, forming deep-level impurities and creating leakage channels, thus affecting cell efficiency. Furthermore, the electroplating point positions in the photovoltaic cell electroplating process vary depending on the pattern design requirements. A single, fixed substrate with a fixed effective coating area cannot meet the needs of producing different products, leading to a significant waste of resources in stockpiling different types of substrates during production.
[0032] To address the aforementioned issues, the magnetron sputtering carrier provided by the exemplary embodiment of this utility model, by setting a shield between the substrate and the target, utilizes the edge effect of the shield to adjust the coating area deposited on the silicon wafer, thereby enabling the carrier to achieve universality.
[0033] Figure 4 This is a structural schematic diagram of a photovoltaic cell according to an embodiment of the present invention. Figure 4 As shown, due to the resistivity relationship on the silicon wafer, the order is amorphous silicon layer > TCO layer > Cu layer. The effective distance of the effective film layer from the edge of the silicon wafer can be determined by measuring the sheet resistance change trend of the measurement points using a four-probe method. For example, select the first measurement point 421 and obtain the sheet resistance Rs(1) of this measurement point 421. Then, select multiple measurement points 421 at equal intervals towards the center and obtain the corresponding sheet resistance Rs(n). Due to the existence of the substrate edge effect, there may be uncoated or thin film phenomena at the edge of the silicon wafer. Theoretically, the Rs value of the first measurement point 421 should be greater than that of the second measurement point 421, the Rs value of the third measurement point 421 should be greater than that of the second measurement point, and so on. The sheet resistance relationship of three consecutive measurement points 421 is: the ratio of Rs(n) / Rs(n+1) is between 0.095 and 1.05, and when the ratio of Rs(n-1) / Rs(n) is greater than 2, this position is the effective distance of the film layer. The effective distance between the TCO layer and the edge of the silicon wafer is E1, and the effective distance between the Cu layer and the edge of the silicon wafer is E2.
[0034] The magnetron sputtering substrate provided in the exemplary embodiment of this utility model utilizes the edge effect of the shield to adjust the E2 of the Cu layer to be greater than the E1 of the TCO layer, ensuring that the TCO layer can block Cu from penetrating into the silicon wafer.
[0035] Figure 1 This is a schematic diagram of the structure of a magnetron sputtering carrier plate according to an embodiment of the present invention;Figure 2 is a structural schematic diagram of a substrate according to the embodiment of the present application; Figure 3 is a structural schematic diagram of a shutter according to the embodiment of the present application. As shown in the figure, Figures 1-3 the shutter 10 has at least one first hollow structure 11; the circumferential side of the first hollow structure 11 of the shutter 10 is used to block the deposition of the film on the circumferential edge of the photovoltaic cell; wherein the width of the circumferential edge is greater than the preset width; the substrate 20 has at least one second hollow structure 22, and the circumferential side of the second hollow structure 22 of the substrate 20 is used to support the photovoltaic cell; the center line of each first hollow structure 11 and the corresponding center of the second hollow structure 22 is perpendicular to the substrate 20.
[0036] In practical application, the silicon wafer 40 of the photovoltaic cell is placed on the second hollow structure 22 of the substrate 20, and the silicon wafer 40 is supported by the circumferential side of the second hollow structure 22, the area of the silicon wafer 40 is greater than the area of the second hollow structure 22, and the part of the substrate 20 supporting the silicon wafer 40 can be a groove or a stepped surface to position the silicon wafer 40. The second hollow structure 22 can make the front surface or the back surface of the silicon wafer 40 be able to be coated by magnetron sputtering. After the silicon wafer 40 is coated with the TCO layer 41, the distance between the shutter 10 and the substrate 20 is adjusted and fixed, which can make the area of the Cu layer 42 deposited on the TCO layer 41 smaller, that is, E2 of the Cu layer 42 is greater than E1 of the TCO layer 41. The sputtered Cu target passes through the first hollow structure 11 of the shutter 10 and is deposited on the TCO layer 41. Due to the shielding of the frame forming the first hollow structure 11 of the shutter 10, no Cu layer 42 or very thin Cu layer 42 is deposited on the edge of the silicon wafer 40, and the Cu layer 42 forms a spacing with the edge of the silicon wafer 40, so that the entire Cu layer 42 is blocked by the larger area of the TCO layer 41 and cannot penetrate into the silicon wafer 40. Based on this, through the edge effect of the shutter 10 during magnetron sputtering, the penetration of Cu can be reduced, and the defects and leakage current of the photovoltaic cell can be reduced. At the same time, through the setting of the shutter 10, the universality of the substrate of the sputtering equipment can be higher, which is suitable for various models of sputtering equipment, and the cost of spare parts of the substrate is reduced.
[0037] Exemplarily, the shutter 10 and the substrate 20 are parallel to each other, and the first hollow structure 11 of the shutter 10 corresponds to the second hollow structure 22 of the substrate 20 one by one. For example, the shutter 10 is located directly above the silicon wafer 40.
[0038] Exemplarily, the distance between the shutter 10 and the substrate 20 is adjustable. By adjusting the distance between the shutter 10 and the substrate 20, the coating area of the target sputtering on the silicon wafer 40 is adjusted, which can realize the purpose of coating different effective film areas on one substrate 20, thereby saving cost.
[0039] It can be understood that the distance between the shutter 10 and the base plate 20 can be fixed, for example, the shutter 10 and the base plate 20 are fixedly connected together through the connecting rod in a welded manner, which is suitable for the implementation of a coated effective area.
[0040] For example, the base plate 20 is provided with a plurality of studs 30, and the shutter 10 has a plurality of through holes for the studs 30 to penetrate. The shutter 10 is fixedly arranged on the studs 30 through the cooperation of the locking nuts 31 and the studs 30. The shutter 10 can move to any position along the axial direction of the studs 30, so as to adjust the distance between the shutter 10 and the silicon wafer 40. When the shutter 10 moves to the desired position, the shutter 10 can be fixed at the position through the locking nuts 31.
[0041] When the target material is directly above the base plate 20, the studs 30 are arranged on the side of the base plate 20 facing the target material. One locking nut 31 can be arranged below the shutter 10 on the stud 30 to position the shutter 10. It can be understood that one locking nut 31 can be arranged above and below the shutter 10 on the stud 30, and the position of the shutter 10 can be positioned through the clamping of the two locking nuts 31.
[0042] When the target material is directly below the base plate 20, the studs 30 are arranged on the side of the base plate 20 facing the target material. One locking nut 31 can be arranged above and below the shutter 10 on the stud 30, and the position of the shutter 10 can be positioned through the clamping of the two locking nuts 31.
[0043] It should be noted that the number of studs 30 and the number of through holes on the shutter 10 are the same and one-to-one correspondence, and are determined according to the actual stability and fixing requirements, which will not be limited further.
[0044] Considering the stability of the shutter 10 on the stud 30, in some embodiments, the locking nut 31 has an elastic ring inside, and the locking nut 31 is locked on the stud 30 through the elastic force of the elastic ring.
[0045] For example, the inner side of the locking nut 31 has a nylon ring. When the locking nut 31 is tightened at the corresponding position of the stud 30, the nylon ring is pressed in the screw thread to prevent the locking nut 31 from loosening through the friction force, so as to keep the distance between the shutter 10 and the silicon wafer 40 accurate enough.
[0046] In another optional embodiment, the stud 30 has a plurality of wedge surfaces distributed along the axial direction, and the locking nut 31 has a screw hole penetrating from the outer surface to the inner thread. One end of the screw passes through the screw hole and abuts against the corresponding wedge surface.
[0047] The distribution of the plurality of wedge surfaces along the axial direction can be equidistant, which can on the one hand visibly determine the position of the shielding plate 10, facilitating adjustment, and on the other hand, when the shielding plate 10 is adjusted to the required spacing from the silicon wafer 40, is located at one of the wedge surfaces of the stud 30; at this time, the end of the screw can be stopped on the wedge surface by being screwed through the screw hole of the locking nut 31, and the position of the locking nut 31 is fixed by friction force, ensuring the positional stability of the locking nut 31, that is, maintaining the positional stability of the shielding plate 10.
[0048] In view of the problem of ensuring that the shielding plate 10 is too close to the silicon wafer 40 and is easy to crush the silicon wafer 40, in some embodiments, the shielding plate 10 provided by the example embodiment of the utility model is provided with a first limiting protrusion and a second limiting protrusion on each stud 30, and the first limiting protrusion and the second limiting protrusion are arranged on the surface of the stud 30 in a direction away from the base plate 20.
[0049] When the locking nut 31 on the stud 30 moves to the first limiting protrusion, it reaches the closest distance from the silicon wafer 40, and due to the blocking of the first limiting protrusion, the locking nut 31 and the shielding plate 10 cannot further approach the silicon wafer 40 along the thread of the stud 30, thereby preventing the locking nut 31 from crushing the silicon wafer 40.
[0050] When the locking nut 31 on the stud 30 moves to the second limiting protrusion, it reaches the farthest distance from the silicon wafer 40, and the locking nut 31 and the shielding plate 10 cannot further move away from the silicon wafer 40 along the thread of the stud 30, thereby preventing the shielding plate 10 and the locking nut 31 from being separated from the corresponding stud 30.
[0051] In some embodiments, the shielding plate 10 provided by the example embodiment of the utility model is provided in a plurality of numbers, and each shielding plate 10 has two first hollow structures 11; the through hole of each shielding plate 10 is located at a corner position of the shielding plate 10.
[0052] When the base plate 20 has a structure in which two second hollow structures 22 form a group, for example, the base plate 20 has three groups of second hollow structures 22, and a corresponding shielding plate 10 is arranged on each group of second hollow structures 22, and the shielding plate 10 has two first hollow structures 11 which correspond to two opposite second hollow structures 22 of the same group, respectively. Four studs 30 are arranged at the corner positions of the periphery of the same group of second hollow structures 22, and correspondingly, the through holes of the shielding plate 10 are arranged one by one corresponding to the four studs 30, so that the spacing between the shielding plate 10 and the silicon wafer 40 can be stably adjusted.
[0053] In some embodiments, the shielding plate 10 provided by the example embodiment of the utility model is provided in a plurality of numbers, and at least one of the plurality of shielding plates 10 is located on one side of the base plate 20, and at least one of the plurality of shielding plates 10 is located on the other side of the base plate 20.
[0054] Exemplarily, three shields 10 are arranged on one side of the substrate 20 (the front side of the silicon wafer 40) to shield the front sides of the six silicon wafers 40 on the three groups of second hollow structures 22; and another three shields 10 are arranged on the other side of the substrate 20 (the back side of the silicon wafer 40) to shield the back sides of the six silicon wafers 40 on the three groups of second hollow structures 22. This kind of implementation can make the carrier plate suitable for front sputtering, back sputtering, and simultaneous front and back sputtering, and has higher versatility and ease of use.
[0055] A specific embodiment is given below to further illustrate the preparation method of the HJT photovoltaic cell.
[0056] Embodiment
[0057] S1: The silicon wafer 40 is subjected to texturing treatment.
[0058] An n-type silicon wafer 40 with a size of 182 mm x 182 mm and a thickness of 150 um is used as a substrate; the silicon wafer 40 is subjected to rough polishing, pre-cleaning, texturing, cleaning, acid washing, and drying to remove the damage layer and impurities on the surface of the silicon wafer 40 and form a pyramid texturing structure on the front and back sides of the silicon wafer 40.
[0059] Pre-cleaning is performed using KOH and hydrogen peroxide, the bath temperature is 333 K, and the treatment time is 120 s; texturing is performed using KOH and an additive, the bath temperature is 333 K, and the treatment time is 480 s; acid washing is performed using HF and HCL, the bath temperature is 308 K, and the treatment time is 120 s. After the pure water cleaning, the silicon wafer 40 is cleaned with hot water again, the water temperature is about 323 K, each batch of cleaning takes 90 s, and finally the silicon wafer 40 is dried by blowing hot air from top to bottom.
[0060] S2: The silicon wafer 40 after the texturing treatment is subjected to double-sided film deposition by a chemical vapor deposition method PECVD.
[0061] i-a-Si:H, p-a-Si:H, and n-a-Si:H are deposited on the two sides of the silicon wafer 40 after the texturing, the film deposition sequence is I-N-I-P, and the concentration flow ratio of different chambers is adjusted: SiH4 / SiH4+H2 concentration ratio 4; RF Power: 1.5 W / cm 2 , the substrate temperature is 423 K, the thickness of the intrinsic amorphous silicon on the front side is 4 nm, the thickness of the p-type amorphous silicon is 10 nm, the thickness of the intrinsic amorphous silicon on the back side is 4 nm, and the thickness of the n-type amorphous silicon is 5 nm.
[0062] S3: The silicon wafer 40 after the double-sided film deposition is subjected to TCO layer 41 deposition by a PVD magnetron sputtering method.
[0063] The TCO layer 41 is deposited on the front and back of the silicon wafer 40 in sequence, the sputtering power is 10 KW, the atmosphere is Ar / O2, Ar / H2, the pressure is 0.25 Pa, the chamber temperature is 293 K, the thickness of the TCO layer 41 is 100 nm, and the distance E1 between the effective film of the TCO layer 41 and the edge of the silicon wafer 40 is 0.7 mm measured by the four-probe method.
[0064] S4: A metal Cu layer 42 is deposited on the TCO layer 41 by the PVD magnetron sputtering method.
[0065] The distance between the shutter 10 in the carrier plate and the substrate 20 is adjusted, and the position of the shutter 10 is fixed by the locking nut 31. The carrier plate is transported into the vacuum chamber of the magnetron sputtering device.
[0066] The vacuum chamber background vacuum degree is 5.0×10 -4 Pa, the sputtering power is 8 KW, the voltage is 420 V, the sputtering gas is Ar (purity is more than 99.99%), the pressure is 0.35 Pa, the chamber temperature is 273 K, and the film thickness is 120 nm. The distance E2 between the effective film of the Cu layer 42 and the edge of the silicon wafer 40 is 0.95 mm measured by the four-probe method.
[0067] S5: The patterning process includes coating photoresist, exposure and development.
[0068] (1) The photoresist is uniformly coated on the surface of the Cu layer 42, the thickness is 20 um, the uniformity is less than or equal to 5% (the effective distance from the edge is less than 0.5 mm), the organic solvent is evaporated by solidification, the temperature is 333 K, and the time is 300 s.
[0069] (2) The photoresist is exposed by selective light exposure, the parallel light source wavelength is 440 nm, the photoresist is removed by a development chemical solvent after a modified reaction occurs in the electroplating area, the development solution is NaCO3 solution, the development solution concentration is 2.38%, the temperature is 308 K, and the time is 120 s.
[0070] S6: Copper electroplating treatment.
[0071] The exposed Cu layer 42 is connected to the electrode of the electroplating tank as a negative electrode, the vertical electroplating mode is adopted, the current density is controlled to be 2.5 A / dm 2 , the temperature is 318 K, the electroplating time is 300 s, the electroplating liquid formula is 120 g / L of CuSO4, 50 ml / L of concentrated sulfuric acid, and an additive, copper electroplating is obtained, and the electroplating layer thickness is 25 um.
[0072] S7: Copper electroplating protection layer treatment.
[0073] In order to adapt to a higher current density, fast tin electroplating is selected, the tin electroplating adopts a methanesulfonic acid / methanesulfonic acid stannous electroplating system, the concentration of the methanesulfonic acid tin concentrated solution is 250 g / L, and the applied current for the tin electroplating is 1.5 A / dm2 temperature 338K, plating 100s.
[0074] S8: stripping off the photoresist and the excess Cu layer 42 to obtain the plating photovoltaic cell.
[0075] Comparative Example
[0076] The difference between the comparative example and the embodiment is that the distance between the shutter and the substrate in step S4 is less than the distance in the above embodiment, and the distance E2 between the effective thin film of the Cu layer and the edge of the silicon wafer is 0.05mm.
[0077] The performance of the photovoltaic cell obtained in the embodiment and the comparative example is tested, as shown in Table 1.
[0078] Table 1: Performance test results of the photovoltaic cell
[0079] Isc / A Voc / V FF / % Eff / % Example 13.36 0.7459 85.22 25.38 Comparative Example 13.31 0.7362 83.4 23.89
[0080] As can be seen from Table 1, compared with E2<E1 in the comparative example, which may cause part of the metal Cu to enter the silicon wafer, the short-circuit current, open-circuit voltage, fill factor and conversion efficiency of the embodiment are all higher.
[0081] Therefore, in the embodiment, E2>E1, and it can be seen that the effective thin film area of the Cu layer is smaller than the TCO layer, and the TCO layer effectively blocks the metal Cu from entering the silicon wafer and forming a leakage channel. Based on this, the carrier plate of the exemplary embodiment of the present application can adjust the effective thin film area of the Cu layer in the sputtering process, thereby effectively improving the efficiency of the photovoltaic cell.
[0082] The exemplary embodiment of the present application also provides a magnetron sputtering device, which comprises the carrier plate of the above embodiment, and the shutter is located between the target material and the substrate.
[0083] The magnetron sputtering device has the same technical advantages as the carrier plate described above, and will not be described here again.
[0084] Those skilled in the art should understand that the above embodiments are only for clearly illustrating the present application, and are not intended to limit the scope of the present application. Based on the above disclosure, other changes or modifications can be made by those skilled in the art, and these changes or modifications are still within the scope of the present application.
Claims
1. A magnetron sputter carrier plate, characterized in that A coating for photovoltaic cells, the carrier plate comprising a base plate and at least one shielding plate, the shielding plate having at least one first hollow structure; the shielding plate at a circumferential side of the first hollow structure for blocking the coating from being deposited on a circumferential edge of the photovoltaic cell, wherein the circumferential edge has a width greater than a preset width; the base plate having at least one second hollow structure, the base plate at a circumferential side of the second hollow structure for supporting the photovoltaic cell; a line connecting a center of each first hollow structure and a center of a corresponding second hollow structure is perpendicular to the base plate.
2. The carrier of claim 1, wherein The distance between the shielding plate and the base plate is adjustable.
3. The carrier of claim 2, wherein, The base plate is provided with a plurality of studs, the shielding plate has a plurality of through holes for the studs to pass through, and the shielding plate is fixed on the studs by cooperating with the studs through lock nuts.
4. The carrier of claim 3, wherein, The lock nut has an elastic ring inside, and the lock nut is locked on the stud through the elastic force of the elastic ring.
5. The carrier plate of claim 3, wherein, The stud is distributed with a plurality of wedge surfaces along the axial direction, the lock nut has a screw hole passing through from the outer surface to the inner thread, and one end of a screw passes through the screw hole and abuts against a corresponding wedge surface.
6. The carrier plate of any of claims 3-5, wherein, The stud has a first limiting protrusion and a second limiting protrusion arranged on the surface of the stud in a direction away from the base plate.
7. The carrier of claim 3, wherein The number of the shielding plates is plural, and each shielding plate has two first hollow structures. The through hole of each shielding plate is located at a corner position of the shielding plate.
8. The carrier of claim 3, wherein, The number of the shielding plates is plural, and at least one of the plurality of shielding plates is located on one side of the base plate, and at least one of the plurality of shielding plates is located on the other side of the base plate opposite to the one side.
9. The carrier plate of claim 3, wherein, Each stud is provided with two lock nuts, and the two lock nuts on the same stud are respectively located on two sides of the shielding plate.
10. A magnetron sputtering apparatus, characterized by, The carrier plate comprises the base plate and the shielding plate, and the shielding plate is located between the target material and the base plate.