Optical emission module and optical interconnection structure

Abstract

The embodiment of the utility model relates to an optical emission module and an optical interconnection structure. The light emitting module comprises a first electric chip used for providing a driving signal; the laser is connected with the first electric chip and is used for emitting light under the action of the driving signal, and the light emitting direction of the laser deviates from the first electric chip; the light path adjusting unit is arranged on a light emitting path of the laser, and the light path adjusting unit is used for adjusting a light path of a light beam from the laser, so that a preset included angle is formed between emergent light and incident light of the light path adjusting unit.

Description

Technical Field

[0001] This application relates to the field of optical communication technology, and in particular to an optical transmitting module and an optical interconnect structure. Background Technology

[0002] Optical communication is a communication method that uses light waves as carriers and optical fibers or the atmosphere as transmission media to transmit information. The basic principle of optical communication is to convert electrical signals into optical signals, transmit them through the transmission medium, and then convert the optical signals back into electrical signals at the receiving end. Therefore, optical communication has extremely high transmission bandwidth, which can meet the needs of transmitting large amounts of data. However, existing optical transmitter modules used to support optical communication are relatively large, which cannot meet users' needs. Utility Model Content

[0003] Therefore, it is necessary to provide an optical emission module and an optical interconnect structure to address the aforementioned technical problems.

[0004] In a first aspect, this application provides an optical emitting module, comprising:

[0005] The first electrical chip is used to provide drive signals;

[0006] A laser, connected to the first electrical chip, is used to emit light under the action of the driving signal, and the light emission direction of the laser is away from the first electrical chip.

[0007] An optical path adjustment unit is disposed on the light emission path of the laser. The optical path adjustment unit is used to adjust the optical path of the beam from the laser so that the emitted light and the incident light of the optical path adjustment unit form a preset angle.

[0008] In one embodiment, the optical path adjustment unit includes:

[0009] A first convex lens is used to receive the light beam from the laser and to emit parallel light through the light-emitting surface of the first convex lens;

[0010] A first plane mirror is disposed on the light-emitting side of the first convex lens. The angle between the first plane mirror and the optical axis of the first convex lens is 45°. The first plane mirror is used to reflect the light beam from the first convex lens.

[0011] The second convex lens is disposed on the light-emitting side of the first plane mirror and is used to focus the light beam from the first plane mirror and project it onto the optical fiber.

[0012] In one embodiment, the optical path adjustment unit includes:

[0013] A first convex lens is used to receive the light beam from the laser and to emit parallel light through the light-emitting surface of the first convex lens;

[0014] A first concave mirror is disposed on the light-emitting side of the first convex lens and is used to reflect the light beam from the first convex lens to the optical fiber.

[0015] In one embodiment, the laser includes:

[0016] Semiconductor substrate;

[0017] A first Bragg reflector layer, a quantum well layer, and a second Bragg reflector layer are sequentially stacked on the surface of the semiconductor substrate.

[0018] An oxidation confinement layer is disposed in the second Bragg reflective layer;

[0019] The first electrode is in contact with the second Bragg reflective layer and extends to the surface of the semiconductor substrate;

[0020] The second electrode is disposed on the surface of the semiconductor substrate and is in contact with the first Bragg reflective layer;

[0021] The semiconductor substrate is disposed close to the first electrical chip, and there are multiple lasers forming a VCSEL array.

[0022] In one embodiment, the optical emitting module further includes a first connection layer, the first connection layer comprising:

[0023] A silicon dielectric substrate has a plurality of through holes extending from a first surface to a second surface of the silicon dielectric substrate; the first surface is the surface of the silicon dielectric substrate near the first electrical chip, and the second surface is the surface of the silicon dielectric substrate near the VCSEL array.

[0024] One end of the via is electrically connected to the first electrical chip via a microbump, and the other end of the via is electrically connected to the VCSEL array via a microbump.

[0025] In one embodiment, a rewiring layer is also included;

[0026] The redistribution layer is disposed between the silicon dielectric substrate and the first electrical chip, and the redistribution layer is electrically connected to the vias in the silicon dielectric substrate and the first electrical chip, respectively; or

[0027] The redistribution layer is disposed between the silicon dielectric substrate and the VCSEL array, and the redistribution layer is electrically connected to the vias in the silicon dielectric substrate and the VCSEL array.

[0028] In one embodiment, it further includes a first printed circuit board and a first encapsulation layer stacked together, wherein the first electrical chip is electrically connected to the first encapsulation layer;

[0029] The first printed circuit board is electrically connected to the first encapsulation layer via solder balls, and the first encapsulation layer and the first electrical chip are electrically connected via bumps.

[0030] Secondly, this application provides an optical interconnect structure, including an optical transmitting module, an optical receiving module as described above, and an optical fiber for connecting the optical transmitting module and the optical receiving module;

[0031] The optical receiving module includes a second printed circuit board, a second encapsulation layer, a second electrical chip, a second connection layer, and a photodetector array stacked together. The second electrical chip is electrically connected to the second printed circuit board via the second encapsulation layer and is point-connected to the photodetector array via the second connection layer.

[0032] In one embodiment, the second printed circuit board is electrically connected to the second package layer via solder balls, the second package layer and the second electrical chip are electrically connected via bumps, and the second electrical chip and the photodetector array are electrically connected via microbumps.

[0033] In one embodiment, it further includes:

[0034] Memory and processor;

[0035] A third connection layer is used to connect the memory and the optical emitting module, and to connect the processor and the optical emitting module;

[0036] The switching chip is electrically connected to the second packaging layer.

[0037] The aforementioned optical emitting module and optical interconnect structure, because the laser's light emission direction is opposite to the first electrical chip, eliminates the obstruction of the light emission path by a conductive glass substrate, thereby improving the optical problems caused by the glass substrate. Furthermore, eliminating the glass substrate makes the entire optical emitting module thinner and more compact. Moreover, compared to solutions that place the laser below the first electrical chip, the first electrical chip in this application does not obstruct the laser's light emission path, thus improving the laser's light utilization rate, reducing losses, and improving the heat dissipation capacity of the optical emitting module. In addition, by using the optical path adjustment unit to fold the beam's transmission direction, the direction of the beam incident on the optical fiber via the optical path adjustment unit can be flexibly controlled, thus better adapting to optical communication scenarios. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is one of the cross-sectional schematic diagrams of an embodiment of a light emitting module;

[0040] Figure 2 This is one of the structural schematic diagrams of an optical path adjustment unit according to an embodiment;

[0041] Figure 3 This is a second schematic diagram of the structure of an optical path adjustment unit according to one embodiment;

[0042] Figure 4 This is a partial cross-sectional schematic diagram of an embodiment of an optical emitting module;

[0043] Figure 5 This is a cross-sectional schematic diagram of an embodiment of a light emitting module;

[0044] Figure 6 This is one of the partial cross-sectional schematic diagrams of an embodiment of an optical interconnect structure;

[0045] Figure 7 A second partial cross-sectional schematic diagram of an embodiment of an optical interconnect structure;

[0046] Figure 8 This is a schematic diagram showing the locations of the memory, processor, and VCSEL array in one embodiment.

[0047] Figure 9 This is a schematic diagram showing the positions of the photoelectric detection array and the switching chip in one embodiment.

[0048] Component designation explanation:

[0049] Optical emitting module: 10; First electrical chip: 110; First connection layer: 120; Silicon dielectric substrate: 121; Through-hole: 122; VCSEL array: 130; Laser: 131; First printed circuit board: 140; First encapsulation layer: 150; Optical path adjustment unit: 160; First convex lens: 161; First plane mirror: 162; Second convex lens: 163; First concave mirror: 164; Optical receiving module: 20; Second electrical chip: 210; Second connection layer: 220; Photodetector array: 230; Second printed circuit board: 240; Second encapsulation layer: 250; Optical fiber: 30; Memory: 40; Processor: 50; Third connection layer: 60; Switching chip: 70. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0051] It is understood that the terms "first," "second," etc., used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, the first electrical chip may be referred to as the second electrical chip, and similarly, the second electrical chip may be referred to as the first electrical chip.

[0052] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. "Multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. "Several" means at least one, such as one, two, etc., unless otherwise explicitly specified.

[0053] This application provides an optical emitting module applied to an optical interconnect structure. The optical emitting module converts electrical signals into optical signals and typically includes a light source such as a semiconductor laser or a light-emitting diode (LED) and a modulator. The optical receiving module converts the received optical signals back into electrical signals and performs amplification, demodulation, and decoding to recover the original information. The optical receiving module typically includes photodetectors such as photodiodes or avalanche photodiodes, as well as amplifiers and demodulators.

[0054] In the field of optical communication technology, for short-distance communication scenarios, a light engine architecture of linear-drive pluggable optical modules (LPO) and co-packaged optoelectronics (CPO) can be adopted on the optical transmitter module side. The above two structures eliminate the traditional DSP or CDR devices used for long-distance signal recovery, thus saving about 50% of module power consumption.

[0055] However, for both pluggable optical modules and LPO optical modules, the mainstream packaging method for their internal optical engines remains COB (Chips on Board) packaging. COB packaging refers to bonding individual optical and electrical chips onto the PCB surface in a positive mounting manner, and using gold or aluminum wires for wire bonding to achieve electrical interconnection between chips and between chips and the PCB. Taking the currently common Quad Small Form-factor Pluggable (QSFP) and Octal Small Form-factor Pluggable (OSFP) packaging standards as examples, the width of their internal PCBs is approximately between 17mm and 19mm. With the increase in module speed, the packaging space for internal optoelectronic chips has become very crowded, and wire bonding also occupies a large area of ​​the layout, increasing the complexity of chip mounting and PCB internal routing design.

[0056] This application provides an optical emitting module 10, Figure 1 This is one of the cross-sectional schematic diagrams of the light emitting module 10 according to an embodiment, with reference to... Figure 1 The optical emission module 10 includes a first electrical chip 110, a laser 131, and an optical path adjustment unit 160.

[0057] The first electrical chip 110 provides a driving signal. The laser 131 is connected to the first electrical chip 110 and emits light under the influence of the driving signal. The light emission direction of the laser 131 is away from the first electrical chip 110. That is, for the laser 131, the driving signal comes from the side of the laser 131 facing the first electrical chip 110, and light is emitted from the side away from the first electrical chip 110. An optical path adjustment unit 160 is disposed on the light emission path of the laser 131. The optical path adjustment unit 160 adjusts the optical path of the beam from the laser 131 so that the emitted light and the incident light form a preset angle.

[0058] In related technologies, if the source of the driving signal and the light output are on the same side of the laser 131, the driving signal needs to be transmitted to the laser 131 through the conductive glass substrate. Therefore, the conductive glass substrate will also be located on the light output path of the laser 131, resulting in optical problems such as light absorption and light path deflection.

[0059] In the embodiments of the application, since the light emission direction of the laser 131 is opposite to that of the first electrical chip 110, there is no conductive glass substrate blocking the light emission path, thereby improving the optical problems caused by the glass substrate. Moreover, by eliminating the glass substrate, the entire light emitting module 10 is thinner and more compact. Compared to the solution of placing the laser 131 below the first electrical chip 110, the first electrical chip 110 does not block the light emission path of the laser 131 in the technical solution of this application, thereby improving the light utilization rate of the laser 131, reducing losses, and improving the heat dissipation capacity of the light emitting module 10. In addition, by turning the transmission direction of the beam through the optical path adjustment unit 160, the direction of the beam incident on the optical fiber 30 through the optical path adjustment unit 160 can be flexibly controlled, thereby better adapting to optical communication scenarios.

[0060] Figure 2 This is one of the structural schematic diagrams of the optical path adjustment unit 160 in one embodiment, with reference to... Figure 2 In one embodiment, the optical path adjustment unit 160 includes a first convex lens 161, a first plane mirror 162, and a second convex lens 163. The first convex lens 161 receives the light beam from the laser 131 and emits parallel light through its emitting surface. The first plane mirror 162 is disposed on the emitting side of the first convex lens 161, and the angle between the optical axis of the first plane mirror 162 and the optical axis of the first convex lens 161 is 45°. The first plane mirror 162 reflects the light beam from the first convex lens 161. The second convex lens 163 is disposed on the emitting side of the first plane mirror 162 and focuses the light beam from the first plane mirror 162 onto the optical fiber 30.

[0061] Figure 3 This is a second schematic diagram of the structure of the optical path adjustment unit 160 according to an embodiment, with reference to... Figure 3 In one embodiment, the optical path adjustment unit 160 includes a first convex lens 161 and a first concave mirror 164. The first convex lens 161 is used to receive the light beam from the laser 131 and emit parallel light through its light-emitting surface. The first concave mirror 164 is disposed on the light-emitting side of the first convex lens 161 and is used to reflect the light beam from the first convex lens 161 to the optical fiber 30.

[0062] In one embodiment, the laser 131 is a VCSEL laser. Specifically, the VCSEL laser includes a semiconductor substrate disposed close to the first electrical chip 110. The VCSEL laser also includes a first Bragg reflector layer, a quantum well layer, and a second Bragg reflector layer stacked sequentially on the surface of the semiconductor substrate, an oxide confinement layer disposed in the second Bragg reflector layer, and a first electrode and a second electrode. The first electrode is in contact with the second Bragg reflector layer and extends to the surface of the semiconductor substrate. The second electrode is disposed on the surface of the semiconductor substrate and is in contact with the first Bragg reflector layer.

[0063] In related technologies, edge-emitting lasers are typically used as the emission source. However, due to the emission mode of edge-emitting lasers, they need to be arranged in a linear pattern, and the number of lasers is strictly affected by the size of the optical interconnect structure. Furthermore, the number of lasers affects the overall transmission rate of the optical emitting module 10. In this embodiment, since the light emission direction of laser 131 is parallel to the stacking direction of the first electrical chip 110 and laser 131 (i.e., the light emission direction of laser 131 is perpendicular to its emission surface), more vertical-cavity surface-emitting lasers 131 can be fully utilized in the optical emitting module 10, thereby increasing the overall transmission rate of the optical emitting module 10. Moreover, based on the stacked structure of the first electrical chip 110 and laser 131, the signal transmission path of the driving signal in this embodiment is shorter, thus effectively reducing the loss and delay of the driving signal on the transmission path, thereby improving the accuracy of the driving signal.

[0064] Furthermore, there are multiple lasers 131, which form a VCSEL array 130. By employing a VCSEL array 130 that includes multiple vertical-cavity surface-emitting lasers, the emission power of the light source can be effectively increased, thereby improving the optical communication rate of the optical emission module 10.

[0065] In one embodiment, the light emitting module 10 further includes a first connection layer 120. Figure 4 This is a partial cross-sectional schematic diagram of an embodiment of a light emitting module 10. Figure 4The diagram illustrates a first electrical chip 110, a first interconnect layer 120, and a VCSEL array 130 composed of multiple VCSEL lasers within the optical emitting module 10. The first interconnect layer 120 is located on one side of the first electrical chip 110, while the VCSEL array 130 is located on the side of the first interconnect layer 120 away from the first electrical chip 110. That is, the first electrical chip 110, the first interconnect layer 120, and the VCSEL array 130 are stacked. Compared to a co-layer arrangement of the first electrical chip 110 and the VCSEL array 130, the stacked arrangement effectively reduces their footprint in a plane.

[0066] Further, the first interconnect layer 120 includes a silicon dielectric substrate 121. The silicon dielectric substrate 121 is used to ensure the structural stability of the first interconnect layer 120 and to provide electrical insulation between the first electrical chip 110 and the VCSEL array 130, ensuring the reliability of the light emission of the VCSEL array 130. The silicon dielectric substrate 121 has a plurality of vias 122 extending from a first surface to a second surface. The first surface is the surface of the silicon dielectric substrate 121 near the first electrical chip 110, and the second surface is the surface of the silicon dielectric substrate 121 near the VCSEL array 130. The diameter of the vias 122 is from a few micrometers to tens of micrometers, and the vias 122 are vertical interconnect structures penetrating the silicon dielectric substrate 121 to achieve electrical connection between the first electrical chip 110 and the VCSEL array 130. Therefore, the first interconnect layer 120 in this embodiment can also be called a Through Silicon Via Interposer (TSV-interposer). The TSV-interposer with vertical interconnection function in this application embodiment can, on the one hand, further shorten the signal transmission path between the first electrical chip 110 and the VCSEL array 130 to reduce the loss and delay of the driving signal on the transmission path, and on the other hand, eliminate the need for in-plane wiring, thereby facilitating the high-density integration requirements of the optical emission module 10.

[0067] In one embodiment, one end of the via 122 is electrically connected to the first electrical chip 110 via a microbump, and the other end of the via 122 is electrically connected to the VCSEL array 130 via a microbump. Specifically, the size of the microbump is typically between a few micrometers and tens of micrometers, that is, the size of the microbump corresponds to the size of the via 122. Therefore, by using microbumps to connect the first electrical chip 110 and the VCSEL array 130 located on both sides of the first connection layer 120, the distance between adjacent microbumps can meet the integration requirements of the optical emitting module 10, thereby reducing the size of the optical emitting module 10, while ensuring that short circuits do not occur.

[0068] In one embodiment, the light emitting module 10 further includes a redistribution layer. By way of example, the redistribution layer is disposed between the silicon dielectric substrate 121 and the first electrical chip 110, and is electrically connected to the vias 122 in the silicon dielectric substrate 121 and the first electrical chip 110, respectively. Specifically, the redistribution layer can be electrically connected to the vias 122 in the silicon dielectric substrate 121 via microbumps, and to the first electrical chip 110 via bumps. By way of example, the redistribution layer is disposed between the silicon dielectric substrate 121 and the VCSEL array 130, and is electrically connected to the vias 122 in the silicon dielectric substrate 121 and the VCSEL array 130, respectively. Specifically, the redistribution layer can be electrically connected to the vias 122 in the silicon dielectric substrate 121 via microbumps, and to the VCSEL array 130 via bumps. By setting the redistribution layer, the circuit routing can be optimized to meet the connection requirements between the first electrical chip 110 and the VCSEL array 130.

[0069] Figure 5 This is a cross-sectional schematic diagram of an embodiment of a light emitting module 10, with reference to... Figure 5 In one embodiment, the light emitting module 10 further includes a first printed circuit board 140 and a first encapsulation layer 150 stacked together, with the first electrical chip 110 electrically connected to the first encapsulation layer 150. Specifically, the first encapsulation layer 150 is an organic encapsulation layer, which refers to an encapsulation layer using materials such as epoxy resin and polyimide as substrates. The organic encapsulation layer can better match the chip and the printed circuit board, thereby protecting the chip and providing electrical connection. The organic encapsulation layer also includes via structures and conductive lines to realize electrical signal transmission between the first electrical chip 110 and the first printed circuit board 140.

[0070] Furthermore, the first printed circuit board 140 and the first encapsulation layer 150 are electrically connected via solder balls, and the first encapsulation layer 150 and the first electrical chip 110 are electrically connected via bumps. Specifically, solder balls, bumps, and microbumps are all used to achieve electrical connections and mechanical fixation, and are key components to ensure that the optical interconnect structure can function properly, realize signal transmission, and provide physical support. Among them, the diameter of solder balls is typically between 0.25 mm and 0.76 mm, the diameter of bumps is typically between 100 μm and 150 μm, and the size of microbumps is the smallest, with a diameter that can even be less than 2 μm. Based on different sizes, the fabrication difficulty of solder balls, bumps, and microbumps gradually increases. Therefore, this embodiment uses connection structures of different sizes between different structures, which can reduce the fabrication difficulty of the optical interconnect structure while ensuring the reliability of electrical and mechanical connections, thereby improving the yield of the optical interconnect structure.

[0071] This application also provides an optical interconnect structure. Figure 6 This is one of the partial cross-sectional schematic diagrams of an embodiment of an optical interconnect structure, with reference to... Figure 6The optical interconnect structure includes an optical transmitter module 10, an optical receiver module 20 as described above, and an optical fiber 30 for connecting the optical transmitter module 10 and the optical receiver module 20. The structure including the optical transmitter module 10, the optical receiver module 20 and the optical fiber 30 can also be called an optical engine (OE).

[0072] The optical receiving module 20 includes a second printed circuit board 240, a second encapsulation layer 250, a second electrical chip 210, a second connection layer 220, and a photodetector array 230, all stacked together. The second electrical chip 210 is electrically connected to the second printed circuit board 240 via the second encapsulation layer 250 and point-to-point connected to the photodetector array 230 via the second connection layer 220. Specifically, the second encapsulation layer 250 is an organic encapsulation layer, which refers to an encapsulation layer using materials such as epoxy resin and polyimide as substrates. The organic encapsulation layer can better match the chip and the printed circuit board, thereby protecting the chip and providing electrical connections. The organic encapsulation layer also includes via structures and conductive lines to realize electrical signal transmission between the second electrical chip 210 and the second printed circuit board 240.

[0073] In this embodiment, the second electrical chip 210, the second connection layer 220, and the photodetector array 230 are stacked. Compared to a co-layer arrangement of the second electrical chip 210 and the photodetector array 230, the stacked arrangement effectively reduces their footprint in the plane. Furthermore, the photoelectric sensing signal output by the photodetector array 230 in this embodiment has a shorter transmission path, thus effectively reducing signal loss and delay along the transmission path and improving the accuracy of the photoelectric sensing signal. Further, the photodetector array 230 can be flip-chip mounted on the second electrical chip 210, ensuring that the second electrical chip 210 does not obstruct the light path of the photodetector array 230, thereby improving the light utilization rate of the photodetector array 230 and ensuring reliable data transmission.

[0074] In one embodiment, the second printed circuit board 240 and the second encapsulation layer 250 are electrically connected via solder balls, the second encapsulation layer 250 and the second electrical chip 210 are electrically connected via bumps, and the second electrical chip 210 and the photodetector array 230 are electrically connected via microbumps. Specifically, solder balls, bumps, and microbumps are used to achieve electrical connections and mechanical fixation, and are key components to ensure that the optical interconnect structure can function properly, realize signal transmission, and provide physical support. The diameter of solder balls typically ranges from 0.25 mm to 0.76 mm, the diameter of bumps typically ranges from 100 μm to 150 μm, and the microbumps are the smallest, with a diameter even less than 2 μm. Based on these different sizes, the fabrication difficulty of solder balls, bumps, and microbumps gradually increases. Therefore, this embodiment uses connection structures of different sizes between different structures, which can reduce the fabrication difficulty of the optical interconnect structure while ensuring the reliability of electrical and mechanical connections, thereby improving the yield of the optical interconnect structure.

[0075] Figure 7 This is a second partial cross-sectional schematic diagram of an embodiment of an optical interconnect structure, with reference to... Figure 7 In one embodiment, the optical interconnect structure further includes a memory 40, a processor 50, a third connection layer 60, and a switching chip 70. The third connection layer 60 connects the memory 40 and the optical emitting module 10, and also connects the processor 50 and the optical emitting module 10. Specifically, the third connection layer 60 connects the memory 40 and the first encapsulation layer 150, and also connects the processor 50 and the first encapsulation layer 150. The switching chip 70 is electrically connected to the second encapsulation layer 250. The memory 40 and the processor 50 are connected to the first printed circuit board 140 via the first encapsulation layer 150, and the switching chip 70 is connected to the second printed circuit board 240 via the second encapsulation layer 250.

[0076] Specifically, memory 40 is used to store various configuration information required for optical communication, such as wavelength allocation, signal modulation methods, and communication protocol parameters. Memory 40 can also serve as a temporary data storage area during optical communication data transmission. For example, when the data generation speed at the transmitting end is fast, but the bandwidth of the transmission link is limited, memory 40 can temporarily store this data to prevent data loss. At the receiving end, if the data processing speed cannot keep up with the receiving speed, memory 40 can also buffer data to ensure data integrity. Memory 40 may be, for example, high-bandwidth memory (HBM). High-bandwidth memory uses stacked 3D packaging technology to vertically stack multiple DRAM chips and uses through-silicon via (TSV) technology to achieve high-speed interconnection between the chips.

[0077] The processor 50 is used to adjust the output power and other operating parameters of the VCSEL array 130 in real time, and to process the electrical signals in the optical communication system. At the transmitting end, the processor 50 needs to encode and modulate the input raw data to convert it into a signal format suitable for optical transmission. At the receiving end, the processor 50 needs to decode and demodulate the electrical signal converted from the received optical signal to recover the original data.

[0078] The switching chip 70 is used to implement data switching and forwarding. In optical communication systems, there are typically multiple nodes and links. The switching chip 70 can forward data from one input port to the corresponding output port based on the destination address of the data packet. For example, in an optical interconnect network in a data center, the switching chip 70 can quickly and accurately forward data generated by a server to other servers or storage devices.

[0079] In the embodiments of the application, the memory 40, processor 50 and switching chip 70 are integrated into the optical interconnect structure through the connection function of the third connection layer 60, which can further improve the function of the optical interconnect structure and enhance the integration of the optical interconnect structure.

[0080] Figure 8 This is a schematic diagram showing the positions of the memory 40, processor 50, and VCSEL array 130 in one embodiment. (Refer to...) Figure 8 The VCSEL array 130 is located on the side closer to the photodetector array 230 to shorten the beam transmission path. The memory 40 and the processor 50 are located on the side away from the photodetector array 230. The optical interconnect structure may include two memories 40, which are located on opposite sides of the processor 50. Figure 9 This is a schematic diagram showing the positions of the photoelectric detection array 230 and the switching chip 70 in one embodiment, with reference to... Figure 9 The orthographic projection of the switching chip 70 on the second printed circuit board 240 is located in the middle of the second printed circuit board 240, and multiple photoelectric detection arrays 230 are respectively disposed on both sides of the second printed circuit board 240.

[0081] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0082] The above embodiments merely illustrate several implementation methods of the present application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present application embodiments, and these all fall within the protection scope of the present application embodiments. Therefore, the protection scope of the patent for the embodiments of this application should be determined by the appended claims.

Claims

1. An optical transmitter module, characterized by comprising: The application relates to a light emitting module. The light emitting module comprises: a first electric chip for providing a driving signal; a laser connected with the first electric chip, for emitting light under the action of the driving signal, wherein the light emitting direction of the laser is away from the first electric chip; 2. The light launch module of claim 1, wherein, a light path adjusting unit arranged on the light emitting path of the laser, for adjusting the light path of the light beam from the laser, so that the exit light and the incident light of the light path adjusting unit form a preset included angle. The light path adjusting unit comprises: a first convex lens for receiving the light beam from the laser, and emitting parallel light through the light emitting surface of the first convex lens; a first plane mirror arranged on the light emitting side of the first convex lens, wherein the included angle between the first plane mirror and the optical axis of the first convex lens is 45 degrees, and the first plane mirror is used for reflecting the light beam from the first convex lens; 3. The optical transmission module of claim 1, wherein, a second convex lens arranged on the light emitting side of the first plane mirror, for focusing the light beam from the first plane mirror and projecting it to an optical fiber. The light path adjusting unit comprises: a first convex lens for receiving the light beam from the laser, and emitting parallel light through the light emitting surface of the first convex lens; 4. The light emitting module according to any one of claims 1 to 3, characterized in that, a first concave mirror arranged on the light emitting side of the first convex lens, for reflecting the light beam from the first convex lens to an optical fiber. The laser comprises: a semiconductor substrate; a first Bragg reflection layer, a quantum well layer and a second Bragg reflection layer arranged in sequence on the surface of the semiconductor substrate; an oxidation limiting layer arranged in the second Bragg reflection layer; a first electrode in contact with the second Bragg reflection layer and extending to the surface of the semiconductor substrate; a second electrode arranged on the surface of the semiconductor substrate and in contact with the first Bragg reflection layer; 5. The light launch module of claim 4, wherein, wherein the semiconductor substrate is arranged close to the first electric chip, and the number of the lasers is multiple, and the multiple lasers form a VCSEL array. The light emitting module further comprises a first connecting layer, which comprises: a silicon dielectric plate, a plurality of through holes are arranged in the silicon dielectric plate, the through holes extend from a first surface to a second surface of the silicon dielectric plate; the first surface is the surface of the silicon dielectric plate close to the first electric chip, and the second surface is the surface of the silicon dielectric plate close to the VCSEL array; 6. The light launch module of claim 5, wherein, wherein one end of the through hole is electrically connected to the first electric chip through a micro bump, and the other end of the through hole is electrically connected to the VCSEL array through a micro bump. Further comprising a rewiring layer; the rewiring layer is arranged between the silicon dielectric plate and the first electric chip, and the rewiring layer is electrically connected with the through hole in the silicon dielectric plate and the first electric chip respectively; or 7. The optical transmission module of claim 1, wherein, the rewiring layer is arranged between the silicon dielectric plate and the VCSEL array, and the rewiring layer is electrically connected with the through hole in the silicon dielectric plate and the VCSEL array respectively. Further comprising a first printed circuit board and a first packaging layer arranged in sequence, and the first electric chip is electrically connected with the first packaging layer; wherein the first printed circuit board and the first packaging layer are electrically connected through solder balls, and the first packaging layer and the first electric chip are electrically connected through bumps.

8. An optical interconnect structure, characterized by The optical transmitting module, the optical receiving module, and an optical fiber for connecting the optical transmitting module and the optical receiving module are included. The optical receiving module includes a second printed circuit board, a second packaging layer, a second electrical chip, a second connecting layer, and a photodetector array, the second electrical chip is electrically connected to the second printed circuit board through the second packaging layer, and is point-connected to the photodetector array through the second connecting layer.

9. The optical interconnection structure of claim 8, wherein, The second printed circuit board and the second packaging layer are electrically connected through solder balls, the second packaging layer and the second electrical chip are electrically connected through a bump, and the second electrical chip and the photodetector array are electrically connected through a micro-bump.

10. The optical interconnection structure of claim 8, wherein, Further comprising: a memory and a processor; a third connecting layer for connecting the memory and the optical transmitting module, and connecting the processor and the optical transmitting module; an exchange chip electrically connected to the second packaging layer.

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