Packaging structure of photoelectric detection chip

Abstract

The utility model provides a packaging structure of a photoelectric detection chip. The packaging structure comprises a packaging substrate, a photoelectric detection chip and a packaging insulator. Wherein the photoelectric detection chip is mounted in a preset packaging area of the packaging substrate, and a bump electrode with stable chemical property is formed on a front electrode, close to one side of the second conductive pad, of the front surface of the photoelectric detection chip; the bump electrode is used for being connected with a second conductive pad through a second conductive connector; the packaging insulator is at least packaged between the second conductive connector and the side wall of the photoelectric detection chip and between the second conductive connector and the non-active area of the photoelectric detection chip, so that the photoelectric detection chip is insulated from the second conductive connector. According to the utility model, the normal chip detection characteristic can be ensured on the basis of ensuring that the area of a dead zone introduced by packaging is small.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor packaging technology, and in particular to a packaging structure for a photoelectric detection chip. Background Technology

[0002] Chinese invention patent application CN115732430A, entitled “Packaging Structure and Packaging Method of Photoelectric Detection Chip”, discloses a packaging structure in which front electrodes are provided on the side of the chip near the second conductive pad and on the opposite side.

[0003] However, existing technologies have shortcomings in electrode connections, specifically: Firstly, because aluminum is used as the front electrode with a good contact surface on the photodetector chip, the aluminum reacts with oxygen in the air to form an aluminum oxide layer. This naturally formed aluminum oxide layer is uneven in thickness, which may cause the device to exhibit an open circuit or parasitic resistance at low voltages. Secondly, even with thorough development, SU-8 photoresist may leave a small amount of photoresist residue, producing the same effect. These two types of problems may affect the detection performance of the photodetector chip and easily lead to device failure during long-term use. In other words, the existing packaging structure has significant defects and cannot be considered a mature process for packaging photodetector chips.

[0004] Therefore, there is an urgent need to design a new packaging structure to reduce product failure rate without increasing additional costs. Utility Model Content

[0005] In view of this, the present invention provides a packaging structure for a photoelectric detection chip, which utilizes general packaging equipment to improve and perfect the existing solution without increasing additional costs, thereby reducing product failure rate.

[0006] One aspect of this utility model provides a packaging structure for a photoelectric detection chip, including a packaging substrate, a photoelectric detection chip, and a packaging insulator;

[0007] The front side of the packaging substrate is provided with a first conductive pad and a second conductive pad, and the back side is provided with a first electrode and a second electrode. The first conductive pad and the first electrode are connected by a first conductive bonding structure, and the second conductive pad and the second electrode are connected by a second conductive bonding structure.

[0008] The back side of the photodetector chip is provided with a back electrode. The back electrode is connected to the oppositely arranged first conductive pad through a first conductive connector, so that the photodetector chip is mounted on a predetermined packaging area of ​​the packaging substrate and the second conductive pad is exposed.

[0009] On the non-active area of ​​the front side of the photoelectric detection chip, there are front electrodes on the side near the second conductive pad and the opposite side, and a chemically stable bump electrode is formed on the front electrode near the second conductive pad; the bump electrode is used to connect to the second conductive pad through the second conductive connector.

[0010] An encapsulation insulator is disposed on the front side of the encapsulation substrate and is encapsulated at least between the second conductive connector and the sidewall of the photodetector chip and between the second conductive connector and the non-active area of ​​the photodetector chip, so as to insulate the photodetector chip from the second conductive connector.

[0011] In some embodiments of this utility model, the packaging structure further includes a protective layer, which is coated on the exposed front side of the packaging substrate, the front side of the photodetector chip, the second conductive connector, and the packaging insulator, forming a flat surface.

[0012] In some embodiments of this utility model, the protective layer is an insulating silicone potting compound protective layer with a thickness of 200-400 μm.

[0013] In some embodiments of this utility model, the non-active area on the front of the photodetector chip is located around the active area in the center of the photodetector chip, and its width is less than 100μm.

[0014] In some embodiments of this utility model, alignment marks are provided on the front side of the packaging substrate and the front side of the photodetector chip for positioning during chip mounting.

[0015] In some embodiments of this invention, the convex electrode is a gold ball formed by hot-pressing and ultrasonication.

[0016] In some embodiments of this utility model, the encapsulating insulator is a patterned epoxy insulator structure formed using photolithography.

[0017] In some embodiments of this utility model, the first conductive bonding structure and the second conductive bonding structure are conductive through holes.

[0018] In some embodiments of this utility model, the packaging structure further includes: a conductive material layer disposed on the front side of the packaging substrate for electrically connecting the second conductive bonding structure and the second conductive pad; and

[0019] An insulating dielectric layer covering the conductive material layer is used to isolate the back electrode and the second conductive pad of the photodetector chip.

[0020] In some embodiments of this utility model, the insulating dielectric layer is a photo-imaging solder resist ink layer.

[0021] The photoelectric detection chip packaging structure proposed in this invention, while retaining the advantages of the prior art, utilizes the relatively stable bump electrode formed on the front electrode to solve the problem of photoelectric detection chip characteristic degradation that may be caused by the existing packaging technology, thereby increasing the long-term stability of the finished device.

[0022] Additional advantages, objects, and features of this invention will be set forth in part in the description which follows, and will in part become apparent to those skilled in the art upon review of the description, or may be learned by practice of the invention. The objects and other advantages of this invention can be realized and obtained by means of the structures specifically pointed out in the description and drawings.

[0023] Those skilled in the art will understand that the objectives and advantages achievable with this invention are not limited to those specifically described above, and that the above and other objectives achievable with this invention will become clearer from the following detailed description. Attached Figure Description

[0024] The accompanying drawings, which are included to provide a further understanding of the present invention and form part of this application, do not constitute a limitation thereof. The components in the drawings are not drawn to scale but are merely for illustrating the principles of the present invention. For ease of illustration and description of certain parts of the present invention, corresponding portions in the drawings may be enlarged, i.e., may appear larger relative to other components in an exemplary device actually manufactured according to the present invention. In the drawings:

[0025] Figure 1 This is a cross-sectional view of the packaging structure of the photoelectric detection chip in one embodiment of the present invention.

[0026] Figure 2 This is a top view of the first encapsulation substrate in one embodiment of the present invention.

[0027] Figure 3 This is a cross-sectional view of the second encapsulation substrate in one embodiment of the present invention.

[0028] Explanation of reference numerals in the attached figures:

[0029] Packaging substrate 100; photodetector chip 200; packaging insulator 300; first conductive pad 111; second conductive pad 112; first electrode 121; second electrode 122; first conductive bonding structure 131; second conductive bonding structure 132; back electrode 210; front electrode 220; bump electrode 223; first conductive connector 410; second conductive connector 420; protective layer 500; insulating dielectric layer 600 Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the embodiments and accompanying drawings. Here, the illustrative embodiments and descriptions of this utility model are used to explain the present utility model, but are not intended to limit the present utility model.

[0031] It should also be noted that, in order to avoid obscuring the present invention with unnecessary details, only the structures and / or processing steps closely related to the solution according to the present invention are shown in the accompanying drawings, while other details that are not closely related to the present invention are omitted.

[0032] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, element, step, or component, but does not exclude the presence or addition of one or more other features, elements, steps, or components.

[0033] It should also be noted that, unless otherwise specified, the term "connection" in this article can refer not only to a direct connection, but also to an indirect connection involving an intermediary.

[0034] In the following description, embodiments of the present invention will be illustrated with reference to the accompanying drawings. In the drawings, the same reference numerals represent the same or similar parts, or the same or similar steps.

[0035] like Figure 1 As shown, the packaging structure of the photoelectric detection chip proposed in this application may include: a packaging substrate 100, a photoelectric detection chip (hereinafter referred to as the chip) 200, and a packaging insulator 300. The front side of the packaging substrate 100 is provided with a first conductive pad 111 and a second conductive pad 112, and the back side is provided with a first electrode 121 and a second electrode 122. The first conductive pad 111 and the first electrode 121 are connected by a first conductive bonding structure 131, and the second conductive pad 112 and the second electrode 122 are connected by a second conductive bonding structure 132.

[0036] A back electrode 210 is provided on the back side of the photodetector chip 200. The back electrode 210 is connected to the oppositely disposed first conductive pad 111 through a first conductive connector 410, so that the photodetector chip 200 is mounted on a predetermined packaging area of ​​the packaging substrate 100 and the second conductive pad 112 is exposed. Moreover, a front electrode 220 is provided on the non-active area of ​​the front side of the photodetector chip 200 near the second conductive pad 112 and on the opposite side, and a chemically stable bump electrode 223 is formed on the front electrode near the second conductive pad 112; the bump electrode 223 is used to connect to the second conductive pad 112 through the second conductive connector 420.

[0037] The encapsulation insulator 300 is disposed on the front side of the encapsulation substrate 100 and is encapsulated at least between the second conductive connector 420 and the sidewall of the photodetector chip 200 and between the second conductive connector 420 and the non-active area of ​​the photodetector chip 200, so as to insulate the photodetector chip 200 from the second conductive connector 420.

[0038] This application does not specifically limit the shape and position of the first conductive pad 111, the second conductive pad 112, the first electrode 121, and the second electrode 122. For example, as Figure 2 As shown, in the existing photoelectric detection chip packaging, two photoelectric detection chips are packaged in one cycle. Compared with the invention patent application with publication number CN115732430A, this application can set two independent second conductive pads 112 in one packaging cycle, which are used to connect different second conductive connectors 420 respectively.

[0039] In some embodiments of this invention, the first conductive bonding structure 131 and the second conductive bonding structure 132 may be conductive through-holes to achieve vertical connection between the conductive pads on the packaging substrate and the corresponding electrodes. For example, the conductive through-hole may be a conductive via penetrating the packaging substrate 100 (with conductive material attached to the hole wall connecting the top and bottom of the via), or it may be a conductive fill hole (e.g., a through-silicon via) penetrating the packaging substrate 100.

[0040] Since this application does not specifically limit the positions of the first conductive bonding structure 131 and the second conductive bonding structure 132, taking the first conductive bonding structure 131 as the first conductive via and the second conductive bonding structure 132 as the second conductive via as an example, assuming that the tops of both the first conductive via and the second conductive via are located on the front side of the packaging substrate, the packaging structure of this application can achieve the electrical connection between the chip 200 and the packaging substrate 100 through the following connection method:

[0041] The top of the first conductive via may be covered by the mounted chip 200 or exposed. If the top of the first conductive via is at least partially covered by the chip, the first conductive connector 410 electrically connects the back electrode 210 on the back of the chip to the first conductive pad 111, thereby achieving an electrical connection between the chip and the first electrode 121. If the top of the first conductive via is not partially covered by the chip (i.e. exposed), a conductive material layer is laid between the first conductive pad 111 and the top of the first conductive via for electrically connecting the first conductive pad 111 and the first conductive via.

[0042] Furthermore, the second conductive pad 112 is not covered by the chip. The top of the second conductive via can be covered by the mounted chip 200 or exposed. A conductive material layer can also be laid between the top of the second conductive via and the second conductive pad to form a current path.

[0043] In some embodiments of this invention, the packaging structure further includes: a conductive material layer disposed on the front side of the packaging substrate for electrically connecting the second conductive bonding structure 132 and the second conductive pad 112; and an insulating dielectric layer 600 covering the conductive material layer for isolating the back electrode 210 of the photodetector chip and the second conductive pad 112. For example, if the second conductive via is located between the chip sidewall near the second conductive pad 112 and the second conductive pad 112, a conductive material layer can be disposed to electrically isolate the first conductive pad 111 and the second conductive pad 112. Furthermore, the insulating dielectric layer 600 can be a photoimaging solder resist ink layer or an insulating layer prepared from other insulating materials.

[0044] As an example, if the second conductive via is covered by the chip, the insulating dielectric layer can be used to electrically isolate the back electrode 210 and the second conductive via.

[0045] The above-mentioned conductive through-hole is only an example. The first conductive bonding structure 131 and the second conductive bonding structure 132 can also be bonding structures such as leads. This application is not limited to this.

[0046] In some embodiments of this invention, alignment marks are provided on both the front side of the packaging substrate and the front side of the chip. These alignment marks are used for chip positioning during the chip mounting process. The packaging equipment can place the chip into a predetermined packaging area by aligning the alignment marks on the front side of the packaging substrate and the alignment marks on the front side of the chip, thereby achieving subsequent electrical connection.

[0047] The packaging structure of this application can minimize the ineffective area after packaging the optoelectronic device, and the non-active area on the front side of the chip is located around the active area of ​​the chip. Therefore, the width of the non-active area of ​​the chip applicable in this application can be less than 100μm, thereby achieving narrow-edge packaging. Moreover, the front electrode located in the non-active area of ​​the chip can also be set close to the active area of ​​the chip.

[0048] Ultrasonic welding utilizes high-frequency vibration waves transmitted to the surfaces of two objects to be welded. Under pressure, the surfaces rub against each other, forming a fusion between molecular layers. In the process of fabricating bump electrodes on the front electrode using pressure welding, any existing photoresist and aluminum oxide layers are destroyed, allowing the bump electrodes to fuse directly with the aluminum metal used to fabricate the front electrode. This results in stable bump electrodes exposed to air without easily deforming. For example, in this application, gold, which has good stability, can be used to fabricate the bump electrodes, and gold balls can be formed on the front electrode near the second conductive pad 112 using a thermo-press ultrasonic method.

[0049] The gold spheres used as bump electrodes described above are merely an example. For instance, bump electrodes could also be conical electrodes made of copper. This application does not specifically limit the shape, material, or method of fabrication of the bump electrodes; any chemically stable conductive material can be used. For example, gold-plated copper spheres can also be used as bump electrodes. Furthermore, since the front electrode on the side furthest from the second conductive pad 112 is not used during chip probing, bump electrodes do not need to be formed on it.

[0050] As an example, the first conductive connector 410 and the second conductive connector 420 can be connection structures prepared by conductive silver paste or conductive silver glue made of spherical silver particles.

[0051] Furthermore, such as Figure 3 As shown, the encapsulation insulator 300 can be used to connect the encapsulation substrate and the non-active area of ​​the chip to electrically isolate the chip 200 from the second conductive connector 420. The encapsulation insulator 300 is encapsulated at least between the second conductive connector 420 and the non-active area of ​​the chip with the bump electrode side, and between the second conductive connector 420 and the chip sidewall near the second conductive pad side, to isolate the second conductive connector 420 from the chip 200. That is, the second conductive connector 420 can cross the sidewall of the encapsulation insulator to connect the bump electrode and the second conductive pad 112. In addition, the encapsulation insulator can also be disposed around the chip 200 to form an insulating structure coated on the chip sidewall and the non-active area of ​​the chip. For example, the encapsulation insulator can also include an insulator disposed on the side away from the second conductive pad, connecting the non-active area of ​​the chip and the encapsulation substrate.

[0052] As an example, the encapsulation insulator in this application can be a patterned epoxy insulator structure formed using photolithography. For instance, the encapsulation insulator can be prepared using SU-8 epoxy near-ultraviolet curable negative photoresist.

[0053] In some embodiments of this application, the packaging structure proposed in this application further includes a protective layer 500, which is coated on the exposed front side of the packaging substrate, the exposed front side of the photodetector chip, the exposed second conductive connector, and the exposed packaging insulator, and forms a flat surface.

[0054] As an example, the protective layer 500 can be an insulating silicone potting compound protective layer with a thickness of 200–400 μm. The protective layer 500 is used to protect the packaging structure of the photoelectric detection chip proposed in this application, and other materials that can provide protection can also be used to prepare the protective layer 500.

[0055] This application utilizes common equipment and processes in packaging plants to fabricate bump electrodes and combines them with existing processes. Therefore, the packaging structure of the photoelectric detection chip proposed in this application retains the advantages of existing technologies without increasing labor and equipment costs. It also solves the problems of open circuits and parasitic resistance caused by existing technologies, resolves the potential degradation of photoelectric detection chip characteristics caused by existing packaging technologies, and increases the long-term stability of finished devices.

[0056] The packaging structure of the photoelectric detector chip proposed in this application can be obtained by the following methods:

[0057] Step S01: As Figure 2 As shown, according to the alignment marks, the chip 200 is mounted on a predetermined packaging area on the pre-prepared packaging substrate 100 to form a first packaging substrate, such that the back side of the photodetector chip 200 is in contact with the front side of the packaging substrate 100. In this step, since bump electrodes have not yet been formed on the front electrode of the chip, the front electrodes provided on both opposite sides of the front of the chip can reduce the mounting error caused by rotating the chip.

[0058] Step S02: Using a gold wire bonding machine, metal bumps are implanted onto the front electrode of the photodetector chip near the second conductive pad using a thermo-ultrasonic bonding method. Furthermore, a patterned encapsulation insulator is formed on the first encapsulation substrate using photolithography to obtain the second encapsulation substrate. For example... Figure 3 As shown, the encapsulation insulator can effectively cover part or all of the non-active areas of the side and top surface edge of the photodetector chip.

[0059] Step S03: A second conductive connector is formed on the second package substrate along at least a portion of the surface of the package insulator to electrically connect the bump electrode and the second conductive pad, thereby obtaining a third package substrate.

[0060] As an example, the height of the second conductive connector 420 may be slightly higher than that of the encapsulation insulator 300, and the structure of the second conductive connector may completely cover the second conductive pad 112 and the bump electrode.

[0061] Step S04: Coat a layer of silicone potting compound protective layer on the surface of the third packaging substrate to obtain the packaging structure of the photoelectric detection chip.

[0062] The aforementioned packaging method is applicable to packaging two photodetector chips as a cycle. After packaging, the packaged chip array is diced along the designed dicing position to obtain independent packaging units corresponding to each photodetector chip. Furthermore, the above packaging method is also applicable to packaging a single photodetector chip as a cycle, directly obtaining independent packaging units. In addition, in step S02 of the above packaging method, a bump electrode can be formed on the front electrode of the chip before forming the encapsulation insulator using photolithography, or the encapsulation insulator can be formed using photolithography before forming the bump electrode on the front electrode of the chip (resulting in better electrical connection). This application does not specifically limit the execution order of the packaging method steps.

[0063] Except for the bump electrodes on the front electrode of the chip, the structure, materials and methods of other parts of the packaging structure in this application are consistent with those in the invention patent application with publication number CN115732430A.

[0064] It should be clarified that this utility model is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this utility model is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this utility model.

[0065] In this invention, features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, and / or combined with or in place of features of other embodiments.

[0066] The above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. For those skilled in the art, various modifications and variations can be made to the embodiments of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A packaging structure for a photoelectric detection chip, characterized in that, Includes packaging substrate, photodetector chip, and packaging insulator; The front side of the packaging substrate is provided with a first conductive pad and a second conductive pad, and the back side is provided with a first electrode and a second electrode. The first conductive pad and the first electrode are connected by a first conductive bonding structure, and the second conductive pad and the second electrode are connected by a second conductive bonding structure. The back side of the photodetector chip is provided with a back electrode, which is connected to the first conductive pad opposite to it through a first conductive connector, so that the photodetector chip is mounted on a predetermined packaging area of ​​the packaging substrate and the second conductive pad is exposed. The photoelectric detection chip has front electrodes on the non-active areas on the side near the second conductive pad and the opposite side, and a chemically stable bump electrode is formed on the front electrode near the second conductive pad; the bump electrode is used to connect to the second conductive pad through the second conductive connector. The encapsulation insulator is disposed on the front side of the encapsulation substrate and is encapsulated at least between the second conductive connector and the sidewall of the photodetector chip and between the second conductive connector and the non-active area of ​​the photodetector chip, so as to insulate the photodetector chip from the second conductive connector.

2. The packaging structure according to claim 1, characterized in that, The packaging structure also includes a protective layer, which is coated on the exposed front side of the packaging substrate, the front side of the photodetector chip, the second conductive connector, and the packaging insulator, forming a flat surface.

3. The packaging structure according to claim 2, characterized in that, The protective layer is an insulating silicone potting compound protective layer with a thickness of 200–400 μm.

4. The packaging structure according to claim 1, characterized in that, The non-active area on the front of the photodetector chip is located around the active area in the center of the photodetector chip, and its width is less than 100μm.

5. The packaging structure according to claim 1, characterized in that, Alignment marks are provided on the front side of both the packaging substrate and the front side of the photodetector chip for positioning during chip mounting.

6. The packaging structure according to claim 1, characterized in that, The protruding electrode is a gold ball formed using a hot-pressing ultrasonic method.

7. The packaging structure according to claim 1, characterized in that, The encapsulation insulator is a patterned epoxy insulator structure formed using photolithography.

8. The packaging structure according to claim 1, characterized in that, The first conductive bonding structure and the second conductive bonding structure are conductive through holes.

9. The packaging structure according to claim 8, characterized in that, The packaging structure further includes: a conductive material layer disposed on the front side of the packaging substrate for electrically connecting the second conductive bonding structure and the second conductive pad; and An insulating dielectric layer covering the conductive material layer is used to isolate the back electrode and the second conductive pad of the photodetector chip.

10. The packaging structure according to claim 9, characterized in that, The insulating dielectric layer is a photo-imaging solder resist ink layer.

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