Equipment automatic addressing circuit and equipment automatic addressing system based on CAN (Controller Area Network) and IO (Input / Output)
By using a CAN and IO-based automatic device addressing circuit and a broadcast message and response mechanism, the limitations of node device address conflicts and master node settings are resolved, and the automatic determination and uniqueness of node device addresses are achieved.
Patent Information
- Application Number
- CN202520358400.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-03
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2035-03-03
AI Technical Summary
The existing node device addressing method has problems such as address conflicts or the need to set a master node with an inconsistent address.
It adopts a device automatic addressing circuit based on CAN and IO, and automatically determines the address according to the connection position of the node device through broadcast messages and response mechanism, avoiding static addressing and master node setting.
It enables automatic determination of node device addresses without prior static addressing or setting a master node, solving the problems of address conflicts and non-fixed addresses. Node devices with simple structures and identical functions can determine their addresses based on their connection locations.
Smart Images
Figure CN223829334U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the field of CAN node device addressing technology, specifically relating to an automatic device addressing circuit and an automatic device addressing system based on CAN and IO. Background Technology
[0002] As business operations become increasingly complex, single modules often fall short of requirements, and in practice, a system typically requires the combined use of multiple modules. These modules interact through communication, such as via a CAN bus. A CAN bus network often contains several to dozens of nodes (these modules are called communication nodes in the network context). Communication between multiple nodes on a CAN network requires each node to have a unique ID (i.e., a communication address). There are generally two main methods for setting communication addresses.
[0003] One type of method is static setting, and common methods are as follows: hard-writing the address directly in the program; configuring the address for the device one-to-one through software tools; configuring the address through circuitry (using DIP switches or optional resistors).
[0004] Another approach is dynamic setting. Common methods are as follows: Set a master node. After the device is powered on, the master node initiates address negotiation or directly assigns addresses to other nodes. After the device is powered on, each node randomly calculates and generates an address and then broadcasts the message. If a duplicate address is found, the node with the duplicate address regenerates a random address and broadcasts the message again until all nodes obtain a unique address.
[0005] Both of the above methods have certain limitations:
[0006] Static settings require configuring the addresses of all nodes in the same network before the device is used, and users must manually ensure that all node addresses are unique. When adding nodes later, users also need to ensure that the addresses of the new nodes do not conflict with the addresses of nodes already in the network.
[0007] Dynamic settings either require a special master node, or the obtained address is random, requiring the user to determine the current working address of each node through certain methods.
[0008] Therefore, the existing node device addressing method has technical problems such as the potential for address conflicts when setting static addresses in advance, or the need to set a master node when setting addresses dynamically, and the obtained address is not fixed. Utility Model Content
[0009] In order to solve the technical problems mentioned in the background art, this utility model provides a device automatic addressing circuit and device automatic addressing system based on CAN and IO.
[0010] This utility model provides an automatic device addressing circuit based on CAN and IO, including:
[0011] Several sequentially connected devices to be addressed; among them
[0012] The input terminal of the first device to be addressed is connected to the bus device via the CAN communication bus;
[0013] The input terminals of each of the remaining addressable devices are connected to the output terminal of the preceding adjacent addressable device, and their output terminals are connected to the input terminal of the next adjacent addressable device; and
[0014] When a device to be addressed is triggered to be addressed, it is suitable to send a broadcast message to the CAN communication bus and receive the response from the device that has completed addressing. After obtaining the address based on the response result, it triggers the next device to be addressed to start addressing.
[0015] Furthermore, the input terminals of the device to be addressed include: a signal input pin, a CANH input pin, and a CANL input pin; its output terminals include: a signal output pin, a CANH output pin, and a CANL output pin; the CANH input pin and CANL input pin of the first device to be addressed are connected to the bus device via the CAN communication bus; and
[0016] The signal input pins of each of the remaining devices to be addressed are connected to the signal output pins of the previous device to be addressed, and the signal output pins are connected to the signal input pins of the next device to be addressed.
[0017] Furthermore, the input terminal of the device to be addressed also includes a power connection input pin and a ground input pin, and its output terminal also includes a power connection output pin and a ground output pin;
[0018] The power input pin and ground input pin of the first device to be addressed are connected to the power supply; and
[0019] The power input pins and ground input pins of each of the other devices to be addressed are connected to the power output pins and ground output pins of the previous device to be addressed, and the power output pins and ground output pins are connected to the power input pins and ground input pins of the next device to be addressed.
[0020] Furthermore, the device to be addressed is equipped with a controller.
[0021] The controller's detection pin is connected to the signal input pin of the corresponding addressable device, and is also connected to ground via a pull-down resistor;
[0022] The controller's output pins are connected to the signal output pins of the corresponding addressable device, and simultaneously connected to the power supply via pull-up resistors; and
[0023] When the controller detects that the signal input pin is low, it triggers the corresponding addressable device to start addressing.
[0024] Furthermore, the pull-down resistor value is at least 10 times the pull-up resistor value.
[0025] In another aspect, this utility model also provides an automatic device addressing system based on CAN and IO, including: a bus device; a power supply; and the automatic device addressing circuit as described above.
[0026] The beneficial effects of this utility model are that the automatic device addressing circuit based on CAN and IO has a simple structure and can determine the address based on the connection position of the node device without prior static addressing or setting a master node. This solves the problems of address conflicts or the need to set a master node and the obtained address being unstable in existing node device addressing methods. Attached Figure Description
[0027] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0028] Figure 1 These are circuit diagrams of CAN and IO-based automatic device addressing circuits (including 3 addressable devices) provided in some embodiments;
[0029] Figure 2 These are schematic diagrams of the device to be programmed provided in some embodiments;
[0030] Figure 3 These are circuit diagrams of CAN and IO-based automatic device addressing circuits (including single addressable devices) provided in some embodiments;
[0031] Figure 4 These are circuit diagrams of CAN and IO-based automatic device addressing circuits (including 5 addressable devices) provided in some embodiments;
[0032] Figure 5 These are some embodiments of a CAN and I / O-based automatic device addressing circuit (including 3 addressable devices, and...) Figure 1 A circuit diagram (where the three devices are in different locations);
[0033] Figure 6 These are schematic diagrams of an automatic device addressing system based on CAN and IO provided in some embodiments. Detailed Implementation
[0034] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the present invention, and therefore only show the components relevant to the present invention.
[0035] like Figure 1 As shown, this disclosure provides an automatic device addressing circuit based on CAN and IO, including: a plurality of sequentially connected devices to be addressed; wherein the input terminal of the first device to be addressed is connected to a bus device via a CAN communication bus; the input terminals of the remaining devices to be addressed are connected to the output terminals of their adjacent previous devices to be addressed, and their output terminals are connected to the input terminals of their adjacent next devices to be addressed; and when a device to be addressed is triggered to be addressed, it is adapted to send a broadcast message to the CAN communication bus and receive the response from the device that has completed addressing, so as to obtain the address based on the response result and trigger the next device to be addressed to start addressing.
[0036] Specifically, the automatic addressing circuit for devices based on CAN and IO in this embodiment has a simple structure and can determine the address based on the connection position of the node device without prior static addressing or setting a master node. This solves the problems of address conflicts or the need to set a master node and obtain an unstable address in existing node device addressing methods.
[0037] In some embodiments, the input terminals of the device to be addressed include: signal input pin DI, CANH input pin, and CANL input pin, and its output terminals include: signal output pin DO, CANH output pin, and CANL output pin; the CANH input pin and CANL input pin of the first device to be addressed are connected to the bus device via the CAN communication bus; and the signal input pin DI of each of the remaining devices to be addressed is connected to the signal output pin DO of the adjacent previous device to be addressed, and the signal output pin DO is connected to the signal input pin DI of the adjacent next device to be addressed.
[0038] In some embodiments, the input terminal of the device to be addressed further includes: a power connection input pin VCC and a ground input pin GND, and its output terminal further includes: a power connection output pin VCC and a ground output pin GND; the power connection input pin VCC and the ground input pin GND of the first device to be addressed are connected to the power supply; and the power connection input pin VCC and the ground input pin GND of each of the remaining devices to be addressed are connected to the power connection output pin VCC and the ground output pin GND of the adjacent previous device to be addressed, and the power connection output pin VCC and the ground output pin GND are connected to the power connection input pin VCC and the ground input pin GND of the adjacent next device to be addressed.
[0039] In some embodiments, the device to be addressed has an internal controller; the detection pin of the controller is connected to the signal input pin DI of the corresponding device to be addressed, and is also connected to ground via a pull-down resistor; the output pin of the controller is connected to the signal output pin DO of the corresponding device to be addressed, and is also connected to the power supply via a pull-up resistor; and when the controller detects that the signal input pin DI is low, it triggers the corresponding device to be addressed to start addressing.
[0040] In some embodiments, the pull-down resistor value is at least 10 times the pull-up resistor value.
[0041] Specifically, such as Figure 2 As shown, the power supply and communication of the device to be addressed are mainly divided into two parts: Input and Output. VCC and GND are the power supply terminal and ground terminal, respectively; CANH and CANL are the communication lines of the CAN bus. DI is the signal input pin, connected to the internal controller of the device to detect its level value. When there is no external connection, it presents a low level due to the pull-down resistor in the circuit. DO is the signal output pin, which presents a high level when there is no external connection and the controller is not outputting, due to the pull-up resistor in the circuit.
[0042] In the following description, the pull-up resistor is, for example, but not limited to, 10kΩ, and the pull-down resistor is, for example, but not limited to, 100kΩ.
[0043] In some embodiments, the CAN and IO-based automatic device addressing circuit may include only a single device to be addressed, such as... Figure 3 As shown, the automatic addressing process at this time is as follows:
[0044] When there is only a single device to be addressed, the signal input pin DI is floating. When the circuit is powered on, the device to be addressed detects that the signal input pin DI is low and begins the addressing process (if the signal input pin DI is high, no action is taken). The device to be addressed broadcasts a message with its broadcast address to the CAN bus (devices that have already obtained an address will respond with their own address upon receiving this broadcast message). Because no other device on the bus has obtained an address at this time, no device will respond. Upon finding no response, the device to be addressed sets its own address to the starting address 1. After the device obtains an address, the control signal output pin DO goes low.
[0045] In some embodiments, the CAN and IO-based automatic device addressing circuit may include multiple devices to be addressed, such as three addressable devices. Figure 1 As shown, the automatic addressing process at this time is as follows:
[0046] The three devices to be addressed are named Device A, Device B, and Device C. When the circuit is powered on, Device A's state is the same as that of a single device. However, Device B's signal input pin DI is connected to Device A's signal output pin DO, because the pull-up resistor is much smaller than the pull-down resistor. At this time, device B detects that the signal input pin DI is at a high level, and device C similarly detects that the signal input pin DI is at a high level.
[0047] Based on the principle of automatic addressing for a single device, devices B and C do not perform any action because they detect that the signal input pin DI is high. Device A detects that the signal input pin DI is low, starts addressing, sends a broadcast message (which receives no response), and ultimately obtains address 1. It then outputs its signal output pin DO low. Because device A's signal output pin DO goes low, device B detects that the signal input pin DI is now low and starts addressing, sending a broadcast message. Since device A has already obtained an address, it responds. Ultimately, device B finds that address 1 is already in use, so it sets its address to 2 and outputs its signal output pin DO low. Next, device C detects that the signal input pin DI is now low, starts addressing, and sends a broadcast message. Devices A and B, having already obtained addresses, respond. Ultimately, device C finds that addresses 1 and 2 are already in use, so it sets its address to 3 and outputs its signal output pin DO low. This completes the addressing of these three devices.
[0048] When more devices are connected, such as Figure 4 As shown, if there are 5 devices, devices A to E, then according to the aforementioned addressing process, it can be deduced that devices A to E are automatically addressed to address 1, address 2, address 3, address 4 and address 5 respectively.
[0049] In some embodiments, when the locations of devices are swapped, each device will re-determine its address based on the swapped location relationship, such as... Figure 5 As shown, after swapping the positions of the three devices, device C is automatically assigned the address 1, device A is automatically assigned the address 2, and device B is automatically assigned the address 3.
[0050] In summary, the automatic device addressing circuit based on CAN and IO in this embodiment is not only simple in structure, but also does not require prior static addressing. The hardware and software functions of the addressing part are completely identical for all node devices in the network, without distinguishing between master and slave. It can determine the address based on the connection position of the node device, thus solving the limitations of existing node device addressing methods.
[0051] like Figure 6As shown, some embodiments also provide a CAN and IO-based automatic device addressing system, including: a bus device; a power supply; and the automatic device addressing circuit as described above.
[0052] Specifically, this embodiment improves the automatic addressing circuit for the device. However, since the bus device and power supply are both existing technologies, this embodiment does not make any improvements to the specific circuits or structures of the bus device and power supply.
[0053] Based on the above-described preferred embodiments of this utility model, and through the foregoing description, those skilled in the art can make various changes and modifications without departing from the technical concept of this utility model. The technical scope of this utility model is not limited to the contents of the specification, but must be determined according to the scope of the claims.
Claims
1. A device automatic addressing circuit based on CAN and IO, characterized in that, include: Several sequentially connected devices to be addressed; in The input terminal of the first device to be addressed is connected to the bus device via the CAN communication bus; The input terminals of each of the remaining addressable devices are connected to the output terminals of the previous addressable device, and their output terminals are connected to the input terminals of the next addressable device. as well as When a device to be addressed is triggered to be addressed, it is suitable to send a broadcast message to the CAN communication bus and receive the response from the device that has completed addressing. After obtaining the address based on the response result, it triggers the next device to be addressed to start addressing.
2. The automatic device addressing circuit based on CAN and IO according to claim 1, characterized in that, The input terminals of the device to be addressed include: a signal input pin, a CANH input pin, and a CANL input pin; its output terminals include: a signal output pin, a CANH output pin, and a CANL output pin. The CANH and CANL input pins of the first device to be addressed are connected to the bus device via the CAN communication bus; and The signal input pins of each of the remaining devices to be addressed are connected to the signal output pins of the previous device to be addressed, and the signal output pins are connected to the signal input pins of the next device to be addressed.
3. The automatic device addressing circuit based on CAN and IO according to claim 2, characterized in that, The input terminal of the device to be addressed further includes: a power connection input pin and a ground input pin, and its output terminal further includes: a power connection output pin and a ground output pin; The power input pin and ground input pin of the first device to be addressed are connected to the power supply; and The power input pins and ground input pins of each of the other devices to be addressed are connected to the power output pins and ground output pins of the previous device to be addressed, and the power output pins and ground output pins are connected to the power input pins and ground input pins of the next device to be addressed.
4. The automatic device addressing circuit based on CAN and IO according to claim 3, characterized in that, The device to be addressed is equipped with a controller; The controller's detection pin is connected to the signal input pin of the corresponding addressable device, and is also connected to ground via a pull-down resistor; The controller's output pins are connected to the signal output pins of the corresponding addressable device, and simultaneously connected to the power supply via pull-up resistors; and When the controller detects that the signal input pin is low, it triggers the corresponding addressable device to start addressing.
5. The automatic device addressing circuit based on CAN and IO according to claim 4, characterized in that, The pull-down resistor value is at least 10 times the pull-up resistor value.
6. An automatic device addressing system based on CAN and IO, characterized in that, include: Bus devices; Power supply; as well as The automatic addressing circuit for the device as described in any one of claims 1-5.