Radio frequency amplifier

Abstract

The utility model provides a radio frequency amplifier. The radio frequency amplifier includes a first plurality of transistors, a first input metal layer, and a second input metal layer. The plurality of transistors are arranged along a first direction. The first portion of the first input metal layer and the first portion of the second input metal layer are not overlapped with each other. The second portion of the first input metal layer and the first portion of the second input metal layer are cross-coupled to each other. A radio frequency input signal passes through the first portion of the first input metal layer and the second portion of the first input metal layer in sequence to a plurality of control terminals of the first plurality of transistors. A DC bias signal is transmitted to the plurality of control terminals of the plurality of first transistors through the first portion of the second input metal layer and the second portion of the second input metal layer in sequence. The radio frequency amplifier provided by the utility model can reduce third-order intermodulation distortion (IM3.

Description

TECHNICAL FIELD

[0001] The utility model relates to a circuit design technology of communication, and especially relates to a radio frequency amplifier. BACKGROUND

[0002] In the hardware circuit of wireless communication technology, radio frequency amplifier is often used to amplify the power of radio frequency (RF) signal sent to the base station. The radio frequency amplifier usually has a multi-stage amplifier circuit structure, and each stage of amplifier has a matching circuit to transmit signals.

[0003] Based on the radio frequency amplifier, coupling capacitance may be generated between different signal paths in the circuit layout in the multi-layer wiring structure. If the value of these coupling capacitances is too large, it will seriously affect the operation quality of the radio frequency amplifier, for example, it will increase the third-order intermodulation distortion (IM3) in the radio frequency amplifier, thereby reducing the processing performance of the radio frequency amplifier for RF signals. SUMMARY

[0004] The utility model provides a radio frequency amplifier can reduce third-order intermodulation distortion (IM3).

[0005] The radio frequency amplifier of the utility model includes a first plurality of transistors, a first input metal layer and a second input metal layer. The first plurality of transistors is arranged along a first direction. The first input metal layer is used to receive a radio frequency input signal. The first input metal layer has a first part and a second part. The second input metal layer is used to receive a direct current bias signal. The second input metal layer has a first part and a second part. The first part of the first input metal layer and the first part of the second input metal layer do not overlap each other. The second part of the first input metal layer and the first part of the second input metal layer are staggered and coupled to each other. The radio frequency input signal is sequentially transmitted to a plurality of control ends of the first plurality of transistors through the first part of the first input metal layer and the second part of the first input metal layer. The direct current bias signal is sequentially transmitted to the plurality of control ends of the first plurality of transistors through the first part of the second input metal layer and the second part of the second input metal layer.

[0006] In the embodiment of the utility model, the radio frequency amplifier further includes a plurality of capacitors arranged along the first direction, wherein one end of each of the plurality of capacitors is coupled to the second part of the first input metal layer; and a plurality of resistors arranged along the first direction, wherein one end of each of the plurality of resistors is coupled to the second part of the second input metal layer.

[0007] In the embodiment of the utility model, the projection of the multiple capacitors and the multiple resistors along the first direction overlaps each other.

[0008] In the embodiment of the utility model, the first part of the first input metal layer and the first part of the second input metal layer extend along the second direction, and the second part of the first input metal layer and the second part of the second input metal layer extend along the first direction, the second part of the second input metal layer has a first width in the second direction, and the first part of the second input metal layer has a second width in the first direction, wherein the first width is less than the second width.

[0009] In the embodiment of the utility model, the first part of the second input metal layer is arranged between the first part of the first input metal layer and the first multiple transistors.

[0010] In the embodiment of the utility model, the radio frequency amplifier further includes a first transistor, multiple capacitors and multiple resistors, wherein the multiple control ends of each of the first multiple transistors receive the radio frequency input signal through the multiple capacitors and receive the direct current bias signal from the first end of the first transistor through the multiple resistors.

[0011] In the embodiment of the utility model, the radio frequency amplifier further includes a second multiple transistors arranged along the first direction, wherein the first input metal layer further includes a third part and a fourth part, and the second input metal layer further includes a third part and a fourth part, wherein the third part of the first input metal layer and the third part of the second input metal layer do not overlap each other, wherein the fourth part of the first input metal layer and the third part of the second input metal layer are staggered and coupled to each other, wherein the radio frequency input signal is sequentially transmitted to the multiple control ends of the second multiple transistors through the third part of the first input metal layer and the fourth part of the first input metal layer, and wherein the direct current bias signal is sequentially transmitted to the multiple control ends of the second multiple transistors through the third part of the second input metal layer and the fourth part of the second input metal layer.

[0012] In the embodiment of the utility model, the radio frequency amplifier further includes: a third plurality of transistors arranged along the first direction; a fourth plurality of transistors arranged along the first direction; and a third input metal layer for receiving the radio frequency input signal, having a first part, a second part, a third part and a fourth part, wherein the second input metal layer further includes a fifth part, a sixth part, a seventh part and an eighth part, wherein the first part and the third part of the third input metal layer and the fifth part and the seventh part of the second input metal layer do not overlap each other, wherein the second part of the third input metal layer and the fifth part of the second input metal layer are staggered and coupled to each other respectively, and the seventh part of the third input metal layer and the seventh part of the second input metal layer are staggered and coupled to each other respectively, wherein the radio frequency input signal is sequentially transmitted to the plurality of control ends of the third plurality of transistors through the first part of the third input metal layer and the second part of the third input metal layer, wherein the direct current bias signal is sequentially transmitted to the plurality of control ends of the third plurality of transistors through the fifth part of the second input metal layer and the sixth part of the second input metal layer, wherein the radio frequency input signal is sequentially transmitted to the plurality of control ends of the fourth plurality of transistors through the third part of the third input metal layer and the fourth part of the third input metal layer, and wherein the direct current bias signal is sequentially transmitted to the plurality of control ends of the fourth plurality of transistors through the fifth part of the second input metal layer, the seventh part of the second input metal layer and the eighth part of the second input metal layer.

[0013] In the embodiment of the utility model, the second part of the second input metal layer, the second part of the first input metal layer, the fourth part of the first input metal layer, the fourth part of the second input metal layer, the sixth part of the second input metal layer, the second part of the third input metal layer, the fourth part of the third input metal layer and the eighth part of the second input metal layer are sequentially arranged in the second direction.

[0014] In the embodiment of the utility model, the radio frequency amplifier is arranged on a substrate, and along the direction perpendicular to the substrate, the area where the second part of the first input metal layer and the first part of the second input metal layer are staggered and coupled to each other has a first projection area on the second input metal layer, the area where the fourth part of the first input metal layer and the third part of the second input metal layer are staggered and coupled to each other has a second projection area on the second input metal layer, and the first projection area and the second projection area account for 15% to 25% of the total area of the first part and the third part of the second input metal layer.

[0015] In the embodiment of the present application, the first portion of the third input metal layer, the fifth portion of the second input metal layer and the third plurality of transistors are sequentially arranged in the first direction, and wherein the third portion of the third input metal layer, the seventh portion of the second input metal layer and the fourth plurality of transistors are sequentially arranged in the first direction.

[0016] In the embodiment of the present application, the first input metal layer and the third input metal layer are the same metal layer.

[0017] In order to make the above features and advantages of the present application more obvious and easy to understand, the following embodiments are described in detail below, and the detailed description is as follows with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 is a schematic diagram of an amplifier device according to an embodiment of the present application;

[0019] Figure 2 is a circuit layout diagram of a radio frequency amplifier according to a first embodiment of the present application;

[0020] Figure 3 is a circuit layout diagram of a radio frequency amplifier according to a second embodiment of the present application;

[0021] Figure 4 is a circuit layout diagram of a radio frequency amplifier according to a third embodiment of the present application. DETAILED DESCRIPTION

[0022] Figure 1 is a schematic diagram of an amplifier device 10 according to an embodiment of the present application. The amplifier device 10 can be a power amplifier for wireless communication. The amplifier device 10 can be composed of multiple stages of power amplifiers. For example, the amplifier device 10 includes a first stage power amplifier 102, a second stage power amplifier (implemented by transistors TPA2 and bias circuit 107), and a third stage power amplifier (implemented by a radio frequency amplifier 100 and a bias circuit 105). There is also a matching circuit IM1 between the first stage power amplifier 102 and the second stage power amplifier, and a matching circuit IM2 between the second stage power amplifier and the third stage power amplifier. The radio frequency amplifier 100 can include multiple transistors T1X, resistors R1X and capacitors C1X. The bias circuit 105 can include transistors TB1, TB2 and TB3. In this embodiment, the bias circuits 105 and 107 generate bias signals to the corresponding second stage power amplifier and third stage power amplifier according to the reference voltage VREF1, the reference voltage VREF2, and the components in the bias circuits 105 and 107.

[0023] The output end RFINC1 of the first-stage power amplifier 102 is connected to the control end of the transistor TPA2 in the second-stage power amplifier through a matching circuit IM1 to provide a radio frequency signal to the radio frequency input end RFIN of the radio frequency amplifier 100 in the third-stage power amplifier. The radio frequency amplifier 100 in the present application is not limited to the third-stage power amplifier, but can also be designed in the second-stage power amplifier in an embodiment. For the convenience of description, the third-stage power amplifier is taken as an example for description in the following.

[0024] The radio frequency amplifier 100 has two signal paths, namely a direct current bias path DCP and a radio frequency input path RFP. The direct current bias path DCP obtains a reference voltage VREF2 (for example, a system voltage VCC) from the transistor TB1 in the bias circuit 105, and provides a bias signal to the control end (for example, the base end) of the plurality of transistors T1X in the radio frequency amplifier 100 through a resistor R1X. The radio frequency input path RFP obtains a radio frequency signal provided by the second-stage power amplifier from the radio frequency input end RFIN, and provides the radio frequency signal to the control end (the base end) of the plurality of transistors T1X in the radio frequency amplifier 100 through a capacitor C1X.

[0025] If the direct current bias path DCP and the radio frequency input path RFP are arranged relatively close to each other, a coupling capacitor Ccoup is formed. For example, the first conductive layer used to arrange the radio frequency input path RFP and the second conductive layer used to arrange the direct current bias path DCP are designed to overlap most of the time, so that the coupling capacitor Ccoup has a relatively large capacitance value, thereby improving the third-order intermodulation distortion (IM3) in the radio frequency amplifier.

[0026] On the contrary, if the direct current bias path DCP and the radio frequency input path RFP are arranged far away from each other without the coupling capacitor Ccoup, the adaptive bias function is lost. However, the coupling capacitor Ccoup affects the control end (for example, the bias signal Vx) of the transistor TB1 with the radio frequency signal on the radio frequency input path RFP. In other words, the coupling capacitor Ccoup enables the radio frequency amplifier 100 to maintain its adaptive bias function, but causes a large change in the voltage VBE2 between the base end and the emitter end of the transistor TB1.

[0027] The radio frequency amplifier 100 in the present application adjusts the size and relative position of the overlapping area (for example, the interleaved coupling area) between the radio frequency input path RFP and the direct current bias path DCP in the radio frequency amplifier 100, thereby reducing the third-order intermodulation distortion (IM3) and maintaining the adaptive bias function at the same time. The detailed embodiments are described in the following embodiments.

[0028] Figure 2 is a circuit layout diagram of a radio frequency amplifier 100-1 according to a first embodiment of the present utility model. Figure 2 The radio frequency amplifier 100-1 is Figure 1 An implementation of the radio frequency amplifier 100-1. The radio frequency amplifier 100-1 is configured on a substrate. Figure 2 The radio frequency amplifier 100-1 includes a plurality of transistors T11-T15 in a transistor group MG1, a first input metal layer, and a second input metal layer. The plurality of transistors T11-T15 in the transistor group MG1 are arranged along a first direction DA1. An isolation layer is provided between the first input metal layer and the second input metal layer to avoid direct coupling between the first input metal layer and the second input metal layer. The first input metal layer can be disposed between the second input metal layer and the substrate, or the second input metal layer can be disposed between the first input metal layer and the substrate. In an embodiment, the transistor group MG1 is composed of Figure 1 transistors T1X in the plurality of transistors T11-T15.

[0029] The first input metal layer has a connection portion 110-0, a first portion 110-1, and a second portion 110-2. The first input metal layer is used to receive a radio frequency input signal from a radio frequency input terminal RFIN. The second input metal layer has a connection portion 120-0, a first portion 120-1, and a second portion 120-2. The second input metal layer is used to receive a direct current bias signal from a direct current bias terminal DCBIAS.

[0030] The radio frequency input signal on the radio frequency input terminal RFIN is sequentially transmitted through the connection portion 110-0, the first portion 110-1, and the second portion 110-2 of the first input metal layer to a plurality of control terminals of the plurality of transistors T11-T15 in the transistor group MG1 (such as a radio frequency input path RFP exemplified by the transistor T11). The direct current bias signal on the direct current bias terminal DCBIAS is sequentially transmitted through the connection portion 120-0, the first portion 120-1, and the second portion 120-2 of the second input metal layer to a plurality of control terminals of the plurality of transistors T11-T15 in the transistor group MG1 (such as a direct current bias path DCP exemplified by the transistor T11). The plurality of transistors T11-T15 can be disposed in parallel with each other.

[0031] The first portion 110-1 of the first input metal layer and the first portion 120-1 of the second input metal layer do not overlap. The second portion 110-2 of the first input metal layer and the first portion 120-1 of the second input metal layer are interleaved. In other words, along the direction perpendicular to the substrate, the projections of the first portion 110-1 of the first input metal layer and the first portion 120-1 of the second input metal layer on the substrate do not overlap, and the overlapping region AR1 of the interleaved coupling of the second portion 110-2 of the first input metal layer and the first portion 120-1 of the second input metal layer has a first projected area on the second input metal layer (i.e., the total area of ​​the overlapping region AR1). In this embodiment, the first projected area (the area of ​​the overlapping region AR1) accounts for 15% to 25% of the total area of ​​the first portion 120-1 of the second input metal layer. This first projected area will enable a connection between the DC bias path DCP and the RF input path RFP. Figure 1 The coupling capacitor Ccoup is shown. Therefore, the RF amplifier 100-1 reduces third-order intermodulation distortion (IM3) while maintaining its adaptive bias function by adjusting the size and relative position of the overlap region AR1 between the RF input path RFP and the DC bias path DCP.

[0032] Figure 2 The RF amplifier 100-1 also includes multiple capacitors (e.g., capacitors C11 to C15) and multiple resistors (e.g., resistors R11 to R15). Capacitors C11 to C15 are arranged along a first direction DA1. One end of each of capacitors C11 to C15 is coupled to a second portion 110-2 of the first input metal layer. Figure 1 Capacitor C1X can be Figure 2 One of capacitors C11 to C15. Resistors R11 to R15 are arranged along the first direction DA1. One end of each of resistors R11 to R15 is coupled to the second portion 120-2 of the second input metal layer. Figure 1 Resistor R1X can be Figure 2 One of the resistors R11 to R15.

[0033] The projections of capacitors C11 to C15 and resistors R11 to R15 along the first direction DA1 will overlap. For example, capacitor C15 and resistor R15 have overlapping projections PJ1 along the first direction DA1.

[0034] The first portion 110-1 of the first input metal layer and the first portion 120-1 of the second input metal layer extend along the second direction DA2. The second portions 110-2 of the first input metal layer and the second portion 120-2 of the second input metal layer extend along the first direction DA1. The second portion 120-2 of the second input metal layer has a width D1 in the second direction DA2. The first portion 120-1 of the second input metal layer has a width D2 in the first direction DA1. The width D1 is smaller than the width D2. The first portion 120-1 of the second input metal layer is disposed between the first portion 110-1 of the first input metal layer and the transistor group MG1 containing the plurality of transistors T11 to T15. In one embodiment, the first portion 110-1, the second portion 110-2, the first portion 120-1, and the second portion 120-2 of the first input metal layer are all rectangular in shape, each rectangle having a long side and a short side. The rectangle corresponding to the first portion 110-1 of the first input metal layer has a long side in the second direction DA2 and a short side in the first direction DA1. The second portion 110-2 of the first input metal layer has a long side in the first direction DA1 and a short side in the second direction DA2. The first portion 120-1 of the second input metal layer has a long side in the second direction DA2 and a short side in the first direction DA1. The second portion 120-2 of the second input metal layer has a long side in the first direction DA1 and a short side in the second direction DA2. The long side of the first portion 110-1 of the first input metal layer is connected to the short side of the second portion 110-2 of the first input metal layer to form an L-shaped or T-shaped configuration, and the short side of the first portion 120-1 of the second input metal layer is connected to the long side of the second portion 120-2 of the second input metal layer to form an L-shaped or T-shaped configuration.

[0035] Multiple control terminals of transistors T11 to T15 receive the radio frequency input signal from the radio frequency input terminal RFIN through multiple capacitors C11 to C15. Furthermore, the multiple control terminals of transistors T11 to T15 are connected to multiple resistors R11 to R15 (corresponding to...). Figure 1 Resistor R1X) and by Figure 1 The first terminal of transistor TB1 receives the DC bias signal (e.g., bias signal Vx) on the DC bias terminal DSBIAS.

[0036] Figure 3 This is a circuit layout diagram of a radio frequency amplifier 100-2 according to the second embodiment of the present utility model. Figure 3 RF amplifier 100-2 is Figure 1 One implementation of the RF amplifier 100. (Compared to...) Figure 2 Compared to the RF amplifier 100-1, Figure 3The radio frequency amplifier 100-2 further comprises a plurality of transistors T21-T25 in a transistor group MG2, a third portion 110-3 and a fourth portion 110-4 of the first input metal layer, and a third portion 120-3 and a fourth portion 120-4 of the second input metal layer. The plurality of transistors T21-T25 in the transistor group MG2 are arranged along a first direction DA1. In an embodiment, each of the transistors T11-T15 in the transistor group MG1 and each of the transistors T21-T25 in the transistor group MG2 form a transistor T1X in the transistor group MG1 and the transistor group MG2. Figure 1

[0037] A radio frequency input signal on the radio frequency input terminal RFIN is sequentially transmitted through the connecting portion 110-0, the third portion 110-3, and the fourth portion 110-4 of the first input metal layer to a plurality of control terminals of the plurality of transistors T21-T25 in the transistor group MG2. A direct current bias signal on the direct current bias terminal DCBIAS is sequentially transmitted through the connecting portion 120-0, the third portion 120-3, and the fourth portion 120-4 of the second input metal layer to the plurality of control terminals of the plurality of transistors T21-T25 in the transistor group MG2. The plurality of transistors T21-T25 can be arranged in parallel with each other.

[0038] The third portion 110-3 of the first input metal layer and the third portion 120-3 of the second input metal layer do not overlap with each other. The fourth portion 110-4 of the first input metal layer and the third portion 120-3 of the second input metal layer are staggeredly coupled with each other. In other words, along a direction perpendicular to the substrate, a projection of the third portion 110-3 of the first input metal layer on the substrate and a projection of the third portion 120-3 of the second input metal layer on the substrate do not overlap with each other, and a projection of the fourth portion 110-4 of the first input metal layer on the substrate and a projection of the third portion 120-3 of the second input metal layer on the substrate have a second projection area (i.e., the total area of the overlapping area AR2) on the second input metal layer. In the present embodiment, the first projection area (the area of the overlapping area AR1) and the second projection area (the area of the overlapping area AR2) account for 15% to 25% of the total area of the first portion 120-1 and the third portion 120-3 of the second input metal layer (e.g., the sum of the area of the first portion 120-1 and the area of the third portion 120-3). Such first projection area and such second projection area and the coupling capacitance Ccoup between the direct current bias path DCP and the radio frequency input path RFP will be described below. Figure 1 The coupling capacitance Ccoup shown. Thus, the radio frequency amplifier 100-2 reduces the third-order intermodulation distortion (IM3) by adjusting the size and the relative position of the overlapping area AR1 between the radio frequency input path RFP and the direct current bias path DCP, while maintaining its adaptive biasing function.

[0039] ​The second portion 120-2 of the second input metal layer, the second portion 110-2 of the first input metal layer, the fourth portion 110-4 of the first input metal layer, and the fourth portion 120-4 of the second input metal layer are arranged in order from top to bottom in the second direction DA2.

[0040] The projections of the capacitors C11-C15 and the resistors R11-R15 in the first direction DA1 overlap each other. For example, the capacitor C15 and the resistor R15 have projections PJ1 that overlap each other in the first direction DA1. The projections of the capacitors C21-C25 and the resistors R21-R25 in the first direction DA1 overlap each other. For example, the capacitor C25 and the resistor R25 have projections PJ2 that overlap each other in the first direction DA1.

[0041] Figure 4 is a circuit layout of a radio frequency amplifier 100-3 according to a third embodiment of the present application. Figure 4 The radio frequency amplifier 100-3 is Figure 1 an implementation of the radio frequency amplifier 100. Compared with Figure 3 Compared with the radio frequency amplifier 100-2, Figure 4 The radio frequency amplifier 100-3 further includes a plurality of transistors T31-T35 in a transistor group MG3, a plurality of transistors T41-T45 in a transistor group MG4, a third input metal layer, and a fifth portion 120-5, a sixth portion 120-6, a seventh portion 120-7, and an eighth portion 120-8 of the second input metal layer. Figure 4 The radio frequency amplifier 100-3 can have two radio frequency input terminals RFIN1-RFIN2. In an embodiment, the transistors T11-T15 in the transistor group MG1, the transistors T21-T25 in the transistor group MG2, the transistors T31-T35 in the transistor group MG3, and the transistors T41-T45 in the transistor group MG4 constitute Figure 1 a transistor TX1 in the radio frequency amplifier 100-2. In an embodiment, the first input metal layer and the third input metal layer are the same metal layer in the circuit layout.

[0042] The plurality of transistors T31-T35 in the transistor group MG3 are arranged along the first direction DA1. The plurality of transistors T41-T45 in the transistor group MG4 are arranged along the first direction DA1. The connection portion 110-0, the first portion 110-1 to the fourth portion 110-4 in the first input metal layer are used to receive a radio frequency input signal on a radio frequency input end RFIN1. The connection portion 130-0, the first portion 130-1 to the fourth portion 130-4 in the third input metal layer are used to receive a radio frequency input signal on a radio frequency input end RFIN2. The connection portion 120-0, the first portion 120-1 to the eighth portion 120-8 in the second input metal layer are used to receive a direct current bias signal on a direct current bias end DCBIAS.

[0043] The radio frequency input signal on the radio frequency input end RFIN2 is sequentially transmitted through the connection portion 130-0, the first portion 130-1, the second portion 130-2 of the third input metal layer to the plurality of control terminals of the plurality of transistors T31-T35 in the transistor group MG3.

[0044] The radio frequency input signal on the radio frequency input end RFIN2 is sequentially transmitted through the connection portion 130-0, the third portion 130-3, the fourth portion 130-4 of the third input metal layer to the plurality of control terminals of the plurality of transistors T41-T45 in the transistor group MG4.

[0045] The direct current bias signal on the direct current bias end DCBIAS is sequentially transmitted through the connection portion 120-0, the fifth portion 120-5, the sixth portion 120-6 of the second input metal layer to the plurality of control terminals of the plurality of transistors T31-T35 in the transistor group MG3. The direct current bias signal on the direct current bias end DCBIAS is sequentially transmitted through the connection portion 120-0, the fifth portion 120-5, the seventh portion 120-7, the eighth portion 120-8 of the second input metal layer to the plurality of control terminals of the plurality of transistors T41-T45 in the transistor group MG4. The plurality of transistors T31-T35, T41-T45 can be arranged in parallel with each other.

[0046] The first portion 130-1 and the third portion 130-3 of the third input metal layer do not overlap with the fifth portion 120-5 and the seventh portion 120-7 of the second input metal layer. The second portion 130-2 of the third input metal layer is staggeredly coupled with the fifth portion 120-5 of the second input metal layer, respectively. In other words, along a direction perpendicular to the substrate, projections of the first portion 130-1 and the third portion 130-3 of the third input metal layer on the substrate do not overlap with the fifth portion 120-5 and the seventh portion 120-7 of the second input metal layer, and an overlapping area AR3 of the second portion 130-2 of the third input metal layer and the fifth portion 120-5 of the second input metal layer which are staggeredly coupled with each other has a third projected area (i.e., the overall area of the overlapping area AR3) on the second input metal layer.

[0047] The fourth portion 130-4 of the third input metal layer is staggeredly coupled with the seventh portion 120-7 of the second input metal layer, respectively. In other words, along a direction perpendicular to the substrate, the fourth portion 130-4 of the third input metal layer and the seventh portion 120-7 of the second input metal layer which are staggeredly coupled with each other have a fourth projected area (i.e., the overall area of the overlapping area AR4) on the second input metal layer. In the present embodiment, the first projected area (the area of the overlapping area AR1), the second projected area (the area of the overlapping area AR2), the third projected area (the area of the overlapping area AR3), and the fourth projected area (the area of the overlapping area AR4) respectively account for 15% to 25% of the total area of the first portion 120-1, the third portion 120-3, the fifth portion 120-5, and the seventh portion 120-7 of the second input metal layer (e.g., the sum of the areas of the first portion 120-1, the third portion 120-3, the fifth portion 120-5, and the seventh portion 120-7).

[0048] Figure 4 In the present embodiment, the second portion 120-2 of the second input metal layer, the second portion 110-2 of the first input metal layer, the fourth portion 110-4 of the first input metal layer, the fourth portion 120-4 of the second input metal layer, the sixth portion 120-6 of the second input metal layer, the second portion 130-2 of the third input metal layer, the fourth portion 130-4 of the third input metal layer, and the eighth portion 120-8 of the second input metal layer are sequentially arranged from top to bottom in the second direction DA2.

[0049] The first portion 130-1 of the third input metal layer, the fifth portion 120-5 of the second input metal layer, and the plurality of transistors T31-T35 in the transistor group MG3 are sequentially arranged in the first direction DA1.

[0050] The third portion 130-3 of the third input metal layer, the seventh portion 120-7 of the second input metal layer, and the plurality of transistors T41-T45 in the transistor group MG4 are sequentially arranged in the first direction DA1.

[0051] The sixth portion 120-6 of the second input metal layer has a width D3 in the second direction DA2. The fifth portion 120-5 of the second input metal layer has a width D4 in the first direction DA1.

[0052] In summary, the radio frequency amplifier adjusts the size and relative position of the overlapping area (for example, the staggered coupling area) between the radio frequency input path and the direct current bias path in the radio frequency amplifier, thereby reducing the third-order intermodulation distortion (IM3) while maintaining the adaptive bias function.

[0053] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A radio frequency amplifier characterized by, Comprising: a first plurality of transistors arranged along a first direction; a first input metal layer for receiving a radio frequency input signal, having a first portion and a second portion; and a second input metal layer for receiving a direct current bias signal, having a first portion and a second portion, wherein the first portion of the first input metal layer and the first portion of the second input metal layer do not overlap each other, the second portion of the first input metal layer and the first portion of the second input metal layer are staggered coupled to each other, wherein the radio frequency input signal is sequentially transmitted through the first portion of the first input metal layer, the second portion of the first input metal layer to a plurality of control terminals of the first plurality of transistors, wherein the direct current bias signal is sequentially transmitted through the first portion of the second input metal layer, the second portion of the second input metal layer to the plurality of control terminals of the first plurality of transistors.

2. The radio frequency amplifier of claim 1, wherein, Further comprising: a plurality of capacitors arranged along the first direction, wherein one end of each of the plurality of capacitors is coupled to the second portion of the first input metal layer; and a plurality of resistors arranged along the first direction, wherein one end of each of the plurality of resistors is coupled to the second portion of the second input metal layer.

3. The radio frequency amplifier of claim 2, wherein, Projections of the plurality of capacitors and the plurality of resistors along the first direction overlap each other.

4. The radio frequency amplifier of claim 2, wherein, The first portion of the first input metal layer and the first portion of the second input metal layer extend along a second direction, and the second portion of the first input metal layer and the second portion of the second input metal layer extend along the first direction, the second portion of the second input metal layer has a first width in the second direction, and the first portion of the second input metal layer has a second width in the first direction, wherein the first width is smaller than the second width.

5. The radio frequency amplifier of claim 4, wherein, The first portion of the second input metal layer is disposed between the first portion of the first input metal layer and the first plurality of transistors.

6. The radio frequency amplifier of claim 1, wherein, The radio frequency amplifier further comprises a first transistor, a plurality of capacitors and a plurality of resistors, wherein the plurality of control terminals of each of the first plurality of transistors receives the radio frequency input signal through the plurality of capacitors and receives the direct current bias signal from a first terminal of the first transistor through the plurality of resistors.

7. The radio frequency amplifier of claim 1, wherein, Further comprising: a second plurality of transistors arranged along the first direction, wherein the first input metal layer further comprises a third portion and a fourth portion, and the second input metal layer further comprises a third portion and a fourth portion, wherein the third portion of the first input metal layer and the third portion of the second input metal layer do not overlap each other, wherein the fourth portion of the first input metal layer and the third portion of the second input metal layer are staggered coupled to each other, wherein the radio frequency input signal is sequentially transmitted through the third portion of the first input metal layer, the fourth portion of the first input metal layer to a plurality of control terminals of the second plurality of transistors, wherein the direct current bias signal is sequentially transmitted through the third portion of the second input metal layer, the fourth portion of the second input metal layer to the plurality of control terminals of the second plurality of transistors. The direct current bias signal is sequentially transmitted to the control terminals of the second plurality of transistors through the fifth portion and the sixth portion of the second input metal layer.

8. The radio frequency amplifier of claim 7, wherein, Further comprising: a third plurality of transistors arranged along the first direction; a fourth plurality of transistors arranged along the first direction; and a third input metal layer for receiving the radio frequency input signal, having a first portion, a second portion, a third portion and a fourth portion, wherein the second input metal layer further comprises a fifth portion, a sixth portion, a seventh portion and an eighth portion, wherein the first portion and the third portion of the third input metal layer do not overlap with the fifth portion and the seventh portion of the second input metal layer, wherein the second portion of the third input metal layer and the fifth portion of the second input metal layer are staggeredly coupled with each other, and the fourth portion of the third input metal layer and the seventh portion of the second input metal layer are staggeredly coupled with each other, wherein the radio frequency input signal is sequentially transmitted to the control terminals of the third plurality of transistors through the first portion and the second portion of the third input metal layer, wherein the direct current bias signal is sequentially transmitted to the control terminals of the third plurality of transistors through the fifth portion and the sixth portion of the second input metal layer, wherein the radio frequency input signal is sequentially transmitted to the control terminals of the fourth plurality of transistors through the third portion and the fourth portion of the third input metal layer, wherein the direct current bias signal is sequentially transmitted to the control terminals of the fourth plurality of transistors through the fifth portion, the seventh portion and the eighth portion of the second input metal layer. The second portion of the second input metal layer, the second portion of the first input metal layer, the fourth portion of the first input metal layer, the fourth portion of the second input metal layer, the sixth portion of the second input metal layer, the second portion of the third input metal layer, the fourth portion of the third input metal layer and the eighth portion of the second input metal layer are sequentially arranged along a second direction.

9. The radio frequency amplifier of claim 8, wherein, The radio frequency amplifier is disposed on a substrate, and 10. The radio frequency amplifier of claim 7, wherein, In a direction perpendicular to the substrate, the area where the second portion of the first input metal layer and the first portion of the second input metal layer are staggeredly coupled with each other has a first projected area on the second input metal layer, the area where the fourth portion of the first input metal layer and the third portion of the second input metal layer are staggeredly coupled with each other has a second projected area on the second input metal layer, the first projected area and the second projected area account for 15% to 25% of the total area of the first portion and the third portion of the second input metal layer. ​ 11. The radio frequency amplifier of claim 8, wherein, The first portion of the third input metal layer, the fifth portion of the second input metal layer, and the third plurality of transistors are sequentially arranged in the first direction, and The third portion of the third input metal layer, the seventh portion of the second input metal layer, and the fourth plurality of transistors are sequentially arranged in the first direction.

12. The radio frequency amplifier of claim 8, wherein, The first input metal layer and the third input metal layer are the same metal layer.

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