Inductor, integrated circuit and voltage-controlled oscillator

Abstract

The utility model relates to an inductor, an integrated circuit and a voltage-controlled oscillator. The present specification provides an inductor arranged in a stack of insulating and conductive stages. An exemplary inductor includes: in a first region of a stack, at least a first turn and a second turn are arranged in two different conductive stages of the stack, respectively; and in a second region of the stack, at least a third turn and a fourth turn are respectively arranged in two different conductive stages of the stack wherein the first turn, the second turn, the third turn and the fourth turn are connected in series between the first end and the second end of the inductor, the inductor is configured such that a current applied between the first end and the second end of the inductor flows in the first turn and the second turn in a first rotational direction and in the third turn and the fourth turn in a second rotational direction opposite the first direction.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to integrated electronic circuits, and more specifically to inductor structures formed on a substrate. BACKGROUND

[0002] An inductive coil or inductor is an electronic component that comprises one or more electrically conductive loops or turns connected in series between two connection terminals, also referred to as the ends of the inductor. The inductance value, expressed in henries, represents the ability of the inductor to store energy in the form of a magnetic field when an electric current flows through it. The more turns the coil of the inductor has, the higher the inductance value.

[0003] In microelectronics, the turns of the inductive coil are realized by electrically conductive tracks in a stack of electrically conductive and insulating levels covering a substrate. SUMMARY

[0004] The magnetic field generated by the inductor can cause undesired coupling with adjacent electronic components. To limit this phenomenon, a planar figure-eight inductor configuration has been provided, such that the magnetic field seen by adjacent components can be reduced. However, this solution requires a relatively large surface area.

[0005] Therefore, there is a need for designing compact inductors with a configuration that enables a reduction of mutual parasitic inductance, i.e. coupling with other devices, while having a large self-inductance.

[0006] To this end, embodiments provide an inductor arranged in a stack of insulating levels and electrically conductive levels, comprising:

[0007] In a first region of the stack, a first turn and a second turn are arranged in a first electrically conductive level of the stack and in a second electrically conductive level of the stack, respectively, the first electrically conductive level and the second electrically conductive level being different;

[0008] In a second region of the stack, at least a third turn and a fourth turn are arranged in the second electrically conductive level and in the first electrically conductive level, respectively; and

[0009] wherein the first turn, the second turn, the third turn and the fourth turn are connected in series between a first end and a second end of the inductor, such that a current applied between the first end and the second end of the inductor flows in the first turn and the second turn in a first rotational direction and in the third turn and the fourth turn in a second rotational direction opposite to the first direction, wherein the second turn and the third turn are adjacent and together define a figure-eight electrically conductive track,

[0010] wherein the first turn and the second turn overlap, and wherein the third turn and the fourth turn overlap.

[0011] According to an embodiment, the first and second ends of the inductor at least partially overlap with the central region of the figure-eight conductive track, which is included in the second and third turns.

[0012] According to an embodiment, the first, second, third, and fourth turns are connected in series between the first and second terminals of the inductor in this order.

[0013] According to an embodiment, the first end of the inductor is connected to the first connection terminal of the inductor via at least one conductive rail located on the third conductive level.

[0014] According to an embodiment, the first connection terminal of the inductor is arranged in the first conductive stage.

[0015] According to an embodiment, the second end of the inductor is connected to the second connection terminal of the inductor via at least one conductive rail located on the third conductive level.

[0016] According to an embodiment, the second connection terminal of the inductor is arranged in the first conductive stage.

[0017] According to an embodiment, the midpoint of the inductor is connected to the third connection terminal of the inductor via at least one conductive rail located on the third conductive level.

[0018] According to an embodiment, the third connection terminal of the inductor is arranged in the first conductive stage.

[0019] Another embodiment provides an integrated circuit including at least one inductor as defined above.

[0020] Another embodiment provides a voltage-controlled oscillator including at least one inductor as defined above.

[0021] Therefore, it is possible to design a compact inductor with a configuration that reduces mutual parasitic inductance (i.e., coupling with other devices) while having a large self-inductance. Attached Figure Description

[0022] The above-described features and advantages, as well as other features and advantages, will be described in detail with reference to the accompanying drawings in the remaining disclosure of the specific embodiments given by way of illustration and not limitation, wherein:

[0023] Figure 1 The conductive tracks of an example inductor according to an embodiment are schematically shown in a top view;

[0024] Figure 2 yes Figure 1 A simplified 3D view of the stacked conductive tracks of the inductor;

[0025] Figure 3 yes Figure 1 inductor alongFigure 1 and Figure 2 simplified view of a cross-section along an axis A1 in

[0026] Figure 4 simplified view of a cross-section along an axis A2 in Figure 1 simplified view of a cross-section along an axis A2 in Figure 1 and Figure 2 simplified view of a cross-section along an axis A2 in DETAILED DESCRIPTION

[0027] Identical features in the various figures are designated by identical reference signs. In particular, structurally and / or functionally identical features among the various embodiments can have identical reference signs and can have identical structural, dimensional and material properties.

[0028] For the sake of clarity, only steps and elements that are helpful for understanding the described embodiments are shown and described in detail. In particular, the manufacturing method of the described inductors is not described in detail, the described embodiments are compatible with common inductor manufacturing methods for microelectronics, or such methods are within the capabilities of a person skilled in the art based on the indications of this description.

[0029] Unless otherwise stated, when referring to two elements connected together, this means directly connected without any intermediate element other than a conductor, and when referring to two elements coupled together, this means that the two elements can be connected or they can be coupled via one or more other elements.

[0030] In the following description, when referring to absolute position qualifiers such as "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers such as "top", "bottom", "upper", "lower", etc., or orientation qualifiers such as "horizontal", "vertical", etc., all refer to the orientation of the drawings, unless otherwise stated.

[0031] Unless otherwise stated, the expressions "about", "approximately", "substantially" and "in the order of" mean plus or minus 10%, preferably plus or minus 5%.

[0032] In the remainder of the description, an inductor is considered to be formed in a circuit comprising a stack of insulating and conductive levels, including a covering substrate. Other electronic components may also be integrated into the circuit and connected to the inductor via stacked conductive tracks. Here, a set of conductive tracks defined in the same layer of conductive material (e.g., a metal, such as copper) is referred to as a conductive level. The turns of the inductor correspond to one or more conductive tracks having the same or different conductive levels and being connected to each other so as to be electrically equivalent to a single toroidal track.

[0033] Figure 1 The conductive tracks of an example inductor 100 according to an embodiment are schematically shown in the top view.

[0034] Figure 2 yes Figure 1 A simplified 3D view of the stacked conductive tracks of inductor 100.

[0035] Figure 3 yes Figure 1 Inductor 100 along Figure 1 and Figure 2 A simplified view of the cross section of axis A1.

[0036] Figure 4 It shows Figure 1 Inductor 100 along Figure 1 and Figure 2 A simplified view of the cross section of axis A2.

[0037] exist Figures 1 to 4 In the example, inductor 100 is formed in a stack comprising three conductive stages M1, M2, and M3 in sequence, starting from the upper surface of a substrate (not shown). The substrate is made of, for example, a semiconductor material (e.g., silicon) or a dielectric material (e.g., glass). The conductive stages are separated in pairs by an electrically insulating layer (e.g., made of silicon oxide), in which conductive vias (e.g., metallic (e.g., made of copper)) are formed, allowing the conductive tracks of stages M1, M2, and M3 to be electrically connected to each other.

[0038] Figure 1 It includes three views (M1), (M2), and (M3), which respectively show the conductive tracks of the inductor formed in stage M1, the conductive tracks of the inductor formed in stage M2, and the conductive tracks of the inductor formed in stage M3.

[0039] In this example, inductor 100 includes four turns 101, 102, 103, and 104.

[0040] Stage M2 includes inductor turns 101 and 104, and stage M3 includes inductor turns 102 and 103.

[0041] Turn 101 and turn 102 are stacked and mainly arranged in a first region of the stack. Stacking turns here means that the conductive tracks forming the turns overlap as seen from the direction of the stack of layers, i.e. in a direction orthogonal to the substrate. In other words, in a projection along the direction of the stack of layers, the conductive tracks forming the turns substantially coincide over their entire surface. As a variant, turn 101 and turn 102 only partially overlap. In another variant, turn 101 and turn 102 do not overlap.

[0042] Turn 103 and turn 104 are also stacked and mainly arranged in a second region of the stack, different from the first region. As a variant, turn 103 and turn 104 only partially overlap. In another variant, turn 103 and turn 104 do not overlap.

[0043] A region of the stack means a volume extending over a plurality of levels of the stack, and two different regions mean two substantially separate volumes. In other words, turn 103 and turn 104 are not stacked on turn 101 and turn 102 (i.e. they do not cover turn 101 and turn 102).

[0044] In the example of Figures 1 to 4 , turn 101, turn 102, turn 103 and turn 104 are connected in series between a first end 123 and a second end 124 of the inductor, in that order.

[0045] Turns 101 to 104 are connected so that a current propagating from end 123 to end 124 of the inductor first flows through first turn 101 in a first rotation direction (e.g. counterclockwise), then through second turn 102 in the same first rotation direction, then through third turn 103 in a second rotation direction opposite to the first direction (e.g. clockwise), and then through fourth turn 104 in the same second rotation direction. Figure 1 and Figure 2 The arrows in

[0046] In the example of Figures 1 to 4 , turn 101 is formed of a conductive track formed entirely in level M2 and comprises a first end corresponding to end 123 of the inductor and a second end 127. Turn 102 is formed of a conductive track formed entirely in level M3 and comprises a first end 137 and a second end 136. Turn 103 is formed of a conductive track formed entirely in level M3 and comprises a first end corresponding to end 136 of wire 102 and a second end 138. Turn 104 is formed of a conductive track formed entirely in level M2 and comprises a first end 128 and a second end 124 corresponding to the second end of the inductor.

[0047] In the example of Figures 1 to 4In this example, the inductor includes one or more conductive vias 147 extending within an insulating layer separating stages M2 and M3, and electrically connecting a second end 127 of the first turn 101 to a first end 137 of the second turn 102. More specifically, in this example, the via 147 contacts the upper surface of the end 127 of the turn 101 through its lower surface, and contacts the lower surface of the end 137 of the turn 102 through its upper surface.

[0048] exist Figures 1 to 4 In the example shown, the inductor also includes one or more conductive vias 148 extending in an insulating layer separating stages M2 and M3, and electrically connecting a second end 138 of the third turn 103 to a first end 128 of the fourth turn 104. More specifically, in this example, the via 148 contacts the upper surface of the end 128 of the turn 104 through its lower surface, and contacts the lower surface of the end 138 of the turn 103 through its upper surface.

[0049] In this example, inductor 100 includes three terminals 121, 122, and 125 connected to an external circuit. In the example shown, connection terminals 121, 122, and 125 are formed in stage M2.

[0050] A first terminal 121 is connected to a first terminal 123 of the inductor via at least one conductive track 106 of stage M1. Track 106 includes a first end 111 and a second end 113. One or more conductive vias 141 extend in an insulating layer separating stages M1 and M2, and electrically connect the first end 111 of track 106 to terminal 121. More specifically, in this example, via 141 contacts the upper surface of end 111 of track 106 via its lower surface, and contacts the lower surface of terminal 121 via its upper surface. Furthermore, one or more conductive vias 143 extend in an insulating layer separating stages M1 and M2, and electrically connect the second end 113 of track 106 to the first terminal 123 of the inductor. More specifically, in this example, via 143 contacts the upper surface of end 113 of track 106 via its lower surface, and contacts the lower surface of end 123 of the inductor via its upper surface.

[0051] The second terminal 122 is connected to the second end 124 of the inductor through at least one electrically conductive track 107 of stage Ml. The track 107 includes a first end 112 and a second end 114. One or more electrically conductive vias 142 extend in the insulating stage separating stage Ml and stage M2 and electrically connect the first end 112 of the track 107 to the terminal 122. More specifically, in this example, the vias 142 contact the upper surface of the end 112 of the track 107 through their lower surfaces and the lower surface of the terminal 122 through their upper surfaces. In addition, one or more electrically conductive vias 142 extend in the insulating stage separating stage Ml and stage M2 and electrically connect the second end 114 of the track 107 to the second end 124 of the inductor. More specifically, in this example, the vias 144 contact the upper surface of the end 114 of the track 107 through their lower surfaces and the lower surface of the end 124 of the inductor through their upper surfaces.

[0052] The third terminal 125 is connected to the common end 136 of turns 102 and 103, which defines the midpoint of the inductor, through at least one electrically conductive track 126 of stage M2 and at least one electrically conductive track 108 of stage Ml. For certain applications, the terminal 125 enables the inductor to be used in differential mode. The track 108 includes a first end 115 and a second end 116. One or more electrically conductive vias 145 extend in the insulating stage separating stage Ml and stage M2 and electrically connect the first end 115 of the track 108 to the terminal 125. More specifically, in this example, the vias 145 contact the upper surface of the end 115 of the track 108 through their lower surfaces and the lower surface of the terminal 125 through their upper surfaces. In addition, one or more electrically conductive vias 146 extend in the insulating stage separating stage Ml and stage M2 and electrically connect the second end 116 of the track 108 to the electrically conductive track 126 of stage M2, which is in vertical alignment with the midpoint 136 of the inductor. More specifically, in this example, the vias 146 contact the upper surface of the end 116 of the track 108 through their lower surfaces and the lower surface of the track 126 through their upper surfaces. In addition, one or more electrically conductive vias 149 extend in the insulating stage separating stage M2 and stage M3 and electrically connect the track 126 to the midpoint 136 of the inductor. More specifically, in this example, the vias 149 contact the upper surface of the track 126 through their lower surfaces and the lower surface of the midpoint 136 through their upper surfaces.

[0053] It should be noted that in the shown example, in stage M1 the inductor comprises two electrically conductive tracks 106 connected in parallel between terminal 121 and terminal 123 of the inductor. Further, in this example, in stage M1 the inductor comprises two electrically conductive tracks 107 connected in parallel between terminal 122 and terminal 124 of the inductor. Further, in this example, in stage M1 the inductor comprises two electrically conductive tracks 108 connected in parallel between terminal 125 and midpoint 136 of the inductor. However, the described embodiments are not limited to this particular case. As a variant, the electrically conductive tracks 106, 107 and / or 108 can be simple tracks, or each comprise more than two parallel tracks.

[0054] The path followed by the current between the end terminals 121 and 122 of the inductor, for example, is as follows.

[0055] According to one embodiment, the second and third turns 102, 103 are joined together and together define a figure-eight electrically conductive track. For example in stage M2, the first and second terminals 123, 124 of the inductor partially overlap, for example, with the central region of the figure-eight electrically conductive track. The first and second terminals 123, 124 of the inductor are, for example, aligned perpendicularly with the common part of the two turns defining the figure-eight, i.e. with the joined end section of the second and third turns 102, 103. This advantageously facilitates the routing of external components with the inductor 100, for example, located in a lower stage of the stack and at least partially overlapping the inductor 100. For example, in a voltage controlled oscillator, a set of switched capacitors is located below the inductor and connected to the terminals of the inductor. Another advantage is that it brings the terminals 123 and 124 closer to each other and facilitates their connection to connection terminals located on the same side of the inductor and close to each other, for example, avoiding additional routing and reducing the footprint of the inductor. Although not illustrated in the figures, the terminals of the inductor are, for example, connected to connection terminals located on opposite sides of the inductor. The position of the terminals enables a relatively high flexibility in the location of the connection terminals.

[0056] The midpoint of the inductor is located in the central region of the figure-eight electrically conductive track and is, for example, connected to the terminal 116 of the track 108 located in stage M1, at least partially overlapping the central region, for example, aligned perpendicularly with the central region. The midpoint thus has the same advantages as mentioned previously for the terminals 123 and 124.

[0057] The current flows into the inductor 100 via connection terminal 121, through via 141, and then from its end 111 through the conductive track 106 to its end 113. The current then flows through via 143. The current then flows from the end 123 of the inductor through the first turn 101 of the inductor to its end 127. The current then flows through via 147. The current then flows from its end 137 through the second turn 102 of the inductor to its end 136, and then from its end 136 through the third turn 103 of the inductor to its end 138. The current then flows through via 148, and then from its end 128 through the fourth turn 104 of the inductor to its end 124. The current then flows from its end through via 144 and conductive track 107 to its end 112. The current then flows through via 142 and out of the inductor 100 via connection terminal 122.

[0058] With respect to Figures 1 to 4 An advantage of the described arrangement is that it enables limiting mutual inductance with adjacent components. This is because one part of the turns of the inductor (turns 101 and 102 in the illustrated example) conduct current flowing in a first rotational direction, while another part of the turns of the inductor (turns 103 and 104 in the illustrated example) conduct current flowing in a second rotational direction opposite to the first direction. Thus, without reducing the self-inductance value, which is related to the total number of turns in the inductor, the mutual inductance seen from adjacent components is reduced.

[0059] An additional advantage, compared to a planar mule kick inductor arrangement (i.e. all turns of the inductor are formed mainly in the same conductive level), is that the overall volume of the inductor is reduced.

[0060] With respect to Figures 1 to 4 The described arrangement requires 1.6 to 1.8 times less surface area than an inductor with a planar mule kick arrangement to obtain substantially equal self-inductance. For example, with respect to Figures 1 to 4 The described arrangement enables generating an inductance of approximately 0.8 nH over an overall surface area of approximately 22,000 pm 2 , compared to an overall surface area of approximately 40,000 pm 2 for a planar mule kick arrangement. According to another example, with respect to Figures 1 to 4 The described arrangement enables generating an inductance of approximately 1.1 nH over an overall surface area of approximately 31,000 pm 2 , compared to an overall surface area of approximately 51,000 pm 2 for a planar mule kick arrangement. According to another example, with respect to Figures 1 to 4 The described arrangement enables generating an inductance of approximately 1.6 nH over an overall surface area of approximately 38,000 pm 2generates an inductance of approximately 1.4 nH over the total surface area, compared to approximately 63,000 pm2for a planar figure-eight arrangement 2 .

[0061] In relation to Figures 1 to 4 Another advantage of the described embodiments is that they allow for contact on the midpoint of the inductor, which enables the inductor to be used in differential mode.

[0062] In relation to Figures 1 to 4 Inductors of the described type can advantageously be used in many applications, for example in voltage controlled oscillators (VCOs), for example in radio frequency signal synthesis applications, for example in radio communication devices (for example mobile phones). The reduction of the mutual inductance between the inductor and adjacent components then enables more precise and stable reference frequencies to be synthesised.

[0063] More generally, such inductors can be used in any circuit that can take advantage of the reduction of the mutual inductance between the inductor and adjacent components.

[0064] Various embodiments and variants have been described. The person skilled in the art will understand that certain features of these various embodiments and variants can be combined, and will think of other variants. In particular, the described embodiments are not limited to the example of inductors having four turns formed in two conductive levels. More generally, the person skilled in the art will be able to adapt the solutions provided to inductors having a number of turns greater than four and / or a number of conductive levels used to form the turns greater than two.

[0065] Furthermore, the overall shape of the turns of the inductor can be different from that shown. More generally, the turns of the inductor can have any other shape (for example a circular, square, rectangular, etc. general shape).

[0066] Furthermore, the described embodiments are not limited to the specific example described in relation to Figures 1 to 4 The described embodiments and variants can be implemented in many different ways. More generally, the person skilled in the art will be able to implement the described embodiments and variants on the basis of the functional indications given above. In particular, the described embodiments and variants can be implemented in hardware, for example in an integrated circuit, or in software, for example in a computer program.

[0067] Finally, the actual implementation of the described embodiments and variants is within the capabilities of the person skilled in the art on the basis of the functional indications given above.

Claims

1. An inductor characterized by, The inductor is arranged in a stack of insulating levels and electrically conductive levels, the inductor comprising: In a first region of the stack, a first turn and a second turn are arranged in a first electrically conductive level of the stack and in a second electrically conductive level of the stack, respectively, the first electrically conductive level and the second electrically conductive level being different; In a second region of the stack, at least a third turn and a fourth turn are arranged in the second electrically conductive level and in the first electrically conductive level, respectively; and wherein the first turn, the second turn, the third turn and the fourth turn are connected in series between a first end and a second end of the inductor, such that a current applied between the first end and the second end of the inductor flows in a first rotational direction in the first turn and the second turn, and in a second rotational direction opposite to the first rotational direction in the third turn and the fourth turn, wherein the second turn and the third turn are adjacent and together define a figure-eight shaped electrically conductive track, wherein the first turn and the second turn overlap, and wherein the third turn and the fourth turn overlap.

2. The inductor of claim 1, wherein, The second turn and the third turn are adjacent and together define a figure-eight shaped electrically conductive track.

3. The inductor of claim 1, wherein The first turn, the second turn, the third turn and the fourth turn are connected in series between the first end and the second end of the inductor in that order.

4. The inductor of claim 1, wherein The first end of the inductor is connected to a first connection terminal of the inductor by at least one electrically conductive track located in a third electrically conductive level.

5. The inductor of claim 4, wherein, The first connection terminal of the inductor is arranged in the first electrically conductive level.

6. The inductor of claim 1, wherein The second end of the inductor is connected to a second connection terminal of the inductor by at least one electrically conductive track located in a third electrically conductive level.

7. The inductor of claim 6, wherein, The second connection terminal of the inductor is arranged in the first electrically conductive level.

8. The inductor of claim 1, wherein A midpoint of the inductor is connected to a third connection terminal of the inductor by at least one electrically conductive track located in a third electrically conductive level.

9. The inductor of claim 8, wherein, The third connection terminal of the inductor is arranged in the first electrically conductive level.

10. An integrated circuit, characterized by The integrated circuit comprises at least one inductor according to claim 1.

11. A voltage controlled oscillator characterized by The voltage controlled oscillator comprises at least one inductor according to claim 1.

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