Intercom weapon deduction system based on high precision

Abstract

The utility model provides a high-precision-based intervisibility weapon deduction system, relates to the technical field of weapon deduction, and provides a more real signal generation and processing scheme, which comprises a waveform simulation module, a data acquisition card, a signal simulation module, an upper computer and other components. Through the combination of a waveform generator in the waveform simulation module and multiple groups of filters, the system can generate high-quality square wave signals, and the phase is adjusted through a phase shifter to ensure that the phases of fundamental waves and harmonic waves are consistent, so that the precision of the signals is improved. In addition, the design of the adjustable attenuator allows the amplitude and power of the analog waveform to be flexibly adjusted, and the adaptability of the signal in different analog scenes is ensured.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of war game deduction, specifically to a high-precision-based visual war game deduction system. BACKGROUND

[0002] In modern tactical analysis, war game deduction technology is widely used to simulate and predict various scenarios to support the formulation of various decisions. Traditional war game deduction systems usually rely on computer software to directly simulate signal generation. Although this method can provide basic signal simulation to some extent, it is difficult to truly reflect the complexity of signal propagation and reception in actual battlefields, thereby affecting the authenticity and effectiveness of the simulation.

[0003] Existing signal generation technologies mostly use software-based virtual signal generation methods. These software lacks interaction with real radio frequency environments and cannot fully consider factors such as signal attenuation, multipath propagation, and interference. This simulation method often leads to problems such as phase distortion and amplitude inaccuracy in the generated signal in actual applications, making the deduction results unable to reflect the dynamic changes of the real situation. In addition, existing systems have limitations in signal adjustment and processing capabilities, making it difficult to meet the demand for high-precision signals in complex tactical scenarios. SUMMARY

[0004] The utility model aims at providing a high-precision-based visual war game deduction system to solve the problems raised in the background technology.

[0005] To achieve the above-mentioned purpose, the utility model provides the following technical scheme:

[0006] A high-precision-based visual war game deduction system includes a waveform simulation module, a data acquisition card, a signal simulation module, and an upper computer.

[0007] The waveform simulation module includes a waveform generator, at least two groups of filters, and as many phase shifters as the number of filters. The input ends of the filters are connected in parallel to the output end of the waveform generator. The waveform generator is used to generate a square wave signal. The filters are used to screen the fundamental wave or harmonic wave in the square wave signal. The output end of each group of filters is electrically connected to the input end of a group of phase shifters. The output ends of all phase shifters are connected in parallel to the input end of an adder. The phase shifters are used to adjust the phase of the fundamental wave or harmonic wave output by the filters so that the phases of all fundamental waves and harmonic waves are consistent. The adder is used to synthesize the adjusted fundamental wave and harmonic wave to obtain an analog waveform.

[0008] The output end of the adder and the input end of the adjustable attenuator are electrically connected, the output end of the adjustable attenuator and the data acquisition card are electrically connected, the adjustable attenuator is used for adjusting the amplitude and power of the analog waveform, and the adjusted analog waveform is transmitted to the data acquisition card, and the data acquisition card and the upper computer are electrically connected, and used for sending the adjusted analog waveform to the upper computer after analog-digital conversion.

[0009] The signal simulation module and the upper computer are electrically connected, and the signal simulation module is used for generating and simulating radio frequency signals and communicating with the upper computer.

[0010] Further, the signal simulation module comprises a radio frequency interface module, the radio frequency interface module and the radio frequency transceiver module are electrically connected, and are used for connecting with external radio frequency equipment and providing input and output interfaces of radio frequency signals, the radio frequency transceiver module and the FPGA module are electrically connected, and are used for respectively demodulating and modulating the radio frequency signals received and transmitted by the radio frequency interface module, and transmitting the processed radio frequency signals to the FPGA module, the FPGA module and the interface module are electrically connected, and are used as a controller to process the received radio frequency signals, and the interface module and the upper computer are electrically connected, and are used for providing a data transmission interface between the FPGA module and the upper computer, and completing the communication between the FPGA module and the upper computer.

[0011] Further, the radio frequency transceiver module adopts a radio frequency transceiver circuit based on an LMS7002M chip, the FPGA module is based on an EP4CE55F23 chip, and the interface module adopts a PXI interface circuit based on a PCI9054 chip.

[0012] Further, the waveform generator comprises an operational amplifier U11, the positive power supply end and the negative power supply end of the operational amplifier U11 are electrically connected with +12V voltage and -12V voltage respectively, the inverting input end of the operational amplifier U11 is connected with ground through a serial capacitor C11, the non-inverting input end is electrically connected with the sliding end of a potentiometer R12, one fixed end of the potentiometer R12 and the output end of the operational amplifier U11 are electrically connected, the other fixed end is grounded, the negative electrode of a Zener diode D11 and the negative electrode of a Zener diode D12 are electrically connected, the positive electrode of the Zener diode D11 is grounded, and the positive electrode of the Zener diode D12 and the output end of the operational amplifier U11 are electrically connected.

[0013] The output end of the operational amplifier U11 serves as the output end of the entire waveform generator, and the output end of the operational amplifier U11 is further grounded through a resistor R13, and the output end of the operational amplifier U11 is further electrically connected with the sliding end of a potentiometer R11, and one fixed end of the potentiometer R11 is grounded.

[0014] Further, the filter comprises an operational amplifier U12, an inverting input terminal of the operational amplifier U12 is electrically connected with a sliding terminal of a potentiometer R25, one fixed terminal of the potentiometer R25 is electrically connected with an output terminal of the operational amplifier U12, and the other fixed terminal is grounded;

[0015] A capacitor C22 and the potentiometer R21 are connected in series between the non-inverting input terminal of the operational amplifier U12 and the output terminal of the waveform generator, a connecting node of the capacitor C22 and the potentiometer R21 is grounded through a capacitor C21, and the connecting node is connected in series with the output terminal of the operational amplifier U12 through a potentiometer R22, the non-inverting input terminal and the output terminal of the operational amplifier U12 are respectively grounded through a potentiometer R23 and a resistor R24, and the output terminal of the operational amplifier U12 is connected in series with a capacitor C23 to serve as an output terminal of the filter.

[0016] Further, the phase shifter comprises an operational amplifier U31 and a double-throw double-pole switch SF, an output terminal of the operational amplifier U31 is connected in series with a resistor R34 to serve as an output terminal of the phase shifter, and an inverting input terminal is connected in series with a resistor R31 to serve as an input terminal of the phase shifter.

[0017] The switch SF has two input terminals and four output terminals, the two input terminals are respectively electrically connected with a potentiometer R32, a capacitor C31 and a non-inverting input terminal of the operational amplifier U31 in series, two output terminals are grounded, and the other two output terminals are electrically connected with the input terminal of the phase shifter, the switch SF is switched to connect the input terminals and the output terminals, so that the two input terminals are simultaneously grounded, and the other input terminal is connected with the input terminal of the phase shifter, and the output terminal and the inverting input terminal of the operational amplifier U31 are electrically connected through a resistor R33.

[0018] Further, the adder comprises an operational amplifier U41, an inverting input terminal of the operational amplifier U41 serves as an input terminal of the adder, a non-inverting input terminal is electrically connected with a sliding terminal of a potentiometer R42, one fixed terminal of the potentiometer R42 is electrically connected with a power supply VCC, and the other fixed terminal is grounded, a potentiometer R41 is electrically connected between the inverting input terminal and an output terminal of the operational amplifier U41, the output terminal is connected in series with a capacitor C41 to serve as an output terminal of the adder, and the output terminal of the adder is further grounded through a resistor R43.

[0019] Compared with the prior art, the utility model has the advantages of:

[0020] The utility model discloses a combination of waveform analog module, data acquisition card, signal simulation module and host computer and a variety of components, provide a more real signal generation and processing scheme, through the combination of waveform generator and multiple filter in waveform analog module, the system can generate high quality square wave signal, and through phase shifter adjustment phase, ensure that the phase of each fundamental wave and harmonic is consistent, thereby improve the precision of signal, in addition, the design of adjustable attenuator allows flexible adjustment amplitude and power of analog waveform, ensure the adaptability of signal under different analog scene, through the efficient connection of data acquisition card and host computer, the system can realize the real time AD conversion and data transmission of signal, significantly improve the response speed and accuracy of signal processing, this technical scheme effectively overcomes the limitation of signal generation in traditional war game, provides strong support for realizing more real, more efficient simulation BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the embodiment of the utility model or the technical scheme in prior art, the following will briefly introduce the drawing needed to be used in embodiment or prior art description, obviously, the drawing in the following description is some embodiment of the utility model, for ordinary skilled person in the art, under the premise of not paying creative labor, other drawings can also be obtained according to these drawings.

[0022] Figure 1 It is the overall system structure schematic diagram of the utility model;

[0023] Figure 2 It is the structure schematic diagram of signal simulation module in the utility model;

[0024] Figure 3 It is the system structure schematic diagram of waveform analog module in the utility model

[0025] Figure 4 It is the circuit structure schematic diagram of waveform analog module in the utility model;

[0026] Figure 5 It is the circuit structure schematic diagram of waveform generator in the utility model;

[0027] Figure 6 It is the circuit structure schematic diagram of filter in the utility model;

[0028] Figure 7 It is the circuit structure schematic diagram of phase shifter in the utility model;

[0029] Figure 8 It is the circuit structure schematic diagram of adder in the utility model.

[0030] In the figure: waveform simulation module 10, waveform generator 11, filter 12, phase shifter 13, adder 14, adjustable attenuator 15, data acquisition card 20, signal simulation module 30, radio frequency interface module 31, radio frequency transceiver module 32, FPGA module 33, interface module 34, host computer 40. DETAILED DESCRIPTION

[0031] The technical solutions of the present application will be described clearly and completely in combination with the drawings. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor belong to the scope of protection of the present application.

[0032] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", "third" are only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0033] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the communication between two elements, or it can be wireless connection, or it can be wired connection. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0034] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as there is no conflict between them.

[0035] Embodiment:

[0036] Please refer to Figures 1-8 The present application provides a technical solution:

[0037] A high-precision-based line-of-sight wargaming system, comprising a waveform simulation module 10, a data acquisition card 20, a signal simulation module 30 and a host computer 40, wherein:

[0038] The waveform simulation module 10 comprises a waveform generator 11, at least two groups of filters 12 and the same number of phase shifters 13 as the filters 12, the input ends of the filters 12 are connected in parallel at the output end of the waveform generator 11, and the waveform generator 11 is used to generate a square wave signal.

[0039] The waveform simulation module 10 is the core part of the embodiment, mainly responsible for generating and processing the required square wave signal to meet the needs of the line-of-sight wargaming system. The working process of the waveform simulation module 10 starts from the waveform generator 11, which uses an operational amplifier U11 to generate a preliminary square wave signal. The operational amplifier provides the necessary operating voltage by connecting the +12V and -12V power supply, the non-inverting input end is connected with the potentiometer R12, and the reference voltage can be set by adjusting the potentiometer, and the inverting input end is grounded through the series connection of the capacitor C11, thereby generating a stable square wave output.

[0040] The square wave signal generated by the waveform generator 11 then enters the filter module 12, each filter module 12 aims to filter the fundamental wave or harmonic wave from the square wave to ensure the quality of the subsequent signal. The filter module 12 is composed of another operational amplifier U12, the input of which is connected to the output of the waveform generator 11. The non-inverting input end of U12 is connected in series with the capacitor C22 and the potentiometer R21, and the capacitor C22 and the potentiometer R21 determine the frequency response characteristics of the filter module 12. After processing, the output of U12 is outputted through the capacitor C23 after filtering, and is ready for subsequent phase adjustment.

[0041] The filtered signal is sent to the phase shifter 13, which mainly adjusts the phase of the filter module 12 output signal to make all signals consistent in phase when synthesized. The core of the phase shifter 13 includes an operational amplifier U31 and a double-pole double-throw switch SF. The input end of the switch SF is connected through the series connection of the potentiometer R32 and the capacitor C31, thereby allowing the adjustment and selection of the signal. The output signal of U31 is outputted through the resistor R34, ensuring that the phase-adjusted signal can be smoothly sent to the adder 14.

[0042] In the adder 14, all the phase-adjusted signals are synthesized into the final analog waveform. The adder 14 is composed of an operational amplifier U41, and the inverting input end is connected to the output end of each phase shifter 13. In order to adjust the amplitude of the synthesized waveform, the non-inverting input end of the adder 14 is electrically connected to the potentiometer R42, and adjusting the potentiometer R42 can change the overall gain. Finally, the synthesized analog waveform is outputted through the capacitor C41, and grounded through the resistor R43 to ensure the stability of the output signal.

[0043] Finally, the synthesized analog waveform will pass through the adjustable attenuator 15 for further adjustment of the amplitude and power of the output, to ensure that the signal is suitable for subsequent data acquisition, and the adjusted signal will finally be input to the data acquisition card 20, and after analog-to-digital conversion, it will be sent to the host computer 40 for subsequent data processing and analysis.

[0044] In the embodiment, the waveform generator 11 comprises an operational amplifier U11, the positive power supply end and the negative power supply end of the operational amplifier U11 are electrically connected with +12V voltage and -12V voltage respectively, the inverting input end of the operational amplifier U11 is connected with ground through a series capacitor C11, the non-inverting input end is electrically connected with the sliding end of a potentiometer R12, one fixed end of the potentiometer R12 is electrically connected with the output end of the operational amplifier U11, and the other fixed end is grounded, the negative electrode of a Zener diode D11 is electrically connected with the negative electrode of a Zener diode D12, the positive electrode of the Zener diode D11 is grounded, and the positive electrode of the Zener diode D12 is electrically connected with the output end of the operational amplifier U11.

[0045] The output end of the operational amplifier U11 serves as the output end of the entire waveform generator 11, and the output end of the operational amplifier U11 is further connected with ground through a resistor R13, and the output end of the operational amplifier U11 is further electrically connected with the sliding end of a potentiometer R11, one fixed end of the potentiometer R11 is grounded, and the other fixed end is suspended.

[0046] The positive power supply end and the negative power supply end of the operational amplifier U11 are connected to +12V and -12V power supply respectively, which provides the necessary voltage range for the normal operation of the operational amplifier U11, and the working principle of the operational amplifier U11 is based on the difference of the input signal, so providing dual power supply can ensure that the operational amplifier works well between positive and negative signals, and the generated output signal will be able to fluctuate symmetrically above and below the zero level, the inverting input end of the operational amplifier U11 is connected with ground through a series capacitor C11, and the capacitor C11 functions as a high-pass filter to block the direct current component, ensuring that the inverting input end only receives alternating current signals, thereby forming self-oscillation at a specific frequency and forming the required square wave output.

[0047] The non-inverting input end is electrically connected with the sliding end of the potentiometer R12, and the potentiometer R12 is used to set the reference voltage value, thereby affecting the output signal of the operational amplifier U11, when the sliding end of the potentiometer moves, the voltage of the non-inverting input end changes, thereby generating different output amplitudes through the operational amplifier U11, which provides flexibility for the amplitude adjustment of the square wave signal.

[0048] One fixed end of the potentiometer R12 is connected to the output end of the operational amplifier U11, and the other fixed end is grounded, which ensures that the output signal of the operational amplifier U11 can affect the non-inverting input through the adjustment of the potentiometer R12, thereby realizing the amplitude adjustment of the square wave. The negative electrode of the Zener diode D11 is electrically connected to the negative electrode of the Zener diode D12, and the positive electrode of the D11 is grounded, which makes the D11 serve as a negative voltage protection device to prevent the output voltage of the operational amplifier U11 from exceeding a certain negative value. Similarly, the positive electrode of the D12 is connected to the output end of the operational amplifier U11 to provide positive voltage protection, limit the maximum value of the output signal, and prevent overload.

[0049] By adjusting the position of the sliding end of the potentiometer R12, the voltage value input to the non-inverting input of the operational amplifier U11 can be changed, and this voltage value directly determines the voltage difference between the inverting input and the non-inverting input of the U11. Therefore, by adjusting the R12, the amplitude of the square wave can be controlled. The output end of the operational amplifier U11 is connected to one fixed end of the potentiometer R12, thus forming a feedback loop. The feedback configuration enables the U11 to automatically adjust the input signal according to the change of the output signal. When the amplitude of the output signal increases, the voltage of the inverting input will change accordingly, thereby affecting the output voltage. This feedback mechanism ensures the stability and adjustability of the square wave. The capacitor C11 is used to connect the inverting input to the ground, forming a high-pass filter. By selecting an appropriate capacitor value, the frequency and rise / fall time of the square wave can be affected. This means that the size of the capacitor directly affects the period and duty cycle of the square wave, thereby changing the shape of the waveform.

[0050] The filter 12 is used to filter the fundamental wave or harmonic wave in the square wave signal. The output end of each group of filters 12 is electrically connected to the input end of a group of phase shifters 13. The filter 12 includes an operational amplifier U12. The inverting input of the operational amplifier U12 is electrically connected to the sliding end of the potentiometer R25. One fixed end of the potentiometer R25 is electrically connected to the output end of the operational amplifier U12, and the other fixed end is grounded.

[0051] The capacitor C22 and the potentiometer R21 are connected in series between the non-inverting input of the operational amplifier U12 and the output end of the waveform generator 11. The connection node of the capacitor C22 and the potentiometer R21 is grounded through the capacitor C21, and the potentiometer R22 is connected in series between the output end of the operational amplifier U12 and the ground. The non-inverting input and the output end of the operational amplifier U12 are respectively grounded through the potentiometer R23 and the resistor R24. The output end of the operational amplifier U12 is connected in series with the capacitor C23, and the output end of the operational amplifier U12 serves as the output end of the filter 12.

[0052] The filter 12 is responsible for extracting the fundamental wave and harmonics from the square wave signal outputted from the waveform generator 11, and the core thereof is an operational amplifier U12 configured as a non-inverting amplifier and forming an RC low-pass filter together with a capacitor C22 and a potentiometer R21. The design of the low-pass filter allows signals with a frequency lower than a specific cutoff frequency (i.e. the fundamental wave) to pass through while suppressing high-frequency components (harmonics), thereby effectively screening the fundamental wave from the square wave.

[0053] During the process of the signal passing through the filter 12, the inverting input terminal of the U12 is connected with the potentiometer R25 to form a feedback loop. The feedback mechanism allows the amplitude of the output signal to be adjusted in real time, and the user can change the gain of the operational amplifier by adjusting the R25, thereby affecting the amplitude and quality of the final output signal, and maintaining the stability and clarity of the signal.

[0054] In order to extract specific harmonics (such as the third harmonic and the fifth harmonic), the frequency response of the filter 12 can be adjusted by adjusting the potentiometers R25, R21, R22 and R23, so that the center frequency thereof is aligned with the required harmonic frequency, thereby allowing the specific frequency (such as the third harmonic and the fifth harmonic) to pass through while suppressing other unwanted frequency components. In this way, the required harmonic signal can be accurately extracted by adjusting the resistance values of the potentiometers in the filter 12, that is, by adjusting the cutoff frequency of the filter 12, the selective extraction of specific harmonics can be achieved. By adjusting the resistance values of the potentiometers in the filter 12, the frequency response can be changed so that the center frequency of the passband of the filter 12 is aligned with the required harmonic frequency. In the present embodiment, multiple filters 12 are provided, which can be set to extract the fundamental wave or multiple corresponding frequency harmonics, and finally simulate various waveforms.

[0055] The output terminals of all the phase shifters 13 are connected in parallel to the input terminals of the adder 14, the phase shifters 13 are used to adjust the phase of the fundamental wave or harmonics outputted from the filter 12 so that the phases of all the fundamental waves and harmonics are consistent, and the adder 14 is used to synthesize the adjusted fundamental wave and harmonics to obtain an analog waveform.

[0056] In the present embodiment, the phase shifter 13 includes an operational amplifier U31 and a double-pole double-throw switch SF, the output terminal of the operational amplifier U31 is connected in series with a resistor R34 and serves as the output terminal of the phase shifter 13, and the inverting input terminal thereof is connected in series with a resistor R31 and serves as the input terminal of the phase shifter 13.

[0057] The switch SF has two input terminals and four output terminals, two input terminals are electrically connected through the series potentiometer R32, capacitor C31 and the same phase input terminal of operational amplifier U31 respectively, two output terminals are grounded, and the other two output terminals are electrically connected with the input terminal of phase shifter 13, the switch SF realizes that two input terminals are grounded at the same time by switching the connection relationship of input terminals and output terminals, and the other is connected with the input terminal of phase shifter 13, and the output terminal and the inverting input terminal of operational amplifier U31 are electrically connected through resistance R33.

[0058] The function of phase shifter 13 is to adjust the phase of fundamental wave and harmonic wave output by corresponding filter 12 to ensure that the phases of all signals are consistent, thereby facilitating subsequent signal synthesis, and the core of phase shifter 13 is operational amplifier U31 and double-pole double-throw switch SF, operational amplifier U31 is configured as an inverting amplifier, which is responsible for phase adjustment of the input signal, and the inverting input terminal of operational amplifier U31 is connected with the input signal through resistance R31, and the output terminal of operational amplifier generates an adjusted signal through resistance R34 as the output of phase shifter.

[0059] The design of switch SF makes it possible to flexibly switch the path of input signal, and the switch SF has two input terminals, which are connected to the series-connected potentiometer R32 and capacitor C31, and the two elements provide appropriate gain and phase adjustment for the signal, the potentiometer R32 can adjust the amplitude of the input signal, and the capacitor C31 is used for filtering to ensure that the direct current offset of the input signal is eliminated and the transmission of alternating current signal is allowed, and the switch SF ensures that one input terminal is grounded and the other is connected to the same phase input terminal of operational amplifier U31 according to different connection states.

[0060] When the switch SF switches to a certain state during the operation of phase shifter 13, the operational amplifier U31 will process the input signal according to the amplitude and phase of the input signal, and output a signal with consistent phase but possibly adjusted amplitude, and resistance R33 connects the output terminal of operational amplifier with the inverting input terminal to form a feedback loop, which helps to stabilize the gain of operational amplifier U31 and ensures the quality and accuracy of the output signal. This configuration enables the phase shifter to maintain good phase adjustment performance at different frequencies, thereby meeting the requirements of signal synthesis.

[0061] The phase shifter 13 can effectively adjust the fundamental wave and the harmonic wave from the filter 12 to the same phase, so that when the signals are synthesized in the adder 14, all the signals can be superimposed on each other without phase interference, ensuring that the output analog waveform has good low distortion characteristics. The input end of the phase shifter 13 is connected to the input signal through a resistor R31 and is connected in parallel with a capacitor C31, which forms an RC network. The RC network has the characteristic of producing different phase delays for signals of different frequencies. The potentiometer R32 connected to the switch SF allows the resistance value of the input signal to be adjusted, thereby changing the time constant of the RC network and affecting the phase delay. In this way, by adjusting the potentiometer R32, the phase of the signal can be accurately controlled.

[0062] The adder 14 includes an operational amplifier U41, the inverting input end of which serves as the input end of the adder 14, and the non-inverting input end is electrically connected to the sliding end of a potentiometer R42. One fixed end of the potentiometer R42 is electrically connected to the power supply VCC, and the other fixed end is grounded. The inverting input end and the output end of the operational amplifier U41 are electrically connected to the potentiometer R41, and the output end is connected in series with the capacitor C41 before serving as the output end of the adder 14. The output end of the adder 14 is also connected to the ground through a resistor R43.

[0063] The output end of the adder 14 is electrically connected to the input end of the adjustable attenuator 15, and the output end of the adjustable attenuator 15 is electrically connected to the data acquisition card 20. The adjustable attenuator 15 is used to adjust the amplitude and power of the analog waveform and transmit the adjusted analog waveform to the data acquisition card 20. The data acquisition card 20 is electrically connected to the host computer 40 and is used to send the analog waveform after analog-to-digital conversion to the host computer 40.

[0064] The function of the adjustable attenuator 15 is to adjust the signal amplitude output by the adder 14 as needed and send it to the data acquisition card 20 while maintaining the waveform characteristics of the signal to ensure that it does not distort during processing. In this embodiment, AD8308 is used as the core chip of the adjustable attenuator 15. The output signal from the adder 14 is connected to the input end of AD8308. The gain value of AD8308 is set through a microcontroller or a digital control interface. The control signal can be a digital signal issued by the host computer 40. The gain is adjusted to achieve the desired attenuation. The gain adjustment circuit inside AD8308 adjusts the amplitude of the input signal in real time according to the set control signal, and outputs the attenuated analog waveform. The adjusted signal is transmitted from the output end of AD8308 to the data acquisition card 20. The data acquisition card 20 is responsible for converting the adjusted analog waveform into a digital signal and transmitting it to the host computer 40 for subsequent analysis and processing. The model of the data acquisition card 20 used is TEWS TDM-224.

[0065] In this embodiment, the adder 14 is configured as an inverting adder using an operational amplifier U41, which can add multiple input signals to output a processed signal, the inverting input terminal of the operational amplifier U41 is connected to the input terminal of the adder to receive input signals from other signal sources, due to the inverting input characteristics of the operational amplifier U41, the input signals are fed back through the connected potentiometer R41 to generate an output negatively related to the input signals at the output terminal, the sliding terminal of the potentiometer R42 is connected to the non-inverting input terminal, and the signal is correspondingly biased to adjust the gain of the adder and the reference level of the output signal, the potentiometer R41 is connected between the output terminal and the inverting input terminal of the operational amplifier to form a feedback loop, and by adjusting the resistance values of R41 and R42, the signal gain of the adder 14 can be flexibly controlled.

[0066] The output terminal of the adder is connected through a capacitor C41 to form a high-pass filter, which can effectively isolate the direct current bias component and ensure that the output signal is mainly an alternating current component, in addition, the output terminal is connected to ground through a resistor R43 to provide a stable reference and limit the amplitude of the output signal.

[0067] The signal simulation module 30 and the upper computer 40 are electrically connected, the signal simulation module 30 is used for generating and simulating radio frequency signals and communicating with the upper computer 40, the upper computer 40 is a computer or processing device used for controlling and managing the whole visual war game system, the signal simulation module 30 generates and simulates various radio frequency signals to provide necessary signal environment for the war game and help decision makers analyze actual effects and predict possible actual situations.

[0068] In this embodiment, the signal simulation module 30 includes a radio frequency interface module 31, the radio frequency interface module 31 and a radio frequency transceiver module 32 are electrically connected, used for connecting with external radio frequency devices and providing input and output interfaces of radio frequency signals, the radio frequency transceiver module 32 and an FPGA module 33 are electrically connected, used for respectively demodulating and modulating the radio frequency signals received and transmitted by the radio frequency interface module 31 and sending the processed radio frequency signals to the FPGA module 33, the FPGA module 33 and an interface module 34 are electrically connected, used as a controller to process the received radio frequency signals, the interface module 34 and the upper computer 40 are electrically connected, used for providing a data transmission interface between the FPGA module 33 and the upper computer 40 to complete the communication between the FPGA module 33 and the upper computer 40.

[0069] Further, the radio frequency transceiver module 32 adopts a radio frequency transceiver circuit based on an LMS7002M chip, the FPGA module 33 is based on an EP4CE55F23 chip, and the interface module 34 adopts a PXI interface circuit based on a PCI9054 chip.

[0070] The main function of the radio frequency interface module 31 is to provide a connection with external radio frequency devices and an input and output interface for signals. It receives external radio frequency signals and transmits them to the radio frequency transceiver module 32 for subsequent processing. Meanwhile, the module is also responsible for outputting the signals processed by the radio frequency transceiver module 32 to external devices. The radio frequency transceiver module 32 is based on the LMS7002M chip and is responsible for modulating and demodulating the received radio frequency signals. This module demodulates the radio frequency signals accessed by the radio frequency interface module 31 and converts them into low-frequency baseband signals for subsequent processing. At the same time, the module modulates the baseband signals from the FPGA module 33 into radio frequency signals and sends them to external devices through the radio frequency interface module 31. The FPGA module 33 is based on the EP4CE55F23 chip and serves as the core controller of the signal simulation module. It is responsible for receiving signals processed by the radio frequency transceiver module 32 and performing further digital signal processing.

[0071] The interface module 34 is based on the PCI9054 chip and serves as a bridge between the FPGA module 33 and the host computer 40, responsible for data transmission and communication. This module can achieve high-speed data transmission and ensure real-time communication between the FPGA and the host computer. Specifically, the interface module packages and sends the data processed by the FPGA to the host computer 40, and vice versa. The host computer 40 can also send control instructions or configuration parameters to the FPGA through the interface to achieve bidirectional communication.

[0072] The radio frequency interface module 31 uses SMA connectors to provide radio frequency signal input and output ports. These ports are used to connect external radio frequency devices to ensure effective signal transmission. The output port of the radio frequency interface module 31 is connected to the receiving input port of the radio frequency transceiver module 32, which is used to send external radio frequency signals to the radio frequency transceiver module 32 for processing. The connection between the radio frequency transceiver module 32 and the FPGA module 33 uses the LVDS interface to ensure high-speed data transmission. The connection between the FPGA module 33 and the interface module 34 is completed through PCI. The connection between the interface module 34 and the host computer 40 generally uses a standard PCI interface connection.

[0073] The radio frequency interface module 31 includes RF connectors and RF matching networks. In the radio frequency interface module 31, the selection of RF connectors is mainly based on factors such as frequency range, insertion loss, and mechanical strength, using SMA or N-type connectors, which are suitable for application in the radio frequency transceiver module 32 based on the LMS7002M chip. RF matching networks are used to optimize the transmission of radio frequency signals, using L-type, π-type, or T-type matching networks. These networks can be designed according to the impedance of input and output devices to ensure maximum power and reduce reflection loss.

[0074] Although the embodiments of the present application are described in conjunction with the drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope of the appended claims.

Claims

1. A high-precision-based line-of-sight wargaming system, characterized by, The waveform simulation module (10), the data acquisition card (20), the signal simulation module (30) and the host computer (40) are connected, wherein: The waveform simulation module (10) comprises a waveform generator (11), at least two groups of filters (12) and the same number of phase shifters (13) as the filters (12), the input end of the filter (12) is connected in parallel at the output end of the waveform generator (11), the waveform generator (11) is used for generating square wave signal, the filter (12) is used for screening the fundamental wave or harmonic wave in the square wave signal, the output end of each group of filters (12) and the input end of a group of phase shifters (13) are electrically connected, the output end of all phase shifters (13) is connected in parallel at the input end of the adder (14), the phase shifters (13) are used for adjusting the phase of the fundamental wave or harmonic wave output by the filter (12), so that the phases of all fundamental waves and harmonic waves are consistent, and the adder (14) is used for synthesizing the fundamental wave and the harmonic wave after adjusting the phase to obtain the simulation waveform; The output end of the adder (14) and the input end of the adjustable attenuator (15) are electrically connected, the output end of the adjustable attenuator (15) and the data acquisition card (20) are electrically connected, the adjustable attenuator (15) is used for adjusting the amplitude and power of the simulation waveform, and the adjusted simulation waveform is transmitted to the data acquisition card (20), the data acquisition card (20) and the host computer (40) are electrically connected, and are used for sending the simulation waveform after analog-to-digital conversion to the host computer (40); The signal simulation module (30) and the host computer (40) are electrically connected, and the signal simulation module (30) is used for generating and simulating radio frequency signals and communicating with the host computer (40).

2. The high-precision-based line-of-sight war game system according to claim 1, wherein: The signal simulation module (30) comprises a radio frequency interface module (31), the radio frequency interface module (31) and a radio frequency transceiver module (32) are electrically connected, are used for connecting with external radio frequency equipment, and provide input and output interfaces of radio frequency signals, the radio frequency transceiver module (32) and an FPGA module (33) are electrically connected, are used for respectively demodulating and modulating the radio frequency signals received and transmitted by the radio frequency interface module (31), and transmitting the processed radio frequency signals to the FPGA module (33), the FPGA module (33) and an interface module (34) are electrically connected, are used as a controller to process the received radio frequency signals, and the interface module (34) and the host computer (40) are electrically connected, are used for providing a data transmission interface between the FPGA module (33) and the host computer (40), and completing communication between the FPGA module (33) and the host computer (40).

3. The high-precision-based line-of-sight wargaming system according to claim 2, wherein: The radio frequency transceiver module (32) adopts a radio frequency transceiver circuit based on an LMS7002M chip, the FPGA module (33) is based on an EP4CE55F23 chip, and the interface module (34) adopts a PXI interface circuit based on a PCI9054 chip.

4. The high-precision-based line-of-sight war game system according to claim 1, wherein: The waveform generator (11) includes an operational amplifier U11, the positive power supply end and the negative power supply end of the operational amplifier U11 are electrically connected with +12V voltage and -12V voltage respectively, the inverting input end of the operational amplifier U11 is connected with ground through a series capacitor C11, the non-inverting input end is electrically connected with the sliding end of a potentiometer R12, one fixed end of the potentiometer R12 is electrically connected with the output end of the operational amplifier U11, the other fixed end is connected with ground, the negative electrode of a Zener diode D11 is electrically connected with the negative electrode of a Zener diode D12, the positive electrode of the Zener diode D11 is connected with ground, the positive electrode of the Zener diode D12 is electrically connected with the output end of the operational amplifier U11; The output end of the operational amplifier U11 is used as the output end of the whole waveform generator (11), and the output end of the operational amplifier U11 is further connected with ground through a resistor R13, and the output end of the operational amplifier U11 is further electrically connected with the sliding end of a potentiometer R11, and one fixed end of the potentiometer R11 is connected with ground.

5. The high-precision-based line-of-sight war game system according to claim 4, characterized in that: The filter (12) includes an operational amplifier U12, the inverting input end of the operational amplifier U12 is electrically connected with the sliding end of a potentiometer R25, one fixed end of the potentiometer R25 is electrically connected with the output end of the operational amplifier U12, and the other fixed end is connected with ground; The non-inverting input end and the output end of the operational amplifier U12 are connected with a capacitor C22 and a potentiometer R21 in sequence, the connecting node of the capacitor C22 and the potentiometer R21 is connected with ground through a capacitor C21, and is connected with the output end of the operational amplifier U12 through a potentiometer R22 in series, the non-inverting input end and the output end of the operational amplifier U12 are connected with ground through a potentiometer R23 and a resistor R24 respectively, and the output end of the operational amplifier U12 is connected with a capacitor C23 in series and used as the output end of the filter (12).

6. The high-precision-based line-of-sight war game system according to claim 5, characterized in that: The phase shifter (13) includes an operational amplifier U31 and a switch SF with double-throw double-pole structure, the output end of the operational amplifier U31 is connected with a resistor R34 in series and used as the output end of the phase shifter (13), and the inverting input end is connected with a resistor R31 in series and used as the input end of the phase shifter (13); The switch SF has two input terminals and four output terminals, the two input terminals are electrically connected with ground through a series potentiometer R32, a capacitor C31 and the non-inverting input end of the operational amplifier U31 respectively, two output terminals are connected with ground, the other two output terminals are electrically connected with the input end of the phase shifter (13), the switch SF changes the connection relationship between the input terminals and the output terminals, so that the two input terminals are connected with ground at the same time, and the other two input terminals are connected with the input end of the phase shifter (13), and the output end and the inverting input end of the operational amplifier U31 are electrically connected through a resistor R33.

7. The high-precision-based line-of-sight war game system according to claim 6, characterized in that: The adder (14) comprises an operational amplifier U41, the inverting input end of the operational amplifier U41 is used as the input end of the adder (14), the non-inverting input end is electrically connected with the sliding end of the potentiometer R42, one fixed end of the potentiometer R42 is electrically connected with the power supply VCC, the other fixed end is grounded, the inverting input end and the output end of the operational amplifier U41 are electrically connected with the potentiometer R41, the output end is connected with the capacitor C41 in series and then used as the output end of the adder (14), and the output end of the adder (14) is also grounded through the resistor R43.

Images