High-voltage-resistant sensor

Abstract

According to the high-pressure-resistant sensor provided by the invention, the silicon island film structure is arranged at the cavity in the back surface of the pressure sensor, so that the pressure sensitive elements are all located at positions with relatively large stress, and the sensitivity of the sensor is improved; meanwhile, the hollow SIO film layer with the hexagonal micropore silicon net structure is manufactured on the silicon island film structure, when high-speed gas impacts the hollow SIO film layer, the impact force of the gas is buffered based on the micro-deformation of the hexagonal micropore silicon net structure, the gas cannot be influenced to penetrate through the hollow layer, the pressure sensing film layer of the pressure sensor is effectively protected, and the service life of the pressure sensor is prolonged. And the service life of the pressure sensor is prolonged. The pressure sensor is low in production cost, high in test sensitivity and long in service life.

Description

Technical Field

[0001] This utility model relates to the field of pressure sensor technology, specifically a high-pressure-resistant sensor. Background Technology

[0002] Silicon piezoresistive pressure sensors are the most commercially available and widely used MEMS pressure sensors. They are made using the piezoresistive effect of single-crystal silicon. Four equal-value semiconductor resistors are diffused in a specific direction on a silicon diaphragm and connected to form a Wheatstone bridge, which serves as the sensing element of the force-to-electrical converter. When the diaphragm is subjected to external pressure, the bridge becomes unbalanced. If an excitation power supply (constant current and constant voltage) is applied to the bridge, an output voltage proportional to the measured pressure can be obtained, thus achieving the purpose of pressure measurement.

[0003] Typically, to improve sensor sensitivity, technicians reduce the diaphragm thickness. However, in some applications, such as exhaust gas detection in large-scale industrial production, high-flow-rate gas impacts the pressure sensor at high speeds, subjecting it to pressures exceeding 10 MPa. Reducing the diaphragm thickness in such environments shortens the sensor's lifespan. Furthermore, pressure sensors made from special materials are very expensive. Summary of the Invention

[0004] To address the problem that existing pressure sensors cannot achieve a balance between cost and sensitivity under high-pressure testing environments, this invention provides a high-pressure-resistant sensor that has low production costs, high testing sensitivity, and a long service life.

[0005] The structure of this utility model is as follows: a high-pressure resistant sensor, comprising: a second silicon layer (4), a second isolation layer (3), and a first silicon layer (1) arranged from top to bottom, characterized in that:

[0006] A cavity is provided in the first silicon layer (1) to reach the second isolation layer (3), and a silicon island film structure (11) is provided in the cavity on the lower surface of the second isolation layer (3); the lower part of the silicon island film structure (11) is provided as a hollow structure (12).

[0007] The hollow structure (12) is a hollow structure with a microporous silicon mesh structure.

[0008] Its further features are:

[0009] The micropores of the hollow structure (12) are hexagonal micropores;

[0010] The hollow structure includes: a horizontally arranged hexagonal micro-hole array structure, with the horizontal positions of two adjacent rows of hexagonal micro-hole structures being staggered.

[0011] The hollowing depth of the hollow structure is 1 / 3 to 1 / 2 of the thickness of the silicon island film structure (11);

[0012] The thickness of the silicon island film structure (11) is 10-30 μm;

[0013] The second isolation layer (3) is located on the lower surface of the cavity, and the hollow structure is also provided on both sides of the silicon island membrane structure (11);

[0014] The second silicon layer (4) contains a sensitive resistor element (5) and a P+ doped layer (6). The P+ doped layer (6) connects several sensitive resistor elements (5) together and forms a Wheatstone bridge with the metal.

[0015] An oxide layer (7) is provided on the upper surface of the second silicon layer (4), and a through hole (8) is provided in the oxide layer (7). Metal (9) fills the through hole (8) to connect the P-doped layer (6), and metal (9) forms a bonding pad on the surface of the oxide layer (7).

[0016] This application provides a high-pressure-resistant sensor. By incorporating a silicon island membrane structure in the cavity on the back of the pressure sensor, the pressure-sensitive elements are positioned at locations of high stress, thus improving the sensor's sensitivity. Simultaneously, a perforated SiO2 membrane layer with a hexagonal microporous silicon mesh structure is fabricated on the silicon island membrane structure. When high-speed gas impacts this perforated SiO2 membrane layer, the micro-deformation of the hexagonal microporous silicon mesh structure buffers the impact force of the gas without affecting gas permeation through the perforated layer, effectively protecting the pressure-sensitive membrane layer of the pressure sensor and extending its service life. The pressure sensor of this application has low production cost, high testing sensitivity, and a long service life. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the overall structure of a high-voltage-resistant sensor;

[0018] Figure 2 This is the initial part of the manufacturing process for high-sensitivity, high-pressure-resistant sensors.

[0019] Figure 3 The process for fabricating silicon island film structures for high-sensitivity, high-voltage-resistant sensors;

[0020] Figure 4 The manufacturing process of hollow structures;

[0021] Figure 5 A schematic diagram of the intermediate structure for transforming a PS sphere into a hexahedral prism;

[0022] Figure 6This is a schematic diagram of the hexahedral prism structure obtained after PS spherical deformation;

[0023] Figure 7 This is a schematic diagram of a hexagonal microporous silicon mesh structure. Detailed Implementation

[0024] like Figure 1 As shown, this application includes a high-voltage sensor, comprising: a second silicon layer (4), a second isolation layer (3), and a first silicon layer (1) disposed from top to bottom. A sensitive resistor element (5) and a P+ doped layer (6) are disposed in the second silicon layer (4). The P+ doped layer (6) connects several sensitive resistor elements (5) together and forms a Wheatstone bridge together with metal. An oxide layer (7) is disposed on the upper surface of the second silicon layer (4). Through holes (8) are disposed in the oxide layer (7). Metal (9) fills the through holes (8) and connects to the P+ doped layer (6). The metal (9) forms bonding pads on the surface of the oxide layer (7).

[0025] A cavity is provided in the first silicon layer (1) to reach the second isolation layer (3). A silicon island membrane structure (11) is provided on the lower surface of the second isolation layer (3) in the cavity. A hollow structure (12) is provided on the lower surface of the silicon island membrane structure (11). The hollow structure (12) is a hollow structure with a microporous silicon mesh structure.

[0026] The micropores in the hollow structure can be set to various shapes such as circles, rectangles, triangles, and irregular shapes. However, in order to ensure the maximum density of the subsequently generated hexagonal hollow holes, this application uses hexagonal micropores in the hollow structure. The hexagonal micropores in the hollow structure form a horizontally arranged hexagonal micropore array structure. The horizontal positions of two adjacent rows of hexagonal micropore structures are staggered to ensure that the gaps between the micropores in the hexagonal micropore array structure are minimized.

[0027] The depth of the perforated structure is 1 / 3 to 1 / 2 of the thickness of the silicon island film structure (11); in this embodiment, the thickness of the silicon island film structure (11) is 10-30 μm. The specific depth can be adjusted according to actual needs. In specific applications, perforated structures can also be set on the lower surface of the second isolation layer (3) located in the cavity, on both sides of the silicon island film structure (11), according to actual needs.

[0028] The specific manufacturing method of the high-voltage sensor in this application is as follows: Figures 2-4 As shown, the specific steps include:

[0029] S1: Preparation of SOI silicon wafers.

[0030] High-energy (120-200keV) oxygen ions (0.3-1.8e18cm-2) are implanted into a silicon wafer, and the high-energy implanted oxygen ions are distributed below the surface of the silicon wafer. Then, after annealing at high temperature (900-1500°C) for 3-6 hours, the oxygen ions in the silicon wafer react chemically with the silicon, forming a silicon dioxide insulating layer material with a thickness of about 300-500nm below the surface of the silicon wafer. This forms a first silicon layer (1) and a second isolation layer (3) with a thickness of 300-600nm on its upper surface, as well as a second silicon layer (4) on the upper surface of the second isolation layer. Subsequently, a first silicon dioxide isolation layer (2) with a thickness of about 0.3-0.5μm is formed on the lower surface of the first silicon layer using PECVD. These multiple layers constitute an SOI silicon wafer. The final SOI silicon wafer includes, from top to bottom, a second silicon layer (4), a second isolation layer (3), a first silicon layer (1), and a first silicon dioxide isolation layer (2), as shown. Figure 2 As shown in Figure a.

[0031] S2: P+ and P- ion implantation forms a piezoresistive sensing element.

[0032] On the second silicon layer (4), boron ions with an energy of 80 keV and a dose of 5 × 10e15 cm-2 are implanted to lightly dope and form a P-doped layer, forming a sensitive resistor element (5); then, boron ions with an implantation energy of 200 keV and a dose of 1.57 × 10e14 cm-2 are implanted on the second silicon layer (4) to heavily dope and form a P+ doped layer (6) to form an ohmic contact electrical connection. The process schematic diagram is shown below. Figure 2 As shown in b, the map is as follows Figure 2 As shown in b', the heavily doped structure connects several varistors together, forming a Wheatstone bridge with the metal. To reduce resistance errors in the circuit, the resistance of the internal interconnect structure should be as small as possible. Furthermore, to ensure ohmic contact with the metal, the doping concentration of the internal interconnect structure needs to be sufficiently high to reduce the width of the Schottky barrier between it and the metal. The silicon wafer is then subjected to high-temperature annealing at 1050°C for 90 minutes. After high-temperature annealing, lattice damage on the silicon wafer is repaired, and the dopant ions re-diffuse and are activated, forming N-type and P-type regions in the silicon wafer that meet the design requirements.

[0033] S3: Grow an oxide layer and etch through holes.

[0034] A 50nm thick oxide layer (7) is grown on the second silicon layer (4), and then dry etching is performed on 7 to form a via (8). The process diagram is shown below. Figure 2 As shown in C, the map is as follows: Figure 2 As shown in c'.

[0035] S4: Metal sputtering and patterning;

[0036] A 1-1.5 μm thick metal layer (9) is sputtered onto the surfaces of the via (8) and oxide layer (7) using magnetron sputtering. The sputtered metal is used to form metal interconnects and bonding pads between varistors, and also as a sealing material to seal the via. The thickness of the sputtered metal is greater than the thickness of the via to ensure that the via is completely filled. The process schematic is shown in the figure. Figure 2 As shown in d, the map is as follows Figure 2 As shown in d'.

[0037] S5: Dry etching of the first insulating layer (2) on the back of the silicon wafer, with the silicon substrate (1) as the etching stop layer, forms a mask layer (10) for etching the silicon island film structure. In this step, the first insulating layer (2) is etched to form the mask layer (10) for etching the silicon island film structure. The process diagram is shown below. Figure 3 As shown in e, the map is as follows Figure 3 As shown in e'.

[0038] S6: The silicon wafer is etched with KOH solution to form a silicon island film structure (11) on the silicon substrate (1) based on the mask layer (10).

[0039] To shorten the etching time and precisely control the thickness of the pressure-sensing diaphragm, this application employs a two-step etching method to generate the silicon island membrane structure. The first step is coarse etching, the specific steps of which are as follows:

[0040] c1: Photoresist is applied to the position of the silicon island film structure on the silicon substrate (1) for protection;

[0041] c2: A 25% KOH solution was used for coarse etching in an 80°C water bath to etch left and right double windows on the first silicon layer (1) serving as the substrate; the photoresist-protected area formed a boss structure. During the etching process, the etching depth was measured every hour using a profilometer, and the measurement frequency was increased when approaching the target etching depth.

[0042] The first step is as follows Figure 3 As shown in Figure f, the main process involves coarse etching of the left and right double windows on both sides of the silicon island film structure (11) on the silicon substrate. Photoresist is applied to the middle position to protect and slow down the etching rate of the mass block structure. The final etching depth of the left and right double windows is approximately 100~200 μm, and the etching depth of the middle mass block is approximately 20~50 μm. The position of the silicon island film structure (11) in the bottom cavity is shown in Figure f. Figure 3 As shown in f'.

[0043] The second step is fine etching, and the specific steps are as follows:

[0044] c3: Remove the photoresist protective film;

[0045] c4: Fine etching is performed using a 45% KOH solution in a 60°C water bath. In this step, the window and the boss are etched simultaneously. The window is etched up to the second isolation layer (3) to generate a silicon island film structure (11).

[0046] During the etching process, the etching depth was measured every half hour using a profilometer. This step has a relatively fast etching rate, saving time, and the double-window and intermediate protrusion structures are etched simultaneously, with silicon oxide 3 serving as the stop layer, until the silicon substrate of the double-window is etched down to the stop layer, ultimately forming the structure shown below. Figure 3 The middle boss shown in g is retained as a 10-30μm mass block silicon island film structure (11), and the etching depth of the left and right double windows and the middle silicon island mass block is about 200~350um during the process.

[0047] like Figure 4 As shown, steps S7 to S8 involve hollowing out the silicon island membrane structure (11) to obtain a silicon island membrane structure with a hollowed-out structure (12).

[0048] S7: The pressure sensor structure outside the silicon island membrane structure is protected by photoresist. Then, the surface of the silicon island membrane structure is placed on a hot plate and heated at 100°C for half an hour for cleaning. After cleaning, it is thinned to a preset thickness. The specific thickness is set according to the pressure accuracy requirements. In this embodiment, the thickness is set to 150-250 μm.

[0049] S8: A gas-liquid interface self-assembly method is used on the surface of the thinned silicon island film structure to lay a single layer of basic array body for later use, forming the substrate to be processed; the basic array body includes multiple rows and columns of independent array bodies; the shape of the independent array body includes: sphere, cylinder or cube; the specific shape adopted is set according to the processing cost and the shape requirements of the voids in the hollow layer.

[0050] In this embodiment, the base array is composed of ordered hexagonal close-packed polystyrene (PS) spheres. Using PS spheres as the base array is simple and inexpensive. The PS spheres are placed on the surface of the silicon island film structure in a hexagonal close-packed structure, with six PS spheres per group. Adjacent rows of PS spheres are staggered, reducing the fill ratio between the spheres and ensuring a high density of hexagonal perforations, resulting in a film layer with a high perforation density. The gas-liquid interface self-assembly method is existing technology and can be implemented using existing processes. In practical applications, perforations can also be directly fabricated on the surface of the silicon island film structure using photolithography. However, the precision of perforations fabricated using existing photolithography is low, limited to micrometers. This application, however, can achieve high-precision fabrication at the nanometer level using a simple process.

[0051] The diameter of the PS spheres controls the size of the subsequent perforated structure; if the perforated structure is too small, the test sensitivity will be reduced, and if it is too large, the lifespan of the perforated layer will be reduced. The specific size is set according to actual needs. In this embodiment, the diameter of the single layer of ordered hexagonal close-packed polystyrene resin PS spheres is controlled between 300 and 500 nm.

[0052] S9: Plasma etching is performed on the substrate to be treated to form small PS spheres with gaps after etching; specific etching conditions include:

[0053] O2 was used as the working gas, with the gas flow rate controlled at 100–500 scc / min, the gas pressure maintained at 1–6 kPa, the etching power controlled at 100–350 W, and the total etching time set to the high setting of 5 min.

[0054] S10: Heat the substrate to be processed in an oven for 100~200s to make the PS spheres bond more tightly with the silicon substrate. At the same time, the temperature increase can make the shape of the PS spheres tend to be hexagonal prisms, and the resulting hexagonal cross arrangement structure will be more stable.

[0055] like Figure 5 , Figure 6 and Figure 7 This is a schematic diagram of the microstructure of a material surface as observed by a scanning electron microscope (SEM). Figure 5 During the process of the PS sphere transforming into a hexagonal prism, it is in an intermediate state where its shape is cylindrical. Figure 6 This is a schematic diagram of the final hexagonal prism structure on the back. Figure 7 This is a schematic diagram of a hexagonal cross-arranged microporous structure.

[0056] Specifically, the mechanism by which elevated temperature causes polystyrene (PS) microspheres to transform from spherical to hexahedral prisms is primarily based on the synergistic effect of thermodynamics and interfacial interactions. When the temperature exceeds the glass transition temperature of PS (Tg≈100℃), the mobility of molecular chain segments increases, and the spheres transition from a rigid state to a viscoelastic state. Surface tension drives their evolution towards the lowest energy form. In close-packed arrays, the geometric constraints of adjacent spheres force local flattening of the spherical surface, forming the angular structure of hexahedral prisms (with an included angle of approximately 120°). This process is simultaneously regulated by interfacial energy: heating reduces the contact energy (γSL) between PS and the substrate or adjacent spheres, causing the spheres to undergo plastic deformation under thermal perturbation. The angular structure of the hexahedral prisms minimizes the combined energy of surface tension and contact pressure, so the spheres gradually transform into cylinders, and then into hexahedral prisms. If the system contains micro-regional order (such as stereoregular chain segments), anisotropic deformation may also be induced through crystallization. The experiment requires precise control of the heating rate (e.g., 2℃ / min) to balance deformation kinetics and the risk of thermal melting, ultimately achieving a controllable transformation from a sphere to a hexahedral prism.

[0057] S11: For the heated substrate, using the etched interstitial PS hexagonal prisms as a seed layer, LPCVD deposition is performed to obtain a SiO2 layer with a thickness less than the height of the hexagonal prisms. In this embodiment, a 150~250nm SiO2 layer is deposited after LPCVD deposition; this thickness of SiO2 will not completely submerge the hexagonal PS structure, and a hexagonal cross-arranged microporous SiO2 layer will be formed on the outside of the hexagonal prisms. The upper film will not penetrate the lower substrate SI through the SiO2.

[0058] S12: The hexagonal prism structure is removed using a lift-off process combined with ultrasonic vibration, resulting in a SiO2 etched protective layer with a micropore array. Refer to the attached diagram in the instruction manual for a schematic diagram of the specific hexagonal cross-arranged micropore structure. Figure 7 .

[0059] In this embodiment, the ultrasonic oscillation time is set to 30~60min, the ultrasonic frequency is 40~70KHz, and the power is 500~1000W.

[0060] S13: RIE etching is performed on the substrate after the lift-off process to etch the silicon substrate. The area covered with SiO2 serves as an etching protection zone and will not be etched. Other microporous areas are etched to form a hexagonal microporous silicon mesh substrate. Specific experimental conditions for RIE etching of the silicon substrate include:

[0061] SF6 was used as the working gas, with the gas flow rate controlled at 20–50 scc / min, the gas pressure maintained at 1–4 kPa, the etching power controlled at 150–250 W, and the total etching time set to the high setting of 2 min.

[0062] S14: The SIO layer on top of the silicon island membrane structure is removed by wet etching, and a hexagonal microporous silicon mesh structure is finally obtained on the surface of the silicon island membrane structure (12).

[0063] Excessive accumulation of tiny particles on the pressure-sensitive membrane surface can affect the sensor's sensitivity. Conventional sensor pressure-sensitive membranes lack microporous structures, leading to the adhesion and accumulation of tiny particles due to electrostatic effects during use. However, the nanoscale microporous structure in this application avoids electrostatic effects, and the nanoscale pore size prevents particle entry, with most particles being washed away by the airflow. The hexagonal microporous SiO2 film layer in this application possesses a dual mechanism: turbulent dissipation and particle guidance. Through turbulent dissipation, airflow shear stress is reduced by 30-60%, lowering the probability of structural damage. Based on the particle guidance mechanism, the self-dust removal capability of the pores is increased, maintaining the sensitivity of the pressure-resistant membrane and extending the sensor's lifespan. These two mechanisms significantly improve the sensor's performance at high speeds (>100 m / s) and high particle concentrations (50 mg / m³). 3 Reliability in an environment.

[0064] By using the technical solution of this utility model, no special materials are needed to install the generated hollow structure membrane onto the sensor, thereby extending the service life of the gas pressure sensor at a lower cost.

Claims

1. A high-voltage tolerant sensor comprising: The second layer of silicon (4), the second layer of isolation layer (3) and the first layer of silicon (1) are arranged from top to bottom, characterized in that: The first layer of silicon (1) is provided with a cavity reaching the second layer of isolation layer (3), and a silicon island film structure (11) is arranged on the lower surface of the second layer of isolation layer (3) in the cavity; the lower part of the silicon island film structure (11) is provided with a hollow structure (12); The hollow structure (12) is a hollow structure with a microporous silicon mesh structure.

2. The high voltage sensor of claim 1, wherein: The micropore of the hollow structure (12) is a hexagonal micropore.

3. The high voltage sensor of claim 2, wherein: The hollow structure includes a transversely arranged hexagonal micropore array structure, and the transverse positions of two rows of adjacent hexagonal micropore structures are staggered.

4. The high voltage sensor of claim 1, wherein: The hollow depth of the hollow structure is 1 / 3-1 / 2 of the thickness of the silicon island film structure (11).

5. The high voltage sensor of claim 1, wherein: The thickness of the silicon island film structure (11) is 10-30 μm.

6. The high voltage sensor of claim 1, wherein: The second layer of isolation layer (3) is arranged on the lower surface in the cavity and also on the positions on both sides of the silicon island film structure (11).

7. The high voltage sensor of claim 1, wherein: The second layer of silicon (4) is provided with a sensitive resistance element (5) and a P+ doped layer (6), the P+ doped layer (6) connects several sensitive resistance elements (5) together, and together with metal forms a Wheatstone bridge.

8. The high voltage sensor of claim 1, wherein: An oxide layer (7) is arranged on the upper surface of the second layer of silicon (4), a through hole (8) is arranged in the oxide layer (7), and metal (9) fills the through hole (8) to connect the P- doped layer (6), and the metal (9) forms a bonding pad on the surface of the oxide layer (7).

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