Function realization system and household appliance

By using a connection between a first circuit board and a second circuit board in household appliances, combined with signal processing and analog-to-digital conversion, the problem of increased wiring caused by increased load is solved, achieving cost savings and reduced size.

CN223926778UActive Publication Date: 2026-02-17SHENZHEN H&T INTELLIGENT CONTROL
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Patent Information

Application Number
CN202520425903.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-03-11
Publication Date
2026-02-17
Estimated Expiration
2035-03-11

AI Technical Summary

Technical Problem

In household appliances, as the load increases, the number of wires in the connecting cables increases, leading to higher costs and larger size.

Method used

The first circuit board and the second circuit board are connected by a connecting line. The first circuit board includes a first communication interface and N signal input and output circuits. The signal input and output circuits are connected to the load. The signal processing branch realizes the latching and inversion processing of the signal, controls the working state of the load, and processes the sensor signal through the analog-to-digital conversion circuit.

Benefits of technology

It enables control of multiple loads and sensors while keeping the number of connecting wires constant, thus reducing costs and size.

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Abstract

The utility model discloses a function implementation system and a household appliance. The function realization system comprises a first circuit board, a second circuit board and a connecting line, the first circuit board and the second circuit board are connected through the connecting line, and the first circuit board and the second circuit board are used for realizing different functions. The function realization circuit is used for realizing one of the following two functions: (i) the second circuit board is used for outputting a first output signal to the connecting line; the Kth signal input and output circuit is used for receiving the first output signal and outputting a control signal to a Kth load based on the first output signal so as to control the Kth load, and the Kth signal input and output circuit is connected with the Kth load; (i i) the second circuit board receives a first input signal from the connection line; the Kth signal input / output circuit outputs a first input signal based on a signal output by the Kth load. Through the mode, data transmission between the two circuit boards can be realized, and meanwhile, the number of the connecting lines is kept unchanged, so that the cost is saved, and the size is reduced.
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Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a functional implementation system and a household appliance. Background Technology

[0002] In home appliances, it's sometimes necessary to implement all the functions of the appliance across multiple circuit boards. For example, most home appliances typically include a circuit board for display and a circuit board for power supply, connected by a wiring harness. Furthermore, to save costs, both the display and power supply circuit boards often use a single microcontroller. Typically, this microcontroller is located on the display circuit board and controls the load connected to the power supply circuit board via the wiring harness.

[0003] However, with the above method, as the load increases, the number of wires in the connection line increases, which in turn increases the cost and size. Utility Model Content

[0004] This application provides a functional implementation system and a home appliance that can control multiple loads while keeping the number of connecting wires constant, thereby saving costs and reducing size.

[0005] In a first aspect, embodiments of this application provide a functional implementation system, including:

[0006] A first circuit board, a second circuit board, and a connecting line, wherein the first circuit board and the second circuit board are connected by the connecting line;

[0007] The first circuit board includes a first communication interface and N signal input / output circuits. The first communication interface is connected to the second circuit board through the connecting line. The N signal input / output circuits are connected between the first communication interface and N loads. Each signal input / output circuit is connected to one load. N is an integer greater than or equal to 1.

[0008] The functional implementation circuit is used to implement one of the following two functions:

[0009] (i) The second circuit board is used to output a first output signal to the connection line, wherein the first output signal is output to the first communication interface through the connection line;

[0010] The Kth signal input / output circuit in the N signal input / output circuits is used to receive the first output signal from the first communication interface and output a control signal to the Kth load in the N loads based on the first output signal to control the Kth load. The Kth signal input / output circuit is connected to the Kth load, and K is an integer greater than or equal to 1 and less than or equal to N.

[0011] (ii) The second circuit board is used to receive a first input signal from the connection line;

[0012] The Kth signal input / output circuit is used to output the first input signal to the first communication interface based on the signal output by the Kth load, and output it to the connection line through the first communication interface.

[0013] In one or more embodiments, any of the signal input / output circuits includes a first pin, a second pin, a third pin, and a signal processing branch;

[0014] The first pin is connected to the corresponding load, and the second and third pins are both connected to the first communication interface.

[0015] Wherein, when the function implementation circuit is used to implement function (i), the second pin of the Kth signal input / output circuit receives the first output signal, and the signal processing branch in the Kth signal input / output circuit is used to sequentially latch and invert the first output signal to generate the control signal, and the control signal is input to the Kth load through the first pin of the Kth signal input / output circuit;

[0016] When the function implementation circuit is used to implement function (ii), the first pin of the Kth signal input / output circuit receives the signal output by the Kth load, and the signal processing branch in the Kth signal input / output circuit is used to sequentially invert and latch the signal output by the Kth load to generate the first input signal. The first input signal is input to the first communication interface through the third pin of the Kth signal input / output circuit.

[0017] In one or more embodiments, the signal processing branch includes a first level conversion unit, a second level conversion unit, a first register, and a second register;

[0018] The input terminal of the first register is connected to the second pin, the output terminal of the first register is connected to the first terminal of the first level conversion unit, and the second terminal of the first level conversion unit is connected to the first pin. The first level conversion unit is used to convert the level of the first output signal and output the control signal to the first pin.

[0019] The first end of the second level conversion unit is connected to the first pin, the second end of the second level conversion unit is connected to the input end of the second register, and the output end of the second register is connected to the third pin. The second level conversion unit is used to convert the level of the signal output by the corresponding load and output the first input signal to the third pin.

[0020] In one or more embodiments, the first level conversion unit includes a first switch and a second switch;

[0021] The first terminal of the first switch is connected to the first terminal of the second switch and the output terminal of the first register, the third terminal of the first switch is connected to the first power supply, the second terminal of the first switch is connected to the third terminal of the second switch and the first pin, and the second terminal of the second switch is grounded.

[0022] In one or more embodiments, the second level conversion system includes a third switch and a first resistor;

[0023] The first terminal of the third switch is connected to the first pin, the second terminal of the third switch is grounded, the third terminal of the third switch is connected to the first terminal of the first resistor and the input terminal of the second register, the second terminal of the first resistor is connected to the first power supply, and the output terminal of the second register is connected to the third pin.

[0024] In one or more embodiments, the first circuit board further includes N load control circuits, the N load control circuits being connected between the N signal input / output circuits and the N loads, and one load control circuit being connected to one signal input / output circuit and one load respectively;

[0025] The Kth load control circuit is used to control the working state of the Kth load in response to the control signal when the function implementation circuit performs function (i). The Kth load control circuit is used to transmit the signal output by the Kth load to the Kth signal input / output circuit when the function implementation circuit performs function (ii). The Kth load control circuit is connected between the Kth signal input / output circuit and the Kth load.

[0026] In one or more embodiments, the second circuit board includes a controller for outputting the first output signal or receiving the first input signal.

[0027] In one or more embodiments, the first circuit board further includes a second communication interface and M analog-to-digital conversion circuits, wherein M is an integer greater than or equal to 1;

[0028] The second communication interface is connected to the first communication interface, or the second communication interface is connected to the second circuit board via the connecting cable;

[0029] The M analog-to-digital conversion circuits are connected between the M sensors and the second communication interface, with one analog-to-digital conversion circuit connected to one sensor.

[0030] The Jth analog-to-digital converter circuit among the M analog-to-digital converter circuits is used to output a digital signal based on the analog signal output by the Jth sensor among the M sensors, where J is an integer greater than or equal to 1 and less than or equal to M.

[0031] In one or more embodiments, the first circuit board further includes M sensor circuits, the M sensor circuits being connected between the M analog-to-digital converter circuits and the M sensors, and each sensor circuit being connected to an analog-to-digital converter circuit and a sensor respectively.

[0032] The J-th sensor circuit is used to preprocess the analog signal and output the preprocessed analog signal to the J-th analog-to-digital converter circuit so that the J-th analog-to-digital converter circuit outputs the digital signal. The preprocessing operation includes at least signal amplification and filtering.

[0033] Secondly, embodiments of this application provide a household appliance, including the functional implementation system described above.

[0034] The beneficial effects of this application are as follows: The functional implementation system of this application includes a first circuit board, a second circuit board, and connecting lines, with the first circuit board and the second circuit board connected by the connecting lines. The first circuit board includes a first communication interface and N signal input / output circuits. The first communication interface is connected to the second circuit board via the connecting lines, and the N signal input / output circuits are connected between the first communication interface and N loads, with each signal input / output circuit connected to one load, where N is an integer greater than or equal to 1. When it is necessary to control the Kth load, the second circuit board outputs a first output signal to the connecting lines. The first output signal is output to the first communication interface via the connecting lines. Subsequently, the Kth signal input / output circuit receives the first output signal from the first communication interface and outputs a control signal to the Kth load based on the first output signal to control the Kth load. When it is necessary to receive the signal output by the Kth load, the Kth signal input / output circuit outputs a first input signal to the first communication interface based on the signal output by the Kth load, and outputs it to the connecting lines via the first communication interface. Afterward, the second circuit board can receive the first input signal from the connecting lines. As can be seen, the above method can control multiple loads. Moreover, no matter how the number of loads increases, only the corresponding signal input and output circuits need to be added, while the connection lines between the first circuit board and the second circuit board can remain unchanged. Therefore, compared with the related technology, which leads to an increase in the number of wires in the connection lines, the present application has lower cost and smaller size, that is, it achieves the purpose of saving costs and reducing size. Attached Figure Description

[0035] One or more embodiments are illustrated by way of example with reference to the accompanying drawings, which are not intended to limit the embodiments, and elements having the same reference numerals in the drawings are designated as similar elements.

[0036] Figure 1 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. Figure 1 ;

[0037] Figure 2 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. Figure 2 ;

[0038] Figure 3 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. Figure 3 ;

[0039] Figure 4 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. Figure 4 ;

[0040] Figure 5 This is a schematic diagram of the circuit structure of the signal processing branch provided in the embodiments of this application;

[0041] Figure 6 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. Figure 5 ;

[0042] Figure 7 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. Figure 6 ;

[0043] Figure 8 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. Figure 7 ;

[0044] Figure 9 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. Figure 8 . Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and thoroughly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0046] It should be noted that when an element is described as "connected" to another element, it can be directly connected to the other element, or there can be one or more intermediate elements between them.

[0047] Furthermore, the technical features involved in the various embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0048] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the composition of the functional implementation system provided in the embodiments of this application. For example... Figure 1 As shown, the functional implementation system 1000 includes a first circuit board 100, a second circuit board 200, and a connecting line 300. The first circuit board 100 and the second circuit board 200 are connected by the connecting line 300, which includes at least a communication line and a power line. The communication line (such as RS232 or RS-485) is used to transmit data signals to realize information exchange between devices. These signals can be in analog or digital form, including but not limited to control commands, status feedback, and sensor readings. The power line (such as a DC power line) is responsible for providing the necessary power to the second circuit board 200 to ensure its normal operation.

[0049] The first circuit board 100 includes a first communication interface 101 and N signal input / output circuits. The N signal input / output circuits include a first signal input / output circuit A1, a second signal input / output circuit A2, ..., an Nth signal input / output circuit AN. The first communication interface 101 is connected to the second circuit board 200 via a connecting line 300. The N signal input / output circuits are connected between the first communication interface 101 and N loads, with each signal input / output circuit connected to one load. N is an integer greater than or equal to 1. Specifically, the first signal input / output circuit A1 is connected between the first communication interface 101 and the first load B1, the second signal input / output circuit A2 is connected between the first communication interface 101 and the second load B2, ..., and the Nth signal input / output circuit AN is connected between the first communication interface 101 and the Nth load BN.

[0050] Specifically, the function implementation circuit 1000 is used to implement one of the following two functions: Function (i) The second circuit board 20 is used to output a first output signal to the connection line 300, wherein the first output signal is output to the first communication interface 101 through the connection line 300; the Kth signal input / output circuit AK in the N signal input / output circuits is used to receive the first output signal from the first communication interface 101, and output a control signal to the Kth load BK in the N loads based on the first output signal, so as to control the Kth load BK, wherein the Kth signal input / output circuit AK is connected to the Kth load BK, and K is an integer greater than or equal to 1 and less than or equal to N; Function (ii) The second circuit board 200 is used to receive a first input signal from the connection line 300; the Kth signal input / output circuit AK is used to output a first input signal to the first communication interface 101 based on the signal output by the Kth load BK, and output it to the connection line 300 through the first communication interface 101.

[0051] In practical applications, when it is necessary to control the Kth load BK, the second circuit board 200 outputs a first output signal to the connection line 300, and the first output signal is output to the first communication interface 101 through the connection line 300. Subsequently, the Kth signal input / output circuit AK receives the first output signal from the first communication interface 101, and outputs a control signal to the Kth load BK based on the first output signal to control the Kth load BK.

[0052] When it is necessary to receive the signal output from the Kth load, the Kth signal input / output circuit outputs a first input signal to the first communication interface 101 based on the signal output from the Kth load, and then outputs it to the connection line 300 through the first communication interface 101. Afterwards, the second circuit board 200 can receive the first input signal from the connection line 300.

[0053] In summary, this enables the control of N loads, where the Kth load BK is any one of the N loads. By setting up N signal input / output circuits and the first communication interface 101, asynchronous signal transmission can be achieved, meaning that only one load's signal transmission process is implemented at a time (in this embodiment, the signal transmission process of the Kth load BK is implemented through the Kth signal input / output circuit AK). This allows for the sharing of a single first communication interface 101 while maintaining a constant number of wires in the connection line 300. Therefore, regardless of the increase in the number of loads, only the corresponding signal input / output circuits need to be added, while the number of wires in the connection line 300 between the first circuit board 100 and the second circuit board 200 remains unchanged. Thus, compared to related technologies where the number of wires in the connection line increases (i.e., in related technologies, the number of wires in the connection line needs to increase for each additional load to achieve data transmission between the second circuit board and the added load), this application is lower in cost and smaller in size, achieving both cost savings and size reduction.

[0054] In some embodiments, such as Figure 2 As shown, any one of the first signal input / output circuit A1, the second signal input / output circuit A2, ..., the Nth signal input / output circuit AN includes a first pin S1, a second pin S2, a third pin S3, and a signal processing branch 102. The first pin S1 is connected to the corresponding load, that is, the first pin S1 of the first signal input / output circuit A1 is connected to the first load B1, the first pin S1 of the second signal input / output circuit A2 is connected to the second load B2, ..., the first pin S1 of the Nth signal input / output circuit AN is connected to the Nth load BN; the second pin S2 and the third pin S3 are both connected to the first communication interface 101.

[0055] In the functional implementation circuit 1000, when function (i) is implemented, the second pin S2 of the Kth signal input / output circuit AK receives the first output signal. The signal processing branch 102 in the Kth signal input / output circuit AK sequentially latches and inverts the first output signal to generate a control signal. The control signal is input to the Kth load BK through the first pin S1 of the Kth signal input / output circuit AK. In the functional implementation circuit 1000, when function (ii) is implemented, the first pin S1 of the Kth signal input / output circuit AK receives the signal output by the Kth load BK. The signal processing branch 102 in the Kth signal input / output circuit AK sequentially inverts and latches the signal output by the Kth load BK to generate a first input signal. The first input signal is input to the first communication interface 101 through the third pin S3 of the Kth signal input / output circuit AK.

[0056] For example, when K is 1, if the function implementation circuit 1000 is used to implement function (i), then the second pin S2 of the first signal input / output circuit A1 receives the first output signal, and the signal processing branch 102 in the first signal input / output circuit A1 is used to sequentially latch and invert the first output signal to generate a control signal. The control signal is input to the first load B1 through the first pin S1 of the first signal input / output circuit A1. If the function implementation circuit 1000 is used to implement function (ii), then the first pin S1 of the first signal input / output circuit A1 receives the signal output by the first load B1, and the signal processing branch 102 in the first signal input / output circuit A1 is used to sequentially invert and latch the signal output by the first load B1 to generate a first input signal. The first input signal is input to the first communication interface 101 through the third pin S3 of the first signal input / output circuit A1.

[0057] In some embodiments, such as Figure 3 As shown, the signal processing branch 102 includes a first level conversion unit 1021, a first register 1022, a second level conversion unit 1023, and a second register 1024.

[0058] In this configuration, the input terminal of the first register 1022 is connected to the second pin S2, the output terminal of the first register 1022 is connected to the first terminal of the first level conversion unit 1021, and the second terminal of the first level conversion unit 1021 is connected to the first pin S1. The first terminal of the second level conversion unit 1023 is connected to the first pin S1, the second terminal of the second level conversion unit 1023 is connected to the input terminal of the second register 1024, and the output terminal of the second register 1024 is connected to the third pin S3. The second level conversion unit 1023 is used to perform level conversion on the signal output by the corresponding load and output the first input signal to the third pin S3.

[0059] Specifically, the second circuit board 200 outputs a first output signal. This first output signal is input to the first register 1022 via the second pin S2. The first register 1022 latches the first output signal and then outputs it to the first level conversion unit 1021. The first level conversion unit 1021 performs level conversion on the first output signal and outputs a control signal to the first pin S1. The control signal is input to the corresponding load via the first pin S1. The signal output by any load is input to the corresponding second level conversion unit 1023 via the first pin S1. The second level conversion unit 1023 performs level conversion on the signal output by the corresponding load and outputs a first input signal to the second register 1024. The second register 1024 latches the first input signal and then outputs it to the third pin S3. The first input signal is input to the first communication interface 101 via the third pin S3.

[0060] Taking the Kth signal input / output circuit AK and the Kth load as an example, the second circuit board 200 outputs a first output signal. The first output signal is input to the first register 1022 in the Kth signal input / output circuit AK through the second pin S2. The first register 1022 in the Kth signal input / output circuit AK latches the first output signal and then outputs it to the first level conversion unit 1021 in the Kth signal input / output circuit AK. The first level conversion unit 1021 in the Kth signal input / output circuit AK is used to convert the level of the first output signal and output a control signal to the first pin S1 in the Kth signal input / output circuit AK. The control signal is input to the Kth load BK through the first pin S1.

[0061] The signal output by the Kth load BK is input to the second level conversion unit 1023 in the Kth signal input / output circuit AK through the first pin S1. The second level conversion unit 1023 in the Kth signal input / output circuit AK is used to convert the level of the signal output by the Kth load BK and output the first input signal to the second register 1024 in the Kth signal input / output circuit AK. The second register 1024 in the Kth signal input / output circuit AK latches the first input signal and outputs it to the third pin S3. The first input signal is input to the first communication interface 101 through the third pin S3.

[0062] In some embodiments, such as Figure 4 As shown, the first circuit board 100 also includes N load control circuits. These N load control circuits are connected between the N signal input / output circuits and the N loads. Each load control circuit is connected to one signal input / output circuit and one load. Specifically, the N load control circuits include a first load control circuit C1, a second load control circuit C2, ..., an Nth load control circuit CN. The first load control circuit C1 is connected between the first signal input / output circuit A1 and the first load B1; the second load control circuit C2 is connected between the second signal input / output circuit A2 and the second load B2; ..., the Nth load control circuit CN is connected between the Nth signal input / output circuit AN and the Nth load BN.

[0063] The Kth load control circuit CK is used to control the operating state of the Kth load BK in response to a control signal when the function implementation circuit 1000 performs function (i). The Kth load control circuit CK is also used to transmit the signal output by the Kth load BK to the Kth signal input / output circuit AK when the function implementation circuit 1000 performs function (ii). The Kth load control circuit CK is connected between the Kth signal input / output circuit AK and the Kth load BK. The operating state of the Kth load BK includes both running and stopped states. Taking the Kth load BK as a motor as an example, the Kth load control circuit CK is a circuit used to control the motor's operation. It can provide appropriate voltage, current, and frequency to the motor according to the requirements of the control signal to control the motor's starting, stopping, speed regulation, and commutation operations. Furthermore, the loads among the N loads can be the same load or different loads, requiring only the configuration of corresponding load control circuits. For example, in some embodiments, the first load B1 is a motor, and the corresponding load control circuit is a circuit that controls the motor's operation; the second load B2 is a heating wire, and the corresponding load control circuit is a circuit that controls the temperature or power output of the heating wire.

[0064] Please refer to Figure 5 , Figure 5 This is a schematic diagram of the circuit structure of the signal processing branch provided in an embodiment of this application. Figure 5 As shown, the first level conversion unit 1021 includes a first switch Q1 and a second switch Q2.

[0065] The first terminal of the first switch Q1 is connected to the first terminal of the second switch Q2 and the output terminal of the first register 1022, the third terminal of the first switch Q1 is connected to the first power supply V1, the second terminal of the first switch Q1 is connected to the third terminal of the second switch Q2 and the first pin S1, and the second terminal of the second switch Q2 is grounded to GND.

[0066] Specifically, when the first output signal output by the first register 1022 is high, the second switch Q2 is turned on, the first switch Q1 is turned off, and the first pin S1 is grounded to GND through the second switch Q2, corresponding to a low-level output from the first pin S1 (corresponding to a low-level control signal); when the first output signal output by the first register 1022 is low, the first switch Q1 is turned on, the second switch Q2 is turned off, and the first pin S1 is connected to the first power supply V1 through the first switch Q1, corresponding to a high-level output from the first pin S1 (corresponding to a high-level control signal). Therefore, the first output signal becomes a control signal after level conversion, that is, the first output signal is inverted to become a control signal.

[0067] In this embodiment, taking a PMOS transistor as the first switch Q1 and an NMOS transistor as the second switch Q2 as an example, the gate of the PMOS transistor is the first terminal of the first switch Q1, the source of the PMOS transistor is the second terminal of the first switch Q1, and the drain of the PMOS transistor is the third terminal of the first switch Q1. Similarly, the gate of the NMOS transistor is the first terminal of the second switch Q2, the source of the NMOS transistor is the second terminal of the second switch Q2, and the drain of the NMOS transistor is the third terminal of the second switch Q2.

[0068] In addition, the first switch Q1 and the second switch Q2 can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled rectifier (SCR) device, a junction gate field-effect transistor (JFET) device, a MOS controlled thyristor (MCT) device, etc.

[0069] In this embodiment, the second level conversion system 1023 includes a third switch Q3 and a first resistor R1.

[0070] The first terminal of the third switch Q3 is connected to the first pin S1, the second terminal of the third switch Q3 is grounded to GND, the third terminal of the third switch Q3 is connected to the first terminal of the first resistor R1 and the input terminal of the second register 1024, the second terminal of the first resistor R1 is connected to the first power supply V1, and the output terminal of the second register 1024 is connected to the third pin S3.

[0071] Specifically, when the signal output by any load is high, the third switch Q3 is turned on, and the input terminal of the second register 1024 is grounded to GND through the third switch Q3, corresponding to a low-level input to the input terminal of the second register 1024, that is, the first input signal is low; when the signal output by any load is low, the third switch Q3 is turned off, and the input terminal of the second register 1024 is connected to the first power supply V1 through the first resistor R1, corresponding to a high-level input to the input terminal of the second register 1024, that is, the first input signal is high.

[0072] Therefore, the signal output by any load becomes the first input signal after level conversion, that is, the signal output by any load is inverted to become the first input signal.

[0073] In this embodiment, the third switch Q3 is an NMOS transistor. The gate of the NMOS transistor is the first terminal of the third switch Q3, the source of the NMOS transistor is the second terminal of the third switch Q3, and the drain of the NMOS transistor is the third terminal of the third switch Q3.

[0074] In addition, the third switch Q3 can be any controllable switch, such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutated thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon controlled rectifier (SCR) device, a junction gate field-effect transistor (JFET) device, a MOS controlled thyristor (MCT) device, etc.

[0075] In some embodiments, such as Figure 6 and Figure 7 As shown, the first circuit board 100 also includes a second communication interface 102 and M analog-to-digital conversion circuits, where M is an integer greater than or equal to 1. Figure 6 and Figure 7 An example is shown in Figure 1 Based on the block diagram shown, two additional block diagrams are provided, one with a second communication interface 102 and the other with M analog-to-digital converters (ADCs). The M ADCs include a first ADC D1, a second ADC D2, ..., and an Mth ADC DM.

[0076] The second communication interface 102 is connected to the first communication interface 101 (e.g., Figure 6 (as shown), or, the second communication interface 102 is connected to the second circuit board 200 via a connecting cable 300 (as shown). Figure 7 (As shown). M analog-to-digital converter (ADC) circuits are connected between the M sensors and the second communication interface 102, with one ADC circuit connected to one sensor. That is, the M sensors include the first sensor E1, the second sensor E2, ..., the Mth sensor EM. The first ADC circuit D1 is connected to the first sensor E1, the second ADC circuit D2 is connected to the second sensor E2, ..., and the Mth ADC circuit DM is connected to the Mth sensor EM.

[0077] Specifically, the J-th analog-to-digital converter (ADC) circuit DJ among the M ADC circuits is used to output a digital signal based on the analog signal output by the J-th sensor EJ among the M sensors, where J is an integer greater than or equal to 1 and less than or equal to M. The J-th ADC circuit DJ can be any one of the M ADC circuits, and the J-th sensor EJ can be any one of the M sensors. The J-th ADC circuit DJ is connected between the J-th sensor EJ and the second communication interface 102. A sensor is a detection device that can sense the measured information and transform the sensed information into an analog signal according to a certain rule. The analog signal is then converted into a digital signal by the corresponding ADC circuit, and the digital signal is output through the second communication interface 102. As can be seen, the above process can realize the feedback process of analog signals from N sensors. By setting N analog-to-digital conversion circuits and the second communication interface 102, the asynchronous transmission process of the sensor signals can be realized, that is, the signal transmission process of only one sensor is realized at a time (in this embodiment, the signal transmission process of the Jth sensor is realized through the Jth analog-to-digital conversion circuit DJ). Thus, a second communication interface 102 can be shared, and the number of wires in the connection line 300 remains unchanged.

[0078] In summary, regardless of the increase in the number of loads and sensors, only the corresponding signal input / output circuits or analog-to-digital conversion circuits need to be added. The number of wires in the connection line 300 between the first circuit board 100 and the second circuit board 200 can remain unchanged. Therefore, compared with the related technologies that lead to an increase in the number of wires in the connection line, the present application has a lower cost and smaller size, thus achieving the purpose of saving costs and reducing size.

[0079] In some embodiments, such as Figure 8 As shown, the first circuit board 100 also includes M sensor circuits, which are connected between the M analog-to-digital converter circuits and the M sensors. Each sensor circuit is connected to one analog-to-digital converter circuit and one sensor. The M sensor circuits include a first sensor circuit F1, a second sensor circuit F2, ..., and an Mth sensor circuit FM. The first sensor circuit F1 is connected between the first sensor E1 and the first analog-to-digital converter circuit D1, the second sensor circuit F2 is connected between the second sensor E1 and the second analog-to-digital converter circuit D2, ..., and the Mth sensor circuit FM is connected between the Mth sensor EM and the Mth analog-to-digital converter circuit DM.

[0080] The J-th sensor circuit FJ is used to preprocess the analog signal and output the preprocessed analog signal to the J-th analog-to-digital converter circuit FJ so that the J-th analog-to-digital converter circuit DJ outputs a digital signal. The preprocessing operation includes at least signal amplification and filtering.

[0081] In some embodiments, such as Figure 9 As shown, the second circuit board 200 includes a controller 201, which is used to output a first output signal or receive a first input signal.

[0082] This application also provides a household appliance. This household appliance includes a functional implementation system 1000 as described in any embodiment of this application.

[0083] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

[0084] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Within the framework of this application, the technical features of the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A functional implementation system, characterized in that, include: A first circuit board, a second circuit board, and a connecting line, wherein the first circuit board and the second circuit board are connected by the connecting line; The first circuit board includes a first communication interface and N signal input / output circuits. The first communication interface is connected to the second circuit board through the connecting line. The N signal input / output circuits are connected between the first communication interface and N loads. Each signal input / output circuit is connected to one load. N is an integer greater than or equal to 1. The functional implementation circuit is used to implement one of the following two functions: (i) The second circuit board is used to output a first output signal to the connection line, wherein the first output signal is output to the first communication interface through the connection line; The Kth signal input / output circuit in the N signal input / output circuits is used to receive the first output signal from the first communication interface and output a control signal to the Kth load in the N loads based on the first output signal to control the Kth load. The Kth signal input / output circuit is connected to the Kth load, and K is an integer greater than or equal to 1 and less than or equal to N. (ii) The second circuit board is used to receive a first input signal from the connection line; The Kth signal input / output circuit is used to output the first input signal to the first communication interface based on the signal output by the Kth load, and output it to the connection line through the first communication interface.

2. The system for realizing the function according to claim 1, characterized in that, Any of the aforementioned signal input / output circuits includes a first pin, a second pin, a third pin, and a signal processing branch; The first pin is connected to the corresponding load, and the second and third pins are both connected to the first communication interface. Wherein, when the function implementation circuit is used to implement function (i), the second pin of the Kth signal input / output circuit receives the first output signal, and the signal processing branch in the Kth signal input / output circuit is used to sequentially latch and invert the first output signal to generate the control signal, and the control signal is input to the Kth load through the first pin of the Kth signal input / output circuit; When the function implementation circuit is used to implement function (ii), the first pin of the Kth signal input / output circuit receives the signal output by the Kth load, and the signal processing branch in the Kth signal input / output circuit is used to sequentially invert and latch the signal output by the Kth load to generate the first input signal. The first input signal is input to the first communication interface through the third pin of the Kth signal input / output circuit.

3. The system for realizing the function according to claim 2, characterized in that, The signal processing branch includes a first level conversion unit, a second level conversion unit, a first register, and a second register; The input terminal of the first register is connected to the second pin, the output terminal of the first register is connected to the first terminal of the first level conversion unit, and the second terminal of the first level conversion unit is connected to the first pin. The first level conversion unit is used to convert the level of the first output signal and output the control signal to the first pin. The first end of the second level conversion unit is connected to the first pin, the second end of the second level conversion unit is connected to the input end of the second register, and the output end of the second register is connected to the third pin. The second level conversion unit is used to convert the level of the signal output by the corresponding load and output the first input signal to the third pin.

4. The system for realizing the function according to claim 3, characterized in that, The first level conversion unit includes a first switching transistor and a second switching transistor; The first terminal of the first switch is connected to the first terminal of the second switch and the output terminal of the first register, the third terminal of the first switch is connected to the first power supply, the second terminal of the first switch is connected to the third terminal of the second switch and the first pin, and the second terminal of the second switch is grounded.

5. The system for realizing the function according to claim 3, characterized in that, The second level conversion unit includes a third switch and a first resistor; The first terminal of the third switch is connected to the first pin, the second terminal of the third switch is grounded, the third terminal of the third switch is connected to the first terminal of the first resistor and the input terminal of the second register, the second terminal of the first resistor is connected to the first power supply, and the output terminal of the second register is connected to the third pin.

6. The system for realizing the function according to claim 1, characterized in that, The first circuit board further includes N load control circuits, which are connected between the N signal input / output circuits and the N loads. Each load control circuit is connected to a signal input / output circuit and a load. The Kth load control circuit is used to control the working state of the Kth load in response to the control signal when the function implementation circuit performs function (i). The Kth load control circuit is used to transmit the signal output by the Kth load to the Kth signal input / output circuit when the function implementation circuit performs function (ii). The Kth load control circuit is connected between the Kth signal input / output circuit and the Kth load.

7. The system for realizing the function according to claim 1, characterized in that, The second circuit board includes a controller, which is used to output the first output signal or receive the first input signal.

8. The system for implementing the function according to any one of claims 1-7, characterized in that, The first circuit board also includes a second communication interface and M analog-to-digital conversion circuits, where M is an integer greater than or equal to 1; The second communication interface is connected to the first communication interface, or the second communication interface is connected to the second circuit board via the connecting cable; The M analog-to-digital conversion circuits are connected between the M sensors and the second communication interface, with one analog-to-digital conversion circuit connected to one sensor. The Jth analog-to-digital converter circuit among the M analog-to-digital converter circuits is used to output a digital signal based on the analog signal output by the Jth sensor among the M sensors, where J is an integer greater than or equal to 1 and less than or equal to M.

9. The system for realizing the function according to claim 8, characterized in that, The first circuit board further includes M sensor circuits, which are connected between the M analog-to-digital converter circuits and the M sensors. Each sensor circuit is connected to an analog-to-digital converter circuit and a sensor. The J-th sensor circuit is used to preprocess the analog signal and output the preprocessed analog signal to the J-th analog-to-digital converter circuit so that the J-th analog-to-digital converter circuit outputs the digital signal. The preprocessing operation includes at least signal amplification and filtering.

10. A household appliance, characterized in that, Includes the functional implementation system as described in any one of claims 1-9.