Full-rate bit error rate testing equipment
By designing the clock source circuit and power supply circuit of the full-rate bit error rate testing equipment, the problem of bit error rate detection in 400G ultra-high-speed communication was solved, improving accuracy and stability and meeting the needs of high-intensity testing.
Patent Information
- Application Number
- CN202520565902.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-28
- Publication Date
- 2026-02-24
- Estimated Expiration
- 2035-03-28
AI Technical Summary
Existing technologies cannot meet the bit error rate detection requirements of 400G ultra-high-speed communication, leading to increased detection costs and decreased market competitiveness.
A full-rate bit error rate testing device was designed, including a clock source circuit, an MCU control circuit, and a power supply circuit. The chip U1 and its surrounding components such as capacitors, resistors, and diodes work together to generate an accurate clock signal, and the power supply circuit provides a stable power supply to the MCU control circuit and the clock source circuit.
It improves the accuracy and stability of bit error rate testing, avoids misjudgments caused by inaccurate clock signals, ensures the reliability and stability of the testing process, and adapts to the needs of long-term, high-intensity testing.
Smart Images

Figure CN223942728U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the field of communication technology, specifically a full-rate bit error rate testing device. Background Technology
[0002] With the rapid growth of data communication demands, such as in cloud computing, big data centers, and the evolution of 5G and future 6G networks, the requirements for high-speed, high-capacity data transmission are increasing. Traditional 10G and 40G communication rates are gradually becoming insufficient to meet the demands for rapid transmission of massive amounts of data, leading to the emergence of 400G communication technology. This invention can perform continuous 400G testing at any frequency and with arbitrary settings, meeting full-rate requirements, and enabling rapid transmission of massive amounts of data while saving costs.
[0003] In 400G communication systems, signal transmission rates are extremely high, placing stringent demands on signal quality and accuracy. Even minute signal distortions, noise interference, or transmission errors can lead to the loss or mistransmission of large amounts of data, severely impacting the performance and reliability of the entire communication system. Bit error rate testers (BERTs), as crucial instruments for detecting bit errors in communication systems, play an indispensable role in the research, testing, and maintenance of 400G communication technology. However, traditional BERTs are primarily designed for lower-speed communication systems and cannot meet the testing requirements of ultra-high-speed 400G communication. Therefore, the invention of a 400G BERT was inevitable. Utility Model Content
[0004] The purpose of this invention is to provide a full-rate bit error rate testing device to solve the problem that the existing technology mentioned in the background art cannot meet the testing requirements of ultra-high-speed communication such as 400G, which increases the cost of enterprise products, increases the development cycle, and reduces market competitiveness.
[0005] To solve the above-mentioned technical problems, the technical solution adopted by this utility model is as follows:
[0006] A full-rate bit error rate (BER) testing device includes a clock source circuit, an MCU control circuit, and a power supply circuit. The clock source circuit is connected to both the MCU control circuit and the power supply circuit. The clock source circuit provides an accurate clock signal for BER testing, the MCU control circuit controls the BER testing, and the power supply circuit provides power to both the MCU control circuit and the clock source circuit.
[0007] The clock source circuit includes chip U1, connector J7, connector J8, capacitors C45, C46, C47, C48, C49, C50, C51, C52, C53, C54, C55, C56, C57, C58, C59, C61, C62, C63, C64, C265, C266, resistors R30, R31, R32, diodes D5, D6, and D7;
[0008] Pins 21, 32, 39, and 40 of chip U1 are connected to one end of capacitors C45, C46, C47, and C48, while the other end of capacitors C45, C46, C47, and C48 is grounded.
[0009] Pins 26, 8, and 9 of chip U1 are connected to one end of capacitors C53, C54, and C55, while the other end of capacitors C53, C54, and C55 is grounded.
[0010] Pin 13 and pin 14 of chip U1 are connected to the clock generator respectively;
[0011] Pin 43 of chip U1 is connected to one end of capacitor C61, and the other end of capacitor C61 is connected to one end of connector J7; pin 44 of chip U1 is connected to one end of capacitor C62, and the other end of capacitor C62 is connected to the other end of connector J7; pin 1 of chip U1 is connected to one end of capacitor C63, and the other end of capacitor C63 is connected to the clock generator; pin 2 of chip U1 is connected to one end of capacitor C64, and the other end of capacitor C64 is connected to the clock generator.
[0012] Pins 18, 23, 29, and 34 of chip U1 are connected to one end of capacitors C49, C50, C51, and C52, and resistor R16. The other ends of capacitors C49, C50, C51, and C52 are grounded. The other end of resistor R16 is connected to the power supply.
[0013] Pin 20 of chip U1 is connected to one end of capacitor C56, and the other end of capacitor C56 is connected to the MCU control circuit; pin 19 of chip U1 is connected to one end of capacitor C57, and the other end of capacitor C57 is connected to the MCU control circuit; pin 25 of chip U1 is connected to one end of capacitor C58, and the other end of capacitor C58 is connected to the MCU control circuit; pin 24 of chip U1 is connected to one end of capacitor C59, and the other end of capacitor C59 is connected to the MCU control circuit.
[0014] Pin 31 of chip U1 is connected to one end of capacitor C265, the other end of capacitor C265 is connected to one end of connector J8, and the other end of connector J8 is grounded; pin 30 of chip U1 is connected to one end of capacitor C266, the other end of capacitor C266 is connected to one end of resistor R114, and the other end of resistor R114 is grounded.
[0015] Pin 33 of chip U1 is connected to one end of resistor R32, and the other end of resistor R32 is connected to one end of diode D7; pin 27 of chip U1 is connected to one end of resistor R31, and the other end of resistor R31 is connected to one end of diode D6; pin 28 of chip U1 is connected to one end of resistor R30, and the other end of resistor R30 is connected to one end of diode D5.
[0016] The other ends of diodes D7, D6, and D5 are all connected to the power supply.
[0017] According to the above technical solution, pins 21, 32, 39, and 40 of chip U1, as well as capacitors C45, C46, C47, and C48, are all connected to the power supply.
[0018] According to the above technical solution, pins 26, 8, and 9 of chip U1, as well as capacitors C53, C54, and C55, are all connected to the power supply.
[0019] According to the above technical solution, the power supply circuit includes chip U6, capacitor C197, capacitor C198, capacitor C199, resistor R22, resistor R79 and resistor R81.
[0020] Pins 1, 3, and 6 of chip U6 are all connected to one end of capacitors C198 and C197; the other end of capacitors C198 and C197 is connected to pin 2 of chip U6.
[0021] Pins 1, 3, and 6 of chip U6, as well as capacitors C198 and C197, are all grounded.
[0022] Pin 4 of chip U6 is connected to one end of resistor R79, capacitor C199, and resistor R81; the other end of resistor R79 is connected to pin 5 of chip U6 and one end of resistor R22.
[0023] The other end of capacitor C199 is connected to the other end of resistor R22; and both capacitor C199 and resistor R22 are grounded.
[0024] The other end of resistor R81 is connected to the power supply.
[0025] According to the above technical solution, the MCU control circuit includes chip U3-1, resistor R33, resistor R111, resistor R104, capacitor C65, capacitor C749, and crystal oscillator circuit.
[0026] Pin AA13 of chip U3-1 is connected to one end of capacitor C65 and resistor R33 respectively; the other end of capacitor C65 is grounded; the other end of resistor R33 is connected to the power supply; pin W6 of chip U3-1 is connected to one end of capacitor C749 and resistor R111 respectively; the other end of resistor R111 is connected to the power supply; the other end of capacitor C749 is grounded.
[0027] Pin C9 of chip U3-1 is connected to one end of resistor R104, and the other end of resistor R104 is grounded to pin C12 of chip U3-1.
[0028] Pins AC12 and AB11 of chip U3-1 are connected to the crystal oscillator circuit respectively.
[0029] According to the above technical solution, the MCU control circuit also includes chip U3-3, chip U3-4, capacitor C66, capacitor C67, capacitor C100, capacitor C102, connector X2, connector X3, connector X4 and connector X5.
[0030] Pin A15 of chip U3-3 is connected to capacitor C56, and pin A16 of chip U3-3 is connected to capacitor C57; pin C16 of chip U3-4 is connected to capacitor C58, and pin C17 of chip U3-4 is connected to capacitor C59.
[0031] Pin Y17 of chip U3-3 is connected to one end of capacitor C66, the other end of capacitor C66 is connected to one end of connector X2, and the other end of connector X2 is grounded.
[0032] Pin AA17 of chip U3-3 is connected to one end of capacitor C67, the other end of capacitor C67 is connected to one end of connector X3, and the other end of connector X3 is grounded.
[0033] Pin Y15 of chip U3-4 is connected to one end of capacitor C100, the other end of capacitor C100 is connected to one end of connector X4, and the other end of connector X5 is grounded.
[0034] Pin AA15 of chip U3-4 is connected to one end of capacitor C102, the other end of capacitor C102 is connected to one end of connector X5, and the other end of connector X5 is grounded.
[0035] According to the above technical solution, the crystal oscillator circuit includes chip U2, resistor R29 and resistor R113; pin 2 of chip U2 is connected to one end of resistor R113 and one end of resistor R29 respectively, the other end of resistor R29 is connected to the power supply, and the other end of resistor R113 is connected to pin 3 of chip U2.
[0036] Pin 6 of chip U2 is connected to the power supply, pin 5 of chip U2 is connected to capacitor C63, and pin 4 of chip U2 is connected to capacitor C64.
[0037] Pin 7 of chip U2 is connected to pin 13 of chip U1 and pin AB11 of chip U3-1. Pin 8 of chip U2 is connected to pin 14 of chip U1 and pin AC12 of chip U3-1.
[0038] Pin 3 of chip U2 and resistor R29 are both grounded.
[0039] Compared with the prior art, the present invention has the following beneficial effects:
[0040] In this invention, the chip U1 in the clock source circuit and its numerous surrounding capacitors, resistors, diodes, and other components work together to generate an accurate clock signal. For example, connecting multiple pins of chip U1 to different capacitors and ground helps stabilize the internal circuitry of the chip, providing a stable environment for clock signal generation. Through pins connected to the clock generator, a precise clock signal is acquired or output, providing a stable time reference for bit error rate (BER) testing. This enables the testing equipment to accurately determine signal changes during data transmission during BER testing, avoiding misjudgments caused by inaccurate clock signals and improving the accuracy of BER testing. Attached Figure Description
[0041] Figure 1 This is a circuit diagram of the clock source in this utility model;
[0042] Figure 2 This is the power supply circuit diagram of this utility model;
[0043] Figure 3 This is the crystal oscillator circuit diagram in this utility model;
[0044] Figure 4 This is one of the circuit diagrams for the MCU control module in this utility model;
[0045] Figure 5 This is the second circuit diagram of the MCU control module in this utility model;
[0046] Figure 6 This is the third circuit diagram of the MCU control module in this utility model. Detailed Implementation
[0047] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0048] Example 1
[0049] like Figure 1 As shown, a full-rate bit error rate (BER) testing device is disclosed, specifically involving a clock source circuit for the full-rate BER testing device, comprising a clock source circuit, an MCU control circuit, and a power supply circuit; the clock source circuit is connected to the MCU control circuit and the power supply circuit respectively; wherein, the clock source circuit is used to provide an accurate clock signal for the BER test, the MCU control circuit is used for controlling the BER test, and the power supply circuit is used to provide power to the MCU control circuit and the clock source circuit;
[0050] The clock source circuit includes chip U1, connector J7, connector J8, capacitors C45, C46, C47, C48, C49, C50, C51, C52, C53, C54, C55, C56, C57, C58, C59, C61, C62, C63, C64, C265, C266, resistors R30, R31, R32, diodes D5, D6, and D7;
[0051] Pins 21, 32, 39, and 40 of chip U1 are connected to one end of capacitors C45, C46, C47, and C48, while the other end of capacitors C45, C46, C47, and C48 is grounded.
[0052] Pins 26, 8, and 9 of chip U1 are connected to one end of capacitors C53, C54, and C55, while the other end of capacitors C53, C54, and C55 is grounded.
[0053] Pin 13 and pin 14 of chip U1 are connected to the clock generator respectively;
[0054] Pin 43 of chip U1 is connected to one end of capacitor C61, and the other end of capacitor C61 is connected to one end of connector J7; pin 44 of chip U1 is connected to one end of capacitor C62, and the other end of capacitor C62 is connected to the other end of connector J7; pin 1 of chip U1 is connected to one end of capacitor C63, and the other end of capacitor C63 is connected to the clock generator; pin 2 of chip U1 is connected to one end of capacitor C64, and the other end of capacitor C64 is connected to the clock generator.
[0055] Pins 18, 23, 29, and 34 of chip U1 are connected to one end of capacitors C49, C50, C51, and C52, and resistor R16. The other ends of capacitors C49, C50, C51, and C52 are grounded. The other end of resistor R16 is connected to the power supply.
[0056] Pin 20 of chip U1 is connected to one end of capacitor C56, and the other end of capacitor C56 is connected to the MCU control circuit; pin 19 of chip U1 is connected to one end of capacitor C57, and the other end of capacitor C57 is connected to the MCU control circuit; pin 25 of chip U1 is connected to one end of capacitor C58, and the other end of capacitor C58 is connected to the MCU control circuit; pin 24 of chip U1 is connected to one end of capacitor C59, and the other end of capacitor C59 is connected to the MCU control circuit.
[0057] Pin 31 of chip U1 is connected to one end of capacitor C265, the other end of capacitor C265 is connected to one end of connector J8, and the other end of connector J8 is grounded; pin 30 of chip U1 is connected to one end of capacitor C266, the other end of capacitor C266 is connected to one end of resistor R114, and the other end of resistor R114 is grounded.
[0058] Pin 33 of chip U1 is connected to one end of resistor R32, and the other end of resistor R32 is connected to one end of diode D7; pin 27 of chip U1 is connected to one end of resistor R31, and the other end of resistor R31 is connected to one end of diode D6; pin 28 of chip U1 is connected to one end of resistor R30, and the other end of resistor R30 is connected to one end of diode D5.
[0059] The other ends of diodes D7, D6, and D5 are all connected to the power supply.
[0060] In existing technologies, when conducting full-rate bit error rate testing, the clock signal is easily interfered with during ultra-high-speed communication such as 400G, which makes it impossible to provide an accurate clock signal for the test, thus affecting the accuracy and stability of the test.
[0061] In this invention, the chip U1 in the clock source circuit and its numerous surrounding capacitors, resistors, diodes, and other components work together to generate an accurate clock signal. For example, connecting multiple pins of chip U1 to different capacitors and ground helps stabilize the internal circuitry of the chip, providing a stable environment for clock signal generation. Through pins connected to the clock generator, a precise clock signal is acquired or output, providing a stable time reference for bit error rate (BER) testing. This enables the testing equipment to accurately determine signal changes during data transmission during BER testing, avoiding misjudgments caused by inaccurate clock signals and improving the accuracy of BER testing.
[0062] The MCU control circuit is responsible for controlling the bit error rate (BER) test and works closely with the clock source circuit. The clock source circuit provides a stable clock signal to the MCU control circuit, ensuring that the MCU can control the test process according to precise timing. For example, chip U1 is connected to the MCU control circuit through multiple pins, transmitting the clock signal to the MCU, enabling the MCU to precisely control data transmission and reception, as well as the detection and statistics of bit errors. This precise control ensures the stability and reliability of the BER test, avoiding data loss or incorrect handling during the test process.
[0063] The power supply circuit provides a stable power supply to the MCU control circuit and the clock source circuit. Some components in the clock source circuit are connected to the power supply, such as resistor R16, which provides the necessary energy for the normal operation of chip U1. A stable power supply ensures that chip U1 and the MCU control circuit can operate under a stable voltage, reducing circuit failures or performance degradation caused by power fluctuations. This helps improve the reliability of the entire bit error rate testing equipment, enabling it to operate stably in different working environments and adapt to long-term, high-intensity testing requirements.
[0064] Example 2
[0065] This embodiment is a further refinement of Embodiment 1.
[0066] like Figure 1 As shown, pins 21, 32, 39, and 40 of chip U1, as well as capacitors C45, C46, C47, and C48, are all connected to the power supply.
[0067] Pins 26, 8, and 9 of chip U1, as well as capacitors C53, C54, and C55, are all connected to the power supply.
[0068] like Figure 2 As shown, the power supply circuit includes chip U6, capacitors C197, C198, and C199, resistors R22, R79, and R81.
[0069] Pins 1, 3, and 6 of chip U6 are all connected to one end of capacitors C198 and C197; the other end of capacitors C198 and C197 is connected to pin 2 of chip U6.
[0070] Pins 1, 3, and 6 of chip U6, as well as capacitors C198 and C197, are all grounded.
[0071] Pin 4 of chip U6 is connected to one end of resistor R79, capacitor C199, and resistor R81; the other end of resistor R79 is connected to pin 5 of chip U6 and one end of resistor R22.
[0072] The other end of capacitor C199 is connected to the other end of resistor R22; and both capacitor C199 and resistor R22 are grounded.
[0073] The other end of resistor R81 is connected to the power supply.
[0074] like Figure 4 As shown, the MCU control circuit includes chip U3-1, resistors R33, R111, R104, capacitors C65 and C749, and a crystal oscillator circuit.
[0075] Pin AA13 of chip U3-1 is connected to one end of capacitor C65 and resistor R33 respectively; the other end of capacitor C65 is grounded; the other end of resistor R33 is connected to the power supply; pin W6 of chip U3-1 is connected to one end of capacitor C749 and resistor R111 respectively; the other end of resistor R111 is connected to the power supply; the other end of capacitor C749 is grounded.
[0076] Pin C9 of chip U3-1 is connected to one end of resistor R104, and the other end of resistor R104 is grounded to pin C12 of chip U3-1.
[0077] Pins AC12 and AB11 of chip U3-1 are connected to the crystal oscillator circuit respectively.
[0078] The MCU control circuit also includes chip U3-3, chip U3-4, capacitor C66, capacitor C67, capacitor C100, capacitor C102, connector X2, connector X3, connector X4 and connector X5;
[0079] like Figure 5 and Figure 6 As shown, pin A15 of chip U3-3 is connected to capacitor C56, and pin A16 of chip U3-3 is connected to capacitor C57; pin C16 of chip U3-4 is connected to capacitor C58, and pin C17 of chip U3-4 is connected to capacitor C59.
[0080] Pin Y17 of chip U3-3 is connected to one end of capacitor C66, the other end of capacitor C66 is connected to one end of connector X2, and the other end of connector X2 is grounded.
[0081] Pin AA17 of chip U3-3 is connected to one end of capacitor C67, the other end of capacitor C67 is connected to one end of connector X3, and the other end of connector X3 is grounded.
[0082] Pin Y15 of chip U3-4 is connected to one end of capacitor C100, the other end of capacitor C100 is connected to one end of connector X4, and the other end of connector X5 is grounded.
[0083] Pin AA15 of chip U3-4 is connected to one end of capacitor C102, the other end of capacitor C102 is connected to one end of connector X5, and the other end of connector X5 is grounded.
[0084] like Figure 3 As shown, the crystal oscillator circuit includes chip U2, resistor R29 and resistor R113; pin 2 of chip U2 is connected to one end of resistor R113 and one end of resistor R29 respectively, the other end of resistor R29 is connected to the power supply, and the other end of resistor R113 is connected to pin 3 of chip U2.
[0085] Pin 6 of chip U2 is connected to the power supply, pin 5 of chip U2 is connected to capacitor C63, and pin 4 of chip U2 is connected to capacitor C64.
[0086] Pin 7 of chip U2 is connected to pin 13 of chip U1 and pin AB11 of chip U3-1. Pin 8 of chip U2 is connected to pin 14 of chip U1 and pin AC12 of chip U3-1.
[0087] Pin 3 of chip U2 and resistor R29 are both grounded.
[0088] Furthermore, the electronic components involved in this utility model all adopt existing technologies. For example, chip U1 adopts SI 5340 type chip; chip U2 adopts NC_SI570 type chip; and chip U3 adopts IN015050-MD type chip.
[0089] The working principle of this invention is as follows: the chip U1 and its surrounding capacitors, resistors, and diodes work together. Multiple pins of chip U1 are connected to capacitors grounded to stabilize the internal circuit environment. A precise clock signal is acquired or output through pins 13 and 14 connected to the clock generator, providing a stable time reference for bit error rate testing and ensuring the accuracy of data transmission signal detection.
[0090] Chip U3-1 and its associated resistors, capacitors, and crystal oscillator circuit work together. The crystal oscillator circuit generates a stable oscillation signal, which is connected to chips U1 and U3-1 via chip U2 to provide a stable clock for the MCU control circuit, enabling it to control the test process according to precise timing. Chips U3-3, U3-4, and other components work together to process and analyze the test data, realizing the control function of bit error rate testing.
[0091] Chip U6 and its surrounding capacitors and resistors form a power supply network. Some pins of chip U6 are connected to capacitors to ground to stabilize the voltage. The resistor and capacitor connected to pin 4 process and distribute the power, providing a stable power supply to the MCU control circuit and clock source circuit, ensuring the stable operation of each circuit and avoiding test errors caused by power fluctuations.
[0092] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.
[0093] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.
Claims
1. A full-rate bit error rate testing device, characterized in that: It includes a clock source circuit, an MCU control circuit, and a power supply circuit; the clock source circuit is connected to both the MCU control circuit and the power supply circuit; the clock source circuit is used to provide an accurate clock signal for bit error rate testing, the MCU control circuit is used to control the bit error rate testing, and the power supply circuit is used to provide power to both the MCU control circuit and the clock source circuit. The clock source circuit includes chip U1, connector J7, connector J8, capacitors C45, C46, C47, C48, C49, C50, C51, C52, C53, C54, C55, C56, C57, C58, C59, C61, C62, C63, C64, C265, C266, resistors R30, R31, R32, diodes D5, D6, and D7; Pins 21, 32, 39, and 40 of chip U1 are connected to one end of capacitors C45, C46, C47, and C48, while the other end of capacitors C45, C46, C47, and C48 is grounded. Pins 26, 8, and 9 of chip U1 are connected to one end of capacitors C53, C54, and C55, while the other end of capacitors C53, C54, and C55 is grounded. Pin 13 and pin 14 of chip U1 are connected to the clock generator respectively; Pin 43 of chip U1 is connected to one end of capacitor C61, and the other end of capacitor C61 is connected to one end of connector J7; pin 44 of chip U1 is connected to one end of capacitor C62, and the other end of capacitor C62 is connected to the other end of connector J7; pin 1 of chip U1 is connected to one end of capacitor C63, and the other end of capacitor C63 is connected to the clock generator; pin 2 of chip U1 is connected to one end of capacitor C64, and the other end of capacitor C64 is connected to the clock generator. Pins 18, 23, 29, and 34 of chip U1 are connected to one end of capacitors C49, C50, C51, and C52, and resistor R16. The other ends of capacitors C49, C50, C51, and C52 are grounded. The other end of resistor R16 is connected to the power supply. Pin 20 of chip U1 is connected to one end of capacitor C56, and the other end of capacitor C56 is connected to the MCU control circuit; pin 19 of chip U1 is connected to one end of capacitor C57, and the other end of capacitor C57 is connected to the MCU control circuit; pin 25 of chip U1 is connected to one end of capacitor C58, and the other end of capacitor C58 is connected to the MCU control circuit; pin 24 of chip U1 is connected to one end of capacitor C59, and the other end of capacitor C59 is connected to the MCU control circuit. Pin 31 of chip U1 is connected to one end of capacitor C265, the other end of capacitor C265 is connected to one end of connector J8, and the other end of connector J8 is grounded; pin 30 of chip U1 is connected to one end of capacitor C266, the other end of capacitor C266 is connected to one end of resistor R114, and the other end of resistor R114 is grounded. Pin 33 of chip U1 is connected to one end of resistor R32, and the other end of resistor R32 is connected to one end of diode D7; pin 27 of chip U1 is connected to one end of resistor R31, and the other end of resistor R31 is connected to one end of diode D6; pin 28 of chip U1 is connected to one end of resistor R30, and the other end of resistor R30 is connected to one end of diode D5. The other ends of diodes D7, D6, and D5 are all connected to the power supply.
2. The full-rate bit error rate testing device according to claim 1, characterized in that: Pins 21, 32, 39, and 40 of chip U1, as well as capacitors C45, C46, C47, and C48, are all connected to the power supply.
3. The full-rate bit error rate testing device according to claim 2, characterized in that: Pins 26, 8, and 9 of chip U1, as well as capacitors C53, C54, and C55, are all connected to the power supply.
4. The full-rate bit error rate testing device according to claim 3, characterized in that: The power supply circuit includes chip U6, capacitors C197, C198, and C199, resistors R22, R79, and R81. Pins 1, 3, and 6 of chip U6 are all connected to one end of capacitors C198 and C197; the other end of capacitors C198 and C197 is connected to pin 2 of chip U6. Pins 1, 3, and 6 of chip U6, as well as capacitors C198 and C197, are all grounded. Pin 4 of chip U6 is connected to one end of resistor R79, capacitor C199, and resistor R81; the other end of resistor R79 is connected to pin 5 of chip U6 and one end of resistor R22. The other end of capacitor C199 is connected to the other end of resistor R22; and both capacitor C199 and resistor R22 are grounded. The other end of resistor R81 is connected to the power supply.
5. The full-rate bit error rate testing device according to claim 4, characterized in that: The MCU control circuit includes chip U3-1, resistors R33, R111, R104, capacitors C65 and C749, and a crystal oscillator circuit. Pin AA13 of chip U3-1 is connected to one end of capacitor C65 and resistor R33 respectively; the other end of capacitor C65 is grounded; the other end of resistor R33 is connected to the power supply; pin W6 of chip U3-1 is connected to one end of capacitor C749 and resistor R111 respectively; the other end of resistor R111 is connected to the power supply; the other end of capacitor C749 is grounded. Pin C9 of chip U3-1 is connected to one end of resistor R104, and the other end of resistor R104 is grounded to pin C12 of chip U3-1. Pins AC12 and AB11 of chip U3-1 are connected to the crystal oscillator circuit respectively.
6. The full-rate bit error rate testing device according to claim 5, characterized in that: The MCU control circuit also includes chip U3-3, chip U3-4, capacitor C66, capacitor C67, capacitor C100, capacitor C102, connector X2, connector X3, connector X4 and connector X5; Pin A15 of chip U3-3 is connected to capacitor C56, and pin A16 of chip U3-3 is connected to capacitor C57; pin C16 of chip U3-4 is connected to capacitor C58, and pin C17 of chip U3-4 is connected to capacitor C59. Pin Y17 of chip U3-3 is connected to one end of capacitor C66, the other end of capacitor C66 is connected to one end of connector X2, and the other end of connector X2 is grounded. Pin AA17 of chip U3-3 is connected to one end of capacitor C67, the other end of capacitor C67 is connected to one end of connector X3, and the other end of connector X3 is grounded. Pin Y15 of chip U3-4 is connected to one end of capacitor C100, the other end of capacitor C100 is connected to one end of connector X4, and the other end of connector X5 is grounded. Pin AA15 of chip U3-4 is connected to one end of capacitor C102, the other end of capacitor C102 is connected to one end of connector X5, and the other end of connector X5 is grounded.
7. The full-rate bit error rate testing device according to claim 6, characterized in that: The crystal oscillator circuit includes chip U2, resistor R29 and resistor R113; pin 2 of chip U2 is connected to one end of resistor R113 and one end of resistor R29, the other end of resistor R29 is connected to the power supply, and the other end of resistor R113 is connected to pin 3 of chip U2. Pin 6 of chip U2 is connected to the power supply, pin 5 of chip U2 is connected to capacitor C63, and pin 4 of chip U2 is connected to capacitor C64. Pin 7 of chip U2 is connected to pin 13 of chip U1 and pin AB11 of chip U3-1. Pin 8 of chip U2 is connected to pin 14 of chip U1 and pin AC12 of chip U3-1. Pin 3 of chip U2 and resistor R29 are both grounded.