Multifunctional instrument
By integrating ARM and SPI modules onto a domestically produced FPGA chip, the problems of increased cost and size of multifunctional instruments have been solved, achieving greater portability.
Patent Information
- Application Number
- CN202520103421.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-16
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2035-01-16
AI Technical Summary
Existing multifunctional instruments use FPGA chips and STM32 chips, which increases cost and size and reduces portability.
By integrating ARM and SPI modules onto a domestically produced FPGA chip and connecting them to the ADC and DAC units via a multi-functional module, signal transmission is achieved, eliminating the need for external hardware connections and integrating the ARM module within the FPGA signal processing unit.
It reduces the risk of signal transmission interruption, reduces the size of multifunctional instruments, and improves portability.
Smart Images
Figure CN223955703U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of electronic instruments, and in particular to a multifunctional instrument. BACKGROUND
[0002] The multifunctional instrument integrates functions of a signal source, an oscilloscope, a spectrum analyzer, a logic analyzer and a multimeter, can meet various functional requirements and be applicable to various scenarios, and greatly improves convenience and flexibility of use.
[0003] In the prior art, most multifunctional instruments use STM32 based on an ARM architecture to support implementation of various functions of the multifunctional instrument in a manner of combining a Field Programmable Gate Array (FPGA) with an external STM32 chip.
[0004] However, the multifunctional instrument in the prior art uses an FPGA chip and an STM32 chip based on an ARM architecture, which to some extent increases cost and volume of the multifunctional instrument and reduces portability of the multifunctional instrument. CONTENT OF THE INVENTION
[0005] The present application provides a multifunctional instrument to solve the technical problems mentioned in the background.
[0006] The present application provides a multifunctional instrument, comprising:
[0007] an FPGA signal processing unit, a display unit, an analog-to-digital conversion ADC unit, a digital-to-analog conversion DAC unit and a power supply unit;
[0008] The FPGA signal processing unit comprises an ARM module, an SPI module and a multifunctional module, the FPGA signal processing unit is connected with the ADC unit and the DAC unit respectively through the multifunctional module, the FPGA signal processing unit is connected with the display unit through the ARM module, and the SPI module is connected between the ARM module and the multifunctional module.
[0009] Optionally, when the multifunctional instrument works in a signal source function, the multifunctional module comprises a signal generation module.
[0010] The signal generation module is connected with the DAC unit and the SPI module respectively.
[0011] Optionally, when the multifunctional instrument works in a multimeter function, the multifunctional module further comprises a first cache module and a clock signal generation module.
[0012] The clock signal generation module is connected with the first buffer module, the signal generation module and the ADC unit respectively.
[0013] Optionally, the multifunctional instrument further comprises a voltage-current conversion unit, and the voltage-current conversion unit is connected with the ADC unit.
[0014] Optionally, when the multifunctional instrument works in the oscilloscope function, the multifunctional module further comprises a frequency division module, a sampling module, a second buffer module, a detection module and a signal measurement module.
[0015] The clock signal generation module is connected with the frequency division module and the sampling module, the frequency division module is connected with the SPI module respectively, the SPI module and the frequency division module are connected with the sampling module, the second buffer module, the detection module and the signal measurement module respectively, the frequency division module is further connected with the ADC unit, and the sampling module is further connected with the ADC unit, the second buffer module and the detection module respectively.
[0016] Optionally, when the multifunctional instrument works in the spectrum analyzer function, the multifunctional module further comprises a third buffer module, a frequency domain conversion module and a frequency domain calculation module.
[0017] The clock signal generation module is connected with the third buffer module and the frequency domain conversion module respectively, the third buffer module is further connected with the ADC unit, and the frequency domain calculation module is connected with the frequency domain conversion module and the SPI module respectively.
[0018] Optionally, when the multifunctional instrument works in the logic analyzer function, the multifunctional instrument further comprises a host computer, and the multifunctional module further comprises a sampling configuration module and a storage module.
[0019] The sampling configuration module is connected with the frequency division module, the host computer and the storage module respectively, and the storage module is further connected with the host computer.
[0020] Optionally, the power supply unit comprises an anti-reverse connection circuit, an overvoltage protection circuit, a filter circuit and a voltage conversion circuit.
[0021] The anti-reverse connection circuit, the overvoltage protection circuit, the filter circuit and the voltage conversion circuit are connected in sequence.
[0022] The multifunctional instrument provided in this application includes: an FPGA signal processing unit, a display unit, an analog-to-digital converter (ADC) unit, a digital-to-analog converter (DAC) unit, and a power supply unit. Specifically, by integrating an ARM module, an SPI module, and a multifunctional module onto the FPGA signal processing unit, the FPGA signal processing unit is connected to the ADC and DAC units via the multifunctional module, and to the display unit via the ARM module. The SPI module is connected between the ARM module and the multifunctional module, thus realizing the functions of the multifunctional instrument. Compared to existing technologies, it eliminates the need for an additional ARM chip to implement the functions of the ARM module in this application. Therefore, it eliminates the need for external hardware connections, reducing the possibility of signal transmission interruptions due to connection failures. Furthermore, the absence of an additional ARM chip facilitates the placement of various internal hardware devices within the multifunctional instrument, relatively reducing its size and improving its portability. Attached Figure Description
[0023] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0024] Figure 1 This is a schematic diagram of the structure of a multifunctional instrument provided in one embodiment of this application;
[0025] Figure 2 This is a connection diagram of a multifunctional instrument provided in an embodiment of the present application when it functions as a signal source;
[0026] Figure 3 A connection diagram for a multi-functional instrument provided in an embodiment of this application when it functions as a multimeter;
[0027] Figure 4 A connection diagram for a multi-functional instrument in an embodiment of this application when it functions as an oscilloscope;
[0028] Figure 5 This is a connection diagram of a multi-functional instrument provided in an embodiment of the present application when it functions as a spectrum analyzer;
[0029] Figure 6 A connection diagram for a multi-functional instrument provided in an embodiment of this application when it functions as a logic analyzer;
[0030] Figure 7 A circuit diagram of a power supply unit provided in an embodiment of this application;
[0031] Figure 8The circuit diagram for providing a positive voltage of a multifunctional instrument provided by an embodiment of the present application;
[0032] Figure 9 The circuit diagram for providing a positive voltage of a multifunctional instrument provided by an embodiment of the present application;
[0033] Figure 10 The circuit diagram for adjusting a positive voltage of a multifunctional instrument provided by an embodiment of the present application;
[0034] Figure 11 The circuit diagram for adjusting a negative voltage of a multifunctional instrument provided by an embodiment of the present application. DETAILED DESCRIPTION
[0035] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor also belong to the scope of protection of the present application.
[0036] In the prior art, a multifunctional instrument usually adopts the mode of an FPGA chip and an STM32 chip based on an ARM architecture. The FPGA chip and the STM32 chip are hardware devices, and need to be connected to transmit signals and realize various functions in the multifunctional instrument. Therefore, there is a problem of disconnection between the FPGA chip and the STM32 chip. Moreover, the use of the FPGA chip and the STM32 chip relatively increases the volume and cost of the multifunctional instrument and reduces the portability of the multifunctional instrument, which is inconvenient for use when going out.
[0037] Therefore, in order to solve the technical problems in the prior art, the present application provides a multifunctional instrument using a domestic FPGA chip. An ARM soft core is integrated on the domestic FPGA chip, that is, an ARM module in the present application. The FPGA chip is used as an FPGA signal processing unit. An SPI module and a multifunctional module are arranged in the FPGA signal processing unit. The multifunctional module is connected with an analog-to-digital conversion ADC unit and a digital-to-analog conversion DAC unit to realize the transmission of signals between the FPGA signal processing unit and external devices. The SPI module establishes a signal transmission bridge between the ARM module and the multifunctional module. The SPI module, the multifunctional module and the ARM module are all arranged in the FPGA signal processing unit. Therefore, external hardware connection is not needed, which reduces the disconnection of signal transmission caused by disconnection. Moreover, the ARM module is integrated on the FPGA signal processing unit, which does not need to additionally arrange an ARM chip. The arrangement of various hardware devices in the multifunctional instrument is facilitated, the volume of the multifunctional instrument is relatively reduced, and the portability of the multifunctional instrument is improved.
[0038] Figure 1 A structure diagram of a multifunctional instrument is provided in an embodiment of the present application. As shown in the diagram, the multifunctional instrument includes an FPGA signal processing unit 100, a display unit 200, an analog-to-digital conversion ADC unit 300, a digital-to-analog conversion DAC unit 400, and a power supply unit 500. Figure 1
[0039] The FPGA signal processing unit 100 includes an ARM module 110, an SPI module 120, and a multifunctional module 130. The FPGA signal processing unit 100 is connected to the ADC unit 300 and the DAC unit 400 through the multifunctional module 130. The FPGA signal processing unit 100 is connected to the display unit 200 through the ARM module 110. The SPI module 120 is connected between the ARM module 110 and the multifunctional module 130.
[0040] In this embodiment, the multifunctional instrument can have at least two of the following functions: signal source function, oscilloscope function, spectrum analyzer function, logic analyzer function, multimeter function, and power supply function.
[0041] The display unit 200 can be a touch screen. The touch screen is provided with controls corresponding to the functions of the multifunctional instrument. A user can switch the functions by touching the controls with his hand, which is convenient for the user to operate. In addition, the touch screen is also used to display data such as signal waveform, signal spectrum diagram, voltage, and current.
[0042] The ADC unit 300 is used to collect analog quantities under the control of the FPGA signal processing unit 100 and to perform analog-to-digital conversion on the analog quantities. The ADC unit 300 inputs digital quantities corresponding to the analog quantities to the FPGA signal processing unit 100.
[0043] The DAC unit 400 is used to obtain digital quantities output by the FPGA signal processing unit 100 and to perform digital-to-analog conversion on the digital quantities. The DAC unit 400 outputs analog quantities corresponding to the digital quantities to the outside of the FPGA signal processing unit 100.
[0044] The power supply unit 500 is used to supply power to the multifunctional instrument.
[0045] The ARM module 110 is a processor of the multifunctional instrument, which is used to control the multifunctional module 130, the SPI module 120, the display unit 200, the ADC unit 300, the DAC unit 400, and the like, and to realize the functions of the multifunctional instrument.
[0046] The SPI module 120 is used for signal transmission between the ARM module 110 and the multifunctional module 130.
[0047] The multifunctional module 130 is used to perform operations corresponding to the functions of the multifunctional instrument under the control of the ARM module 110.
[0048] In particular, the user selects the function of the multifunctional instrument through the display unit 200, after the function is selected, the ARM module 110 transmits signals to the multifunctional module 130 through the SPI module 120, the multifunctional module 130 performs operations corresponding to the function of the multifunctional instrument under the control of the ARM module 110, and sends the collected data to the ARM module 110, the ARM module 110 processes the signals to realize the function of the multifunctional instrument, and the specific process can be referred to below.
[0049] In this embodiment, the multifunctional instrument includes an FPGA signal processing unit 100, a display unit 200, an analog-to-digital conversion ADC unit 300, a digital-to-analog conversion DAC unit 400, and a power supply unit 500. Among them, by integrating the ARM module 110, the SPI module 120 and the multifunctional module 130 on the FPGA signal processing unit 100, the FPGA signal processing unit 100 is connected with the ADC unit 300 and the DAC unit 400 through the multifunctional module 130, the FPGA signal processing unit 100 is connected with the display unit 200 through the ARM module 110, and the SPI module 120 is connected between the ARM module 110 and the multifunctional module 130, realizing the function of the multifunctional instrument. Compared with the prior art, the function of the ARM module 110 in the present application does not need to be realized by additionally setting an ARM chip, so it does not need external hardware connection, reduces the situation of signal transmission disconnection caused by disconnection, and does not need to additionally set an ARM chip, which is convenient for the placement of various hardware devices inside the multifunctional instrument, relatively reduces the size of the multifunctional instrument, and improves the portability of the multifunctional instrument.
[0050] Optionally, as shown in Figure 2 When the multifunctional instrument works in the signal source function, the multifunctional module 130 includes a signal generation module 1301, and the signal generation module 1301 is connected with the DAC unit 400 and the SPI module 120 respectively.
[0051] In this embodiment, the signal generation module 1301 is used to output the waveform required by the user, and the signal generation module 1301 includes a ROM submodule 13011 and a waveform transmission submodule 13012.
[0052] Specifically, the waveform signal to be generated is stored in advance in the multifunctional instrument, for example, the signal waveform to be generated is drawn by MatLab, the collected waveform amplitude data is stored in the ROM submodule 13011, when the waveform needs to be output, the sampling value of the corresponding waveform is output from the ROM submodule 13011, then the digital sampling value is sent to the DAC unit 400 through the waveform delivery submodule 13012 to be converted into an analog signal, the high-frequency component is filtered out by the low-pass filter to obtain a smooth waveform, the waveform corresponds to the magnitude, and the waveform is delivered to the external oscilloscope for display.
[0053] The implementation process is as follows: the user sets the waveform parameters such as waveform frequency and waveform type on the display unit 200, that is, the touch screen, after the ARM module 110 receives the waveform parameters input by the user, the waveform parameters are sent to the waveform delivery submodule 13012 through the SPI module 120. The waveform delivery submodule 13012 obtains the address of the sampling value of the waveform signal corresponding to the waveform parameters according to the waveform parameters, and sends the address to the ROM submodule 13011. The ROM submodule 13011 finds the sampling value of the waveform signal stored in the address according to the address, and sends the sampling value of the waveform signal to the waveform delivery submodule 13012. The waveform delivery submodule 13012 obtains the waveform signal according to the sampling value of the waveform signal and sends the waveform signal to the DAC unit 400, wherein the waveform signal here is a digital waveform signal. The DAC unit 400 performs digital-to-analog conversion on the waveform signal to obtain an analog waveform signal, and outputs the analog waveform signal to the external oscilloscope for display, which is convenient for the user to view.
[0054] Optionally, as shown in Figure 3 When the multifunctional instrument works in the multimeter function, the multifunctional module 130 further includes: a first cache module 1302, a clock signal generation module 1303.
[0055] The clock signal generation module 1303 is connected with the first cache module 1302, the signal generation module 1301 and the ADC unit 300 respectively, and the first cache module 1302 is further connected with the ADC unit 300 and the SPI module 120 respectively.
[0056] In this embodiment, the first cache module 1302 is used to store the detected voltage signal.
[0057] The clock signal generation module 1303 can be a phase-locked loop (PLL) in the FPGA signal processing unit 100, which is used to generate a clock signal.
[0058] The implementation process of the multimeter function is as follows:
[0059] When measuring the voltage, the clock signal generation module 1303, i.e. the phase-locked loop (PLL) provides a sampling clock signal to the ADC unit 300, the ADC unit 300 collects the voltage signal, and inputs the collected voltage signal into the first cache module 1302 for caching, the first cache module 1302 sends the cached voltage signal to the ARM module 110 through the SPI module 120, and the ARM module 110 calculates the voltage value according to the voltage signal.
[0060] When measuring the current, as shown in Figure 3 The multifunctional instrument further includes a voltage-current conversion unit 700 connected with the ADC unit 300, so that when measuring the current, the voltage-current conversion unit 700 converts the current signal into a voltage signal, the ADC unit 300 collects the voltage signal, and inputs the converted voltage signal into the first cache module 1302 for caching, the first cache module 1302 sends the cached voltage signal to the ARM module 110 through the SPI module 120, and the ARM module 110 calculates the current value according to the voltage signal.
[0061] It should be noted that since the external interface of the ADC unit 300 is an SMA interface, when measuring the voltage and the current, the SMA interface is converted into a multimeter probe through a conversion line for measuring the voltage and the current.
[0062] When measuring the resistance, the voltage signal and the current signal are measured according to the above method, and then the ARM module 110 obtains the resistance value according to Ohm's law.
[0063] When measuring the capacitance and the inductance, the clock signal generation module 1303, i.e. the phase-locked loop (PLL) provides a sampling clock signal to the ADC unit 300, and provides a driving clock signal to the signal generation module 1301, the ARM module 110 provides a frequency parameter to the signal generation module 1301 through the SPI module 120, controls the signal generation module 1301 to generate a corresponding frequency sine waveform signal, and sends the sine waveform signal to the DAC unit 400. Then, the voltage signal and the current signal are measured in the above manner under different sine waveform signals, the ARM module 110 calculates the impedance according to Formula I, and obtains the capacitive reactance of the capacitance and the inductive reactance of the inductance through Formula II and Formula III, respectively, so as to obtain the capacitance value and the inductance value.
[0064]
[0065]
[0066]
[0067] Wherein, Z, U, I, C, L, f, respectively represent impedance, voltage, current, capacitive reactance, inductive reactance, frequency of sinusoidal signal.
[0068] Wherein, for the first cache module 1302, the ARM module 110 provides a clear signal and a read enable signal to the first cache module 1302 through the SPI module 120, the phase-locked loop PLL provides a write enable signal to the first cache module 1302, and the first cache module 1302 clears the cached signal after receiving the clear signal; after receiving the read enable signal and the write enable signal, the first cache module 1302 reads the signal collected by the ADC and caches it.
[0069] After the ARM module 110 obtains the voltage value, the current value, the resistance value, the inductance value, and the capacitance value, the ARM module 110 outputs the voltage value, the current value, the resistance value, the inductance value, and the capacitance value to the display unit 200 for display.
[0070] In this embodiment, when measuring inductance and capacitance, the impedance of the resistance is fixed, while the inductive reactance of the inductance and the capacitive reactance of the capacitance change with frequency, the inductive reactance decreases with the increase of frequency, and the capacitive reactance increases with the increase of frequency. Therefore, when measuring inductance and capacitance, different frequency sinusoidal signals are used as excitation of inductance or capacitance, so as to realize the measurement of capacitance and inductance.
[0071] Furthermore, the clock signal generation module 1303, i.e. the phase-locked loop PLL, is adopted to provide a clock signal, which can provide a higher sampling clock signal for the ADC unit 300 and the DAC unit 400, so as to obtain a higher frequency signal, and widen the bandwidth of the oscilloscope and enhance the resolution of the signal.
[0072] Optionally, as shown in Figure 4 When the multifunctional instrument works in the oscilloscope function, the multifunctional module 130 further includes a frequency division module 1304, a sampling module 1305, a second cache module 1306, a detection module 1307, and a signal measurement module 1308.
[0073] The clock signal generation module 1303 is connected with the frequency division module 1304 and the sampling module 1305, the frequency division module 1304 is connected with the SPI module 120, and the SPI module 120 and the frequency division module 1304 are further connected with the sampling module 1305, the second cache module 1306, the detection module 1307, and the signal measurement module 1308, respectively, and the frequency division module 1304 is further connected with the ADC unit 300, and the sampling module 1305 is further connected with the ADC unit 300, the second cache module 1306, and the detection module 1307, respectively.
[0074] In this embodiment, the realization process of the oscilloscope function is as follows: the user sets parameters such as sampling rate, trigger condition, vertical sensitivity, and sampling point number on the display unit 200, i.e., the touch screen, and the ARM module 110 acquires the parameters set by the user.
[0075] The clock signal generation module 1303, i.e., the phase-locked loop (PLL), provides a 100M clock signal to the frequency division module 1304 and a 400M clock signal to the sampling module 1305. The ARM module 110 provides a frequency division coefficient to the frequency division module 1304 through the SPI module 120, and the frequency division module 1304 divides the 100M clock signal according to the frequency division coefficient to obtain a first clock signal, a second clock signal, a third clock signal, a fourth clock signal, and a sampling clock signal of the ADC unit 300.
[0076] The ADC unit 300 collects the waveform output by the external signal generator according to the sampling clock signal and sends the collected waveform signal to the signal measurement module 1308. The signal measurement module 1308 obtains the frequency value, maximum value, minimum value, and peak-to-peak value of the waveform by calculation according to the first clock signal and the waveform signal, where the first clock signal serves as the sampling rate. Then, the signal measurement module 1308 sends the frequency value, maximum value, minimum value, and peak-to-peak value of the waveform to the ARM module 110 through the SPI module 120.
[0077] Optionally, the signal measurement module 1308 includes a pulse acquisition sub-module 13081, a frequency measurement sub-module 13082, and an amplitude measurement sub-module 13083. The pulse acquisition sub-module 13081 receives the collected waveform signal sent by the ADC unit 300 and, after receiving the trigger level sent by the ARM module 110 through the SPI module 120, converts the received waveform signal into corresponding high and low levels, sends the high and low levels to the frequency measurement sub-module 13082, and obtains the frequency information of the waveform signal, which is sent to the ARM module 110 through the SPI module 120. The high and low levels are also sent to the amplitude measurement sub-module 13083 to obtain the frequency value, maximum value, minimum value, and peak-to-peak value of the waveform, which are sent to the ARM module 110 through the SPI module 120.
[0078] The ADC unit 300 also sends the collected waveform signal to the sampling module 1305. After receiving the sampling chip selection signal, sampling point number, and trigger signal sent by the ARM module 110 through the SPI module 120, the sampling module 1305 determines the sampling end signal in combination with the waveform signal and the second clock signal, and sends the sampling end signal to the second buffer module 1306.
[0079] The ADC unit 300 also sends the collected waveform signal to the second cache module 1306, and the second cache module 1306 receives the sampling end signal as a write enable signal, the write clock signal is the third clock signal, and the read clock is provided by the ARM module 110. After receiving the sampling end signal, the second cache module 1306 caches the waveform signal and sends the waveform signal to the ARM module 110 through the SPI module 120.
[0080] The detection module 1307 detects the falling edge signal according to the fourth clock signal, and generates a calculation trigger signal after detecting the falling edge. The calculation trigger signal is sent to the ARM module 110 through the SPI module 120.
[0081] After receiving the calculation trigger signal, the ARM module 110 performs logical calculation according to the waveform signal sent by the second cache module 1306, the frequency value, the maximum value, the minimum value, and the peak-to-peak value of the waveform sent by the signal measurement module 1308, and displays the waveform, the waveform frequency, the maximum value, the minimum value, and the peak-to-peak value, and other waveform information required by the user on the display unit 200, i.e., the touch screen, to realize the oscilloscope function of the multifunctional instrument.
[0082] Optionally, as shown in Figure 5 When the multifunctional instrument works in the spectrum analyzer function, the multifunctional module 130 further includes a third cache module 1309, a frequency domain conversion module 1310, and a frequency domain calculation module 1311.
[0083] The clock signal generation module 1303 is connected with the third cache module 1309 and the frequency domain conversion module 1310, respectively. The third cache module 1309 is also connected with the ADC unit 300. The frequency domain calculation module 1311 is connected with the frequency domain conversion module 1310 and the SPI module 120, respectively.
[0084] In this embodiment, when the multifunctional instrument is switched to the spectrum analyzer function, the clock signal generation module 1303, i.e., the phase-locked loop (PLL), generates a 100 MHz clock signal and sends it to the frequency division module 1304. The ARM module 110 sends a frequency division coefficient to the frequency division module 1304 through the SPI module 120. The frequency division module 1304 divides the 100 MHz clock signal according to the frequency division coefficient to obtain the sampling clock signal of the ADC unit 300.
[0085] The ADC unit 300 collects the target signal that needs to be analyzed in the frequency domain from an external signal source according to the sampling clock signal, where the target signal can be an 8-bit signal. The ADC unit 300 sends the target signal to the third cache module 1309 for caching.
[0086] The crystal oscillator and the clock signal generation module 1303 send a write clock signal and a read clock signal to the third cache module 1309 respectively, and the third cache module 1309 reads the target signal into the cache according to the write clock signal and the read clock signal.
[0087] The third cache module 1309 sends the target signal to the frequency domain conversion module 1310, and the clock signal generation module 1303 sends a sampling clock signal to the frequency domain conversion module 1310, and the frequency domain conversion module 1310 samples the target signal according to the sampling clock signal and performs Fourier transform on the target signal to obtain a transformed target signal, which can be 48 bits, wherein the high 16 bits of the transformed target signal are the calculated imaginary part and the low 16 bits are the calculated real part. The frequency domain conversion module 1310 sends the real part and the imaginary part to the frequency domain calculation module 1311.
[0088] The frequency domain calculation module 1311 calculates the amplitude parameter of the target signal in the frequency domain according to the real part and the imaginary part, and sends the amplitude parameter to the ARM module 110 through the SPI module 120. The ARM module 110 draws the frequency spectrum of the target signal on the display unit 200, i.e. the touch screen, according to the amplitude parameter, so that the user can view it.
[0089] Optionally, as shown in Figure 6 When the multifunctional instrument works in the logic analyzer function, the multifunctional instrument further comprises a host computer 600, and the multifunctional module 130 further comprises a sampling configuration module 1312 and a storage module 1313.
[0090] The sampling configuration module 1312 is connected with the frequency division module 1304, the host computer 600 and the storage module 1313 respectively, and the storage module 1313 is further connected with the host computer 600.
[0091] In this embodiment, when the multifunctional instrument works in the logic analyzer function, the host computer 600 is needed, which is used for analyzing and displaying the data to be analyzed when the multifunctional instrument works in the logic analyzer function, and can allow the user to change the trigger mode of the data through the host computer 600. At this time, the sampling configuration module 1312 and the storage module 1313 are connected with the host computer respectively.
[0092] Specifically, the user sets the frequency division coefficient, the sampling rate, the sampling mode, the sampling point number and other parameters on the host computer 600. The host computer 600 is connected with the FPGA signal processing unit 100 through the UART interface. The host computer 600 sends the frequency division coefficient, the sampling rate, the sampling mode, the sampling point number and other parameters to the sampling configuration module 1312 through the UART interface. The sampling configuration module 1312 sends the frequency division coefficient to the frequency division module 1304. The frequency division module 1304 adjusts the frequency of the clock signal according to the frequency division coefficient, and sends the adjusted clock signal to the sampling configuration module 1312. The frequency division module 1304 obtains the clock signal through the clock signal generation module 1303.
[0093] The sampling configuration module 1312 obtains the target digital signal which needs to be logically analyzed according to the clock signal sent by the frequency division module 1304, the set sampling rate, the sampling mode, the sampling point number and other parameters, and sends the target digital signal to the storage module 1313 for storage.
[0094] The host computer 600 extracts the target digital signal stored in the storage module 1313 through the UART interface. After receiving the target digital signal, the host computer 600 decodes the target digital signal, and completes the logical analysis.
[0095] Optionally, as shown in Figure 6 The storage module 1313 includes a first cache sub-module 13131, a DDR3 storage sub-module 13132 and a second cache sub-module 13133. After the sampling configuration module 1312 collects the target digital signal, the target digital signal is written into the first cache sub-module 13131. The first cache sub-module 13131 writes the target digital signal into the DDR3 storage sub-module 13132 for storage. When the host computer 600 reads the target digital signal, the DDR3 storage sub-module 13132 writes the target digital signal into the second cache sub-module 13133. The host computer 600 extracts the target digital signal from the second cache sub-module 13133 through the UART interface. In this embodiment, the DDR3 storage sub-module 13132 is used to store the collected target digital signal. Compared with the ROM, the DDR3 storage sub-module 13132 can provide larger storage space and realize longer digital signal collection.
[0096] Optionally, the power supply unit 500 includes an anti-reverse connection circuit 510, an overvoltage protection circuit 520, a filter circuit 530 and a transformer circuit. The anti-reverse connection circuit 510, the overvoltage protection circuit 520, the filter circuit 530 and the transformer circuit are connected in sequence.
[0097] In this embodiment, as shown in Figure 7As shown, the power supply unit 500 can use an external battery pack Vin as its power input, and then obtains the power supply voltage Vcc through a reverse connection protection circuit 510, an overvoltage protection circuit 520, and a filter circuit 530. The on / off state of Vin is controlled by a single-pole double-throw switch SW1. Optionally, the voltage of the battery pack Vin is greater than 16V. It should be noted that... Figure 7 One example of the circuit shown is provided. Other circuits in the prior art can also be used to convert the external battery pack Vin to the power supply voltage Vcc, and this application is not limited to this.
[0098] The power supply voltage Vcc, after passing through the transformer circuit, obtains a certain positive or negative voltage value, for example: ±16V. Optionally, the circuit diagram of the transformer circuit is as follows: Figure 8 and / or Figure 9 As shown, Figure 8 and Figure 9 As shown, the transformer circuit may include a TPS5430 chip, through... Figure 8 Obtain a positive 16V voltage, through Figure 9 A voltage of -16V is obtained.
[0099] The power supply unit 500 supplies power to the multi-functional instrument, which operates at 5V. Therefore, voltage adjustment is necessary. Optionally, the transformer circuit is also connected to a charging interface to provide power to external devices such as mobile phones and tablets, facilitating power supply for communication devices like mobile phones while working outdoors. Optionally, the charging interface can be a USB interface, a Type-C interface, etc. Therefore, this application... Figure 10 The positive 16V output voltage of the transformer circuit is adjusted to obtain positive voltages of different values, according to... Figure 11 The circuit shown adjusts the negative 16V output voltage of the transformer circuit to obtain negative voltage values of different values.
[0100] For example, Figure 10 In this process, a +16V voltage is connected to pin 15 of the TPS7A4701 chip, and pins 6 and 9 are grounded simultaneously. Since the voltage corresponding to pin 6 is +2V and the voltage corresponding to pin 9 is +8V, a +10V voltage can be output.
[0101] Figure 11 In this circuit, a negative 16V voltage is connected to pin 15 of the TPS7A3301 chip. Different negative voltage values can be output by adjusting the resistance value of the resistor in the voltage divider circuit 5401.
[0102] In this embodiment, the multifunctional instrument has a built-in power supply unit 500, which not only provides stable power to the multifunctional instrument, but also provides power to external devices, solving the problem of inconvenience in charging when working outside and improving the convenience of the multifunctional instrument.
[0103] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not limited thereto; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that; it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A multi-functional instrument characterized in that, The multifunctional instrument comprises an FPGA signal processing unit, a display unit, an analog-to-digital conversion ADC unit, a digital-to-analog conversion DAC unit and a power supply unit. The FPGA signal processing unit comprises an ARM module, an SPI module and a multifunctional module, the FPGA signal processing unit is connected with the ADC unit and the DAC unit through the multifunctional module, the FPGA signal processing unit is connected with the display unit through the ARM module, and the SPI module is connected between the ARM module and the multifunctional module. When the multifunctional instrument works in a signal source function, the multifunctional module comprises a signal generation module.
2. The multi-functional instrument according to claim 1, characterized by, The signal generation module is connected with the DAC unit and the SPI module. When the multifunctional instrument works in a multimeter function, the multifunctional module further comprises a first cache module and a clock signal generation module.
3. The multi-functional instrument according to claim 2, wherein The clock signal generation module is connected with the first cache module, the signal generation module and the ADC unit, and the first cache module is further connected with the ADC unit and the SPI module. The multifunctional instrument further comprises a voltage-current conversion unit connected with the ADC unit.
4. The multi-functional instrument according to claim 3, characterized by When the multifunctional instrument works in an oscilloscope function, the multifunctional module further comprises a frequency division module, a sampling module, a second cache module, a detection module and a signal measurement module. The clock signal generation module is connected with the frequency division module and the sampling module, the frequency division module is connected with the SPI module, the SPI module and the frequency division module are further connected with the sampling module, the second cache module, the detection module and the signal measurement module, the frequency division module is further connected with the ADC unit, and the sampling module is further connected with the ADC unit, the second cache module and the detection module.
5. The multi-functional instrument according to claim 3, wherein When the multifunctional instrument works in a spectrum analyzer function, the multifunctional module further comprises a third cache module, a frequency domain conversion module and a frequency domain calculation module. The clock signal generation module is connected with the third cache module and the frequency domain conversion module, the third cache module is further connected with the ADC unit, and the frequency domain calculation module is connected with the frequency domain conversion module and the SPI module.
6. The multi-functional instrument according to claim 3, wherein When the multifunctional instrument works in a logic analyzer function, the multifunctional instrument further comprises a host computer, and the multifunctional module further comprises a sampling configuration module and a storage module. The sampling configuration module is connected with the frequency division module, the host computer and the storage module, and the storage module is further connected with the host computer.
7. The multi-functional instrument according to claim 5, wherein The power supply unit comprises an anti-reverse connection circuit, an overvoltage protection circuit, a filter circuit and a transformer circuit. The anti-reverse connection circuit, the overvoltage protection circuit, the filter circuit and the transformer circuit are connected in sequence.
8. The multi-functional instrument according to any one of claims 1 to 7, characterized by,