Protection circuit of data line interface

Abstract

The utility model discloses a protection circuit of a data line interface. The protection circuit comprises an input voltage rectification filtering module, an RCD absorption loop module, an output rectification filtering module, an input-output feedback control loop module and an output voltage protocol control circuit. The input voltage rectifying and filtering module rectifies and filters alternating current into direct current; the RCD absorption loop module absorbs a voltage peak generated by the direct current between the primary windings of the transformer; the output rectifying and filtering module converts the output voltage of the transformer into stable direct-current voltage and supplies the stable direct-current voltage to terminal equipment; the input-output feedback control loop module maintains the output voltage within a preset voltage range to realize stable output of the voltage; and the output voltage protocol control circuit is in communication connection with the terminal equipment, and selects proper output voltage to supply to the terminal equipment according to a voltage request of the terminal equipment. According to the utility model, the damage of surge current to the chip and the field effect transistor can be effectively avoided, and the safety is improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to data line technical field especially relates to a protection circuit of data line interface. BACKGROUND

[0002] The existing data line interface circuit includes a main control chip, a connection end for connecting a charger, a plug-in end for connecting an electronic device, and a switching circuit, wherein the switching circuit includes a field effect transistor, the gate of the field effect transistor is connected to the control end pin of the main control chip, the drain of the field effect transistor is connected to the connection end for connecting the charger, and the source of the field effect transistor is connected to the plug-in end.

[0003] The connection end of the existing data line interface circuit is connected to a data line to pass current, and surge current often occurs, which is harmful to the chip and can cause the chip and the field effect transistor to burn out, resulting in a safety hazard. SUMMARY

[0004] The utility model discloses a protection circuit of data line interface, which aims to avoid damage to the chip caused by surge current and improve safety.

[0005] To achieve the above-mentioned purpose, the utility model provides a protection circuit of data line interface, which comprises an input voltage rectification and filtering module, an RCD absorption circuit module, an output rectification and filtering module, an input-output feedback control circuit module and an output voltage protocol control circuit.

[0006] The input voltage rectification and filtering module is used to rectify and filter alternating current into direct current and suppress the conduction interference of low-frequency part.

[0007] The RCD absorption circuit module includes a transformer T1, and is used to absorb the voltage spike generated between the primary winding of the transformer T1 by direct current.

[0008] The output rectification and filtering module is used to change the output voltage of the transformer T1 into stable direct current voltage and supply the stable direct current voltage to the terminal device.

[0009] The input-output feedback control circuit module is used to maintain the output voltage within a preset voltage range and realize stable output of the voltage.

[0010] The output voltage protocol control circuit is in communication connection with the terminal device and is used to select a suitable output voltage to supply the terminal device according to the voltage request of the terminal device.

[0011] The utility model further technical scheme is, the input voltage rectifier filter module includes fuse F1, rectifier bridge BD1, electrolytic capacitor CE1, electrolytic capacitor CE2, inductance L1 and inductance L2;

[0012] Among them, the pin 1 of rectifier bridge BD1 is connected ACL through fuse F1, pin 2 is connected CAN, pin 3 is connected one end of inductance L1, one end of electrolytic capacitor CE1, pin 4 is connected one end of inductance L2, the other end of electrolytic capacitor CE1, the other end of inductance L2 is connected one end of electrolytic capacitor CE2, input-output feedback control loop, and is grounded, and the other end of inductance L1 is connected RCD absorption circuit.

[0013] The utility model further technical scheme is, RCD absorption circuit module includes: resistance R2, resistance R3, capacitor C2, capacitor C19, diode D1 and transformer T1;

[0014] One end of resistance R2 is connected the other end of inductance L1, one end of capacitor C2 and the pin 5 of transformer T1, and the other end of resistance R2 is connected one end of resistance R3, the other end of capacitor C2, the other end of resistance R3 is connected one end of capacitor C19 and the cathode of diode D1, the other end of capacitor C19 is connected the anode of diode D1, and the pin A of transformer T1 is connected output rectifier filter module, and the pin E is connected input-output feedback control loop module.

[0015] The utility model further technical scheme is, output rectifier filter module includes resistance R1, capacitor C1, capacitor C3, capacitor C16, capacitor CE3, capacitor C17 and chip U2;

[0016] The pin A of transformer T1 is connected the pin 4 of chip U2, one end of capacitor C16, one end of capacitor CE3, input-output feedback control loop module, one end of capacitor C17, the pin E of transformer T1 is connected the pin 5, pin 6, pin 7, pin 8 of chip U2 and one end of resistance R1, the other end of resistance R1 is connected one end of capacitor C1, the other end of capacitor C1 is connected the other end of capacitor C16, one end of capacitor C3, the pin 2, pin 1 of chip U2, the other end of capacitor CE3, the other end of capacitor C17, and the other end of capacitor C3 is connected the pin 3 of chip U2.

[0017] The further technical scheme of the utility model discloses, input - output feedback control loop module includes resistance R4, resistance R5, resistance R7, resistance R9, resistance R10, resistance R11, resistance R12, resistance R13, resistance R14, diode D2, inductance L3, capacitor C4, capacitor C5, capacitor C6, capacitor C18, capacitor CY1, capacitor CE4, chip U1, chip U6 and photo -coupler U3;

[0018] Resistance R4, resistance R5 are connected between HV and the pin 3 of chip U6, the pin 1 of chip U6 is also connected the one end of capacitor C18, the pin 5 of chip U1, the cathode of diode D2 is connected VDD and the one end of resistance R7, the anode of diode D2 is connected the one end of inductance L3, the one end of capacitor CE4, the other end of inductance L3 is connected the pin 2 of chip U6, the other end of resistance R7 is connected the one end of resistance R11, the pin 4 of chip U6, the pin 8 of chip U6 is connected the pin 7 of chip U6, pin 6, the one end of resistance R10, the one end of resistance R12, the pin 3 of chip U6 is connected the one end of capacitor C6, the one end of resistance R14, the other end of resistance R14 is connected the pin 4 of photo -coupler U3, the pin 1 of chip U6 is connected the one end of capacitor C4, the pin 3 of transformer T1, the pin 2 of chip U6 is connected the other end of inductance L2, the one end of capacitor C4, the one end of capacitor CY1 is connected the pin 1 of transformer T1, and is grounded, and the other end is connected output voltage protocol control circuit, the pin 1 of photo -coupler U3 is connected the one end of resistance R9, the one end of resistance R13, the one end of capacitor C5, the other end of resistance R9, the other end of capacitor C5 is connected the pin A of transformer T1, the other end of resistance R13 is connected the pin 2 of chip U3, the pin 3 of chip U3 is connected the other end of capacitor C6, the other end of resistance R10, the other end of resistance R12, the other end of capacitor C18, the other end of resistance R11, the other end of capacitor CE4, the pin 1 of chip U6, and is grounded.

[0019] The further technical scheme of the utility model discloses, output voltage protocol control circuit includes chip U4, MOS tube Q1, MOS tube Q2, capacitor C7, capacitor C9, capacitor C10, capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, resistance R15, resistance R16, resistance R17, resistance R18, resistance R19, resistance 20, resistance R21, resistance R22, resistance R23, resistance R24, resistance R25, resistance R26;

[0020] One end of the capacitor C9 is connected with one end of the capacitor C11, pin 21 of the chip U4, pin 1 of the chip U2, the other end of the capacitor C9 is connected with pin 5D, pin 6D, pin 7D, pin 8D of the MOS tube Q1 and pin A of the transformer T1, the other end of the capacitor C11 is connected with pin 18 of the chip U4, pin 17 of the chip U4 is connected with pin G4 of the MOS tube Q1, pin 16 of the chip U4 is connected with pin S1, pin S2, pin S3 of the MOS tube Q1 and pin A4 of the interface USB2-C;The pin 20 of the chip U4 is connected with one end of the capacitor C13, one end of the capacitor C14 and pin 2 of the optocoupler U3, the other end of the capacitor C13 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with pin 1 of the chip U4, the other end of the capacitor C14 is connected with one end of the resistor R18, the other end of the resistor R18 is connected with pin 2 of the chip U4, one end of the resistor R22 and one end of the resistor R25, the other end of the resistor R22 is connected with pin A of the transformer T1, the other end of the resistor R25 is connected with pin 2 of the optocoupler U3, pin 4 of the chip U4 is connected with the MOS tube Q2, pin 5 of the U4 is connected with pin 1 of the interface USB1-A, the MOS tube is also connected with pin 1 of the interface USB1-A and pin A of the transformer T1 respectively, the resistor R26 is connected between pin 6 of the chip U4 and pin 2 of the interface USB1-A in series, the resistor R24 is connected between pin 7 of the chip U4 and pin 3 of the interface USB1-A in series, pin 8 of the chip U4 is connected with pin 4 of the interface USB1-A and one end of the resistor R20, the other end of the resistor R20 is connected with pin 1 of the chip U2, pin 10 of the chip U4 is connected with one end of the resistor R23, the other end of the resistor R23 is connected with pin 11 of the chip U4, pin B1 and pin A1 of the interface USB2-C and one end of the capacitor C7, the other end of the capacitor C7 is connected with pin B9, pin A4, pin A9 of the interface USB2-C and one end of the capacitor C15, the other end of the capacitor C15 is connected with pin A1 of the interface USB2-C, pin 15 of the chip U4 is connected with one end of the capacitor C12 and one end of the resistor R15, the other end of the resistor R15 is connected with pin B5 of the interface USB2-C, the other end of the capacitor C12 is connected with one end of the capacitor C10 and pin 1 of the U2, the resistor R17 is connected between pin 14 of the chip U4 and pin A6 of the interface USB2-C in series, the resistor 19 is connected between pin 13 of the chip U4 and pin A7 of the interface USB2-C in series, pin 11 of the chip U4 is connected with the other end of the capacitor C10 and one end of the resistor R21, the other end of the resistor R21 is connected with pin A5 of the interface USB2-C.

[0021] The utility model discloses a technical scheme, including: input voltage rectification filter module, RCD absorption loop module, output rectification filter module, input-output feedback control loop module and output voltage protocol control circuit, input voltage rectification filter module is used for rectification filter into direct current with alternating current, and the conduction interference of low frequency part is suppressed, RCD absorption loop module includes transformer T1, and RCD absorption loop module is used for absorbing the voltage peak that direct current produced between transformer T1 primary winding, output rectification filter module is used for changing the output voltage of transformer T1 into stable direct current voltage, and the stable direct current voltage is supplied to terminal equipment, input-output feedback control loop module is used for maintaining output voltage in the preset voltage range, realizes the stable output of voltage, and output voltage protocol control circuit is connected with terminal equipment communication, is used for selecting the output voltage of suitable according to the voltage request of terminal equipment and supplies terminal equipment, can effectively avoid the damage that surge current causes to chip and field effect transistor, promotes security. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical scheme in the embodiment of the utility model or prior art, the following will briefly introduce the drawing needed to be used in the embodiment or prior art description, and obviously, the drawing in the following description is only some embodiments of the utility model, and for those skilled in the art, other drawings can be obtained according to the structure shown in the drawing without creative labor.

[0023] Figure 1 It is the circuit structure schematic diagram of the protection circuit of the data line interface of the utility model.

[0024] The realization, functional characteristics and advantages of the utility model will be further described with reference to the drawings. DETAILED DESCRIPTION

[0025] The technical scheme in the embodiment of the utility model will be clearly and completely described in the following by combining the drawings in the embodiment of the utility model, and obviously, the described embodiment is only a part of the embodiment of the utility model, not all the embodiments. Based on the embodiment in the utility model, all other embodiments obtained by those skilled in the art without creative labor belong to the protection scope of the utility model.

[0026] Please refer to Figure 1 The utility model proposes a kind of protection circuit of data line interface, and the protection circuit of data line interface of the utility model preferred embodiment includes: input voltage rectification filter module, RCD absorption loop module, output rectification filter module, input-output feedback control loop module and output voltage protocol control circuit.

[0027] The input voltage rectification and filtering module is used to rectify and filter AC power into DC power and suppress conducted interference in the low-frequency range.

[0028] The RCD absorption circuit module includes a transformer T1. The RCD absorption circuit module is used to absorb voltage spikes generated by DC current in the primary winding of transformer T1.

[0029] The output rectifier and filter module is used to convert the output voltage of transformer T1 into a stable DC voltage, and supply the stable DC voltage to the terminal equipment.

[0030] The input-output feedback control loop module is used to maintain the output voltage within a preset voltage range, thereby achieving stable voltage output.

[0031] The output voltage protocol control circuit is connected to the terminal device and is used to select an appropriate output voltage to supply to the terminal device according to the voltage request of the terminal device.

[0032] Specifically, the input voltage rectification and filtering module includes a fuse F1, a rectifier bridge BD1, an electrolytic capacitor CE1, an electrolytic capacitor CE2, an inductor L1, and an inductor L2.

[0033] Fuse F1 provides fault protection for the entire power supply system. Rectifier bridge BD1 and electrolytic capacitor CE1 rectify and filter AC power into DC power. Electrolytic capacitor CE1, inductor L1 and electrolytic capacitor CE2 together form a π-type filter to suppress conducted interference in the low-frequency range.

[0034] like Figure 1 As shown, pin 1 of rectifier bridge BD1 is connected to ACL through fuse F1, pin 2 is connected to CAN, pin 3 is connected to one end of inductor L1 and one end of electrolytic capacitor CE1, pin 4 is connected to one end of inductor L2 and the other end of electrolytic capacitor CE1, the other end of inductor L2 is connected to one end of electrolytic capacitor CE2 and the input-output feedback control loop, and is grounded, and the other end of inductor L1 is connected to the RCD snubber circuit.

[0035] In this embodiment, the RCD absorption circuit module includes: resistor R2, resistor R3, capacitor C2, capacitor C19, and transformer T1.

[0036] After the DC voltage passes through transformer T1, the voltage or current generated is affected by the high-frequency switching of the MOSFET inside chip U1. Due to the leakage inductance of the transformer, a voltage spike is generated between the primary windings of transformer T1. This spike is absorbed and weakened by the RCD circuit composed of diode D1, capacitor C19, resistor R3, resistor R2, and capacitor C2, thereby meeting the voltage stress range of the integrated switching transistor inside chip U1 and preventing damage to the MOSFET caused by excessively high spikes.

[0037] In this embodiment, one end of the resistor R2 is connected to the other end of the inductor L1, one end of the capacitor C2 and pin 5 of the transformer T1, the other end of the resistor R2 is connected to one end of the resistor R3, the other end of the capacitor C2, the other end of the resistor R3 is connected to one end of the capacitor C19, the cathode of the diode D1, the other end of the capacitor C19 is connected to the anode of the diode D1, pin A of the transformer T1 is connected to the output rectification and filtering module, and pin E is connected to the input-output feedback control loop module.

[0038] In this embodiment, the output rectification and filtering module includes the resistor R1, the capacitor C1, the capacitor C3, the capacitor C16, the capacitor CE3, the capacitor C17 and the chip U2.

[0039] The output voltage of the transformer T1 is rectified by the chip U2 and filtered by the capacitor CE3, and becomes a stable DC voltage, which can be supplied to the terminal device.

[0040] In this embodiment, pin A of the transformer T1 is connected to pin 4 of the chip U2, one end of the capacitor C16, one end of the capacitor CE3, the input-output feedback control loop module and one end of the capacitor C17, pin E of the transformer T1 is connected to pin 5, pin 6, pin 7, pin 8 of the chip U2 and one end of the resistor R1, the other end of the resistor R1 is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to the other end of the capacitor C16, one end of the capacitor C3, pin 2, pin 1 of the chip U2, the other end of the capacitor CE3, the other end of the capacitor C17, and the other end of the capacitor C3 is connected to pin 3 of the chip U2.

[0041] In this embodiment, the input-output feedback control loop module includes the resistor R4, the resistor R5, the resistor R7, the resistor R9, the resistor R10, the resistor R11, the resistor R12, the resistor R13, the resistor R14, the diode D2, the inductor L3, the capacitor C4, the capacitor C5, the capacitor C6, the capacitor C18, the capacitor CY1, the capacitor CE4, the chip U1, the chip U6 and the optocoupler U3.

[0042] The resistor R4 and the resistor R5 are connected in series between the HV and the pin 3 of the chip U6, the pin 1 of the chip U6 is also connected to one end of the capacitor C18, the pin 5 of the chip U1, the cathode of the diode D2, one end of the resistor R7, one end of the inductor L3, one end of the capacitor CE4, the other end of the inductor L3 is connected to the pin 2 of the chip U6, the other end of the resistor R7 is connected to one end of the resistor R11, the pin 4 of the chip U6, the pin 8 of the chip U6 is connected to the pin 7 of the chip U6, the pin 6 of the chip U6, one end of the resistor R10, one end of the resistor R12, the pin 3 of the chip U6 is connected to one end of the capacitor C6, one end of the resistor R14, the other end of the resistor R14 is connected to the pin 4 of the optocoupler U3, the pin 1 of the chip U6 is connected to one end of the capacitor C4, the pin 3 of the transformer T1, the pin 2 of the chip U6 is connected to the other end of the inductor L2, one end of the capacitor C4, one end of the capacitor CY1 is connected to the pin 1 of the transformer T1 and grounded, the other end is connected to the output voltage protocol control circuit, the pin 1 of the optocoupler U3 is connected to one end of the resistor R9, one end of the resistor R13, one end of the capacitor C5, the other end of the resistor R9, the other end of the capacitor C5 is connected to the pin A of the transformer T1, the other end of the resistor R13 is connected to the pin 2 of the chip U3, the pin 3 of the chip U3 is connected to the other end of the capacitor C6, the other end of the resistor R10, the other end of the resistor R12, the other end of the capacitor C18, the other end of the resistor R11, the other end of the capacitor CE4, the pin 1 of the chip U6 and grounded.

[0043] The working principle of the input-output feedback control loop module is as follows:

[0044] When the output voltage is higher than the preset value, the preset voltage is determined by the voltage dividing resistor R9 and the resistor R13, the voltage of the electrolytic capacitor CE3 is connected to the 1-2 pin of the optocoupler U3 through the resistor R9 and the capacitor C5, when the voltage of the electrolytic capacitor CE3 increases, the current flowing through the optocoupler U3 also increases, the light intensity of the light emitting diode between the 1-2 pins of the optocoupler U3 increases, the light signal received by the phototriode between the 3-4 pins of the optocoupler U3 is enhanced, the triode current increases, thereby increasing the voltage of the 3 pin of the optocoupler U1, the 3 pin voltage detected by the chip U1 increases, the recognition of the high output voltage reduces the duty cycle of the driving voltage through the internal circuit, shortens the conduction time of the internal integrated MOS tube, and reduces the storage energy of the transformer, thereby realizing the reduction of the output voltage. Similarly, when the output voltage decreases, the secondary voltage flows through the optocoupler signal feedback to the IC, increases the conduction duty cycle of the MOS tube integrated in the chip U1 to increase the energy output. Finally, it is maintained near the required voltage with slight fluctuations up and down, realizing the stability of the output voltage. The input voltage loop of the chip U1 works, the input voltage is introduced from the electrolytic capacitor CE2 by the resistor R4 and the resistor R5 when the output is not established after starting, and the chip capacitor C18 is charged. When the voltage is high to the minimum starting voltage of the chip U1, the chip U1 starts to work. When the chip U1 starts to work, the 1-2 pin of the transformer T2 provides voltage to the diode D2 and the electrolytic capacitor CE4 for rectification and filtering, and obtains a direct current voltage. The direct current voltage is boosted by the inductor L3 and the chip U6 (the boost circuit is boosted to 10V when the input voltage of the chip U6 is lower than 10V, and the boost circuit is bypassed when the input voltage is higher than 10V, and the input voltage is equal to the output voltage). The primary main current loop of the power supply, the loop voltage from the electrolytic capacitor CE2 to the 5-3 pin of the transformer T1, then to the drain of the MOS tube inside the chip U1 IC, and finally from the source of the MOS tube, through the resistor R10 and the resistor R12, back to the ground of the electrolytic capacitor CE2.

[0045] In this embodiment, the output voltage protocol control circuit includes the chip U4, the MOS tube Q1, the MOS tube Q2, the capacitor C7, the capacitor C9, the capacitor C10, the capacitor C11, the capacitor C12, the capacitor C13, the capacitor C14, the capacitor C15, the resistor R15, the resistor R16, the resistor R17, the resistor R18, the resistor R19, the resistor 20, the resistor R21, the resistor R22, the resistor R23, the resistor R24, the resistor R25, and the resistor R26.

[0046] One end of the capacitor C9 is connected to one end of the capacitor C11, pin 21 of the chip U4, pin 1 of the chip U2, the other end of the capacitor C9 is connected to pin 5D, pin 6D, pin 7D, pin 8D of the MOS tube Q1 and pin A of the transformer T1, the other end of the capacitor C11 is connected to pin 18 of the chip U4, pin 17 of the chip U4 is connected to pin G4 of the MOS tube Q1, pin 16 of the chip U4 is connected to pin S1, pin S2, pin S3 of the MOS tube Q1 and pin A4 of the interface USB2-C; pin 20 of the chip U4 is connected to one end of the capacitor C13, one end of the capacitor C14 and pin 2 of the optical coupler U3, the other end of the capacitor C13 is connected to one end of the resistor R16, the other end of the resistor R16 is connected to pin 1 of the chip U4, the other end of the capacitor C14 is connected to one end of the resistor R18, the other end of the resistor R18 is connected to pin 2 of the chip U4, one end of the resistor R22 and one end of the resistor R25, the other end of the resistor R22 is connected to pin A of the transformer T1, the other end of the resistor R25 is connected to pin 2 of the optical coupler U3, pin 4 of the chip U4 is connected to the MOS tube Q2, pin 5 of the chip U4 is connected to pin 1 of the interface USB1-A, the MOS tube is also connected to pin 1 of the interface USB1-A, pin A of the transformer T1, the resistor R26 is connected between pin 6 of the chip U4 and pin 2 of the interface USB1-A, the resistor R24 is connected between pin 7 of the chip U4 and pin 3 of the interface USB1-A, pin 8 of the chip U4 is connected to pin 4 of the interface USB1-A and one end of the resistor R20, the other end of the resistor R20 is connected to pin 1 of the chip U2, pin 10 of the chip U4 is connected to one end of the resistor R23, the other end of the resistor R23 is connected to pin 11 of the chip U4, pin B1 and pin A1 of the interface USB2-C and one end of the capacitor C7, the other end of the capacitor C7 is connected to pin B9, pin A4, pin A9 of the interface USB2-C and one end of the capacitor C15, the other end of the capacitor C15 is connected to pin A1 of the interface USB2-C, pin 15 of the chip U4 is connected to one end of the capacitor C12 and one end of the resistor R15, the other end of the resistor R15 is connected to pin B5 of the interface USB2-C, the other end of the capacitor C12 is connected to one end of the capacitor C10 and pin 1 of the U2, the resistor R17 is connected between pin 14 of the chip U4 and pin A6 of the interface USB2-C, the resistor 19 is connected between pin 13 of the chip U4 and pin A7 of the interface USB2-C, pin 11 of the chip U4 is connected to the other end of the capacitor C10, one end of the resistor R21, the other end of the resistor R21 is connected to pin A5 of the interface USB2-C.

[0047] The power supply is a PD fast charging, and the output voltage is from 3.3V-20V. The power supply needs to handshake and communicate with the terminal device to select the output voltage value. This function is mainly realized through the protocol chip U4 and peripheral components. The terminal device communicates with the chip U4 protocol IC through resistors R15, R17, R19, R21, capacitors C10 and C12. The chip U4 gives the appropriate output voltage according to the voltage request of the terminal device to supply the terminal device. A VBUS MOS tube (MOS tube Q2 and MOS tube Q1) is connected in series between the electrolytic capacitor CE3 and the interface USB1-A (A port) and the interface USB2-C (C port). When the A port is inserted into the terminal, the protocol IC detects that there is voltage between the two ends of the resistor R20 through the 8-9 pin, and at the same time gives a driving voltage through the 4th pin to open the drain-source of the MOS tube Q2, realizing the voltage output of the A port. When the C port is inserted into the terminal, the protocol IC detects that there is voltage between the two ends of the resistor R23 through the 10-11 pin, and at the same time gives a driving voltage through the 17th pin to open the drain-source of the MOS tube Q1, realizing the voltage output of the C port. When the A port and the C port are inserted, the MOS tube Q1 and the MOS tube Q2 are turned on at the same time to supply 5V to the two terminals.

[0048] The utility model discloses a technical scheme above, include: input voltage rectifier filter module, RCD absorption loop module, output rectifier filter module, input-output feedback control loop module and output voltage protocol control circuit, input voltage rectifier filter module is used for rectifying filter into direct current with alternating current, and the conduction interference of low frequency part is suppressed, RCD absorption loop module includes transformer T1, and RCD absorption loop module is used for absorbing the voltage peak that direct current produced between transformer T1 primary winding, output rectifier filter module is used for changing the output voltage of transformer T1 into stable direct voltage, and the stable direct voltage is supplied to terminal equipment, input-output feedback control loop module is used for maintaining output voltage in the preset voltage range, realizes the stable output of voltage, and output voltage protocol control circuit is connected with terminal equipment communication, is used for selecting the appropriate output voltage according to the voltage request of terminal equipment and supplies terminal equipment, can effectively avoid the damage of inrush current to chip and field effect transistor, improves security.

[0049] The above is only the preferred embodiment of the utility model, and does not limit the patent range of the utility model, and any equivalent structural transformation made under the concept of the utility model, or direct / indirect application in other related technical fields is included in the patent protection range of the utility model.

Claims

1. A protection circuit for a data line interface, characterized by The application relates to a voltage stabilizing circuit, which comprises an input voltage rectification filter module, an RCD absorption circuit module, an output rectification filter module, an input-output feedback control circuit module and an output voltage protocol control circuit. The input voltage rectification filter module is used for rectifying alternating current into direct current and inhibiting conduction interference of a low-frequency part. The RCD absorption circuit module comprises a transformer T1, and is used for absorbing voltage spikes generated between primary windings of the transformer T1. The output rectification filter module is used for changing output voltage of the transformer T1 into stable direct current voltage and supplying the terminal equipment with the stable direct current voltage. The input-output feedback control circuit module is used for maintaining output voltage in a preset voltage range and realizing stable output of the voltage. The output voltage protocol control circuit is in communication connection with the terminal equipment and is used for selecting a suitable output voltage to supply the terminal equipment according to a voltage request of the terminal equipment. The input voltage rectification filter module comprises a fuse F1, a rectification bridge BD1, electrolytic capacitors CE1 and CE2, inductors L1 and L2.

2. The protection circuit for a data line interface according to claim 1, wherein, Pin 1 of the rectification bridge BD1 is connected with ACL through the fuse F1, pin 2 is connected with CAN, pin 3 is connected with one end of the inductor L1 and one end of the electrolytic capacitor CE1, pin 4 is connected with one end of the inductor L2 and the other end of the electrolytic capacitor CE1, the other end of the inductor L2 is connected with one end of the electrolytic capacitor CE2 and the input-output feedback control circuit and grounded, and the other end of the inductor L1 is connected with the RCD absorption circuit. The RCD absorption circuit module comprises resistors R2 and R3, capacitors C2 and C19, a diode D1 and the transformer T1.

3. The protection circuit for a data line interface according to claim 2, wherein, One end of the resistor R2 is connected with the other end of the inductor L1, one end of the capacitor C2 and a pin 5 of the transformer T1, the other end of the resistor R2 is connected with one end of the resistor R3 and the other end of the capacitor C2, the other end of the resistor R3 is connected with one end of the capacitor C19 and a cathode of the diode D1, the other end of the capacitor C19 is connected with an anode of the diode D1, a pin A of the transformer T1 is connected with the output rectification filter module, and a pin E is connected with the input-output feedback control circuit module. The output rectification filter module comprises resistors R1 and R4, capacitors C1, C3, C16, CE3, C17 and a chip U2.

4. The protection circuit for a data line interface according to claim 3, wherein, ​ The pin A of the transformer T1 is connected with the pin 4 of the chip U2, one end of the capacitor C16, one end of the capacitor CE3, the input-output feedback control loop module, one end of the capacitor C17, the pin E of the transformer T1 is connected with the pin 5, pin 6, pin 7, pin 8 of the chip U2 and one end of the resistor R1, the other end of the resistor R1 is connected with one end of the capacitor C1, the other end of the capacitor C1 is connected with the other end of the capacitor C16, one end of the capacitor C3, the pin 2, pin 1 of the chip U2, the other end of the capacitor CE3, the other end of the capacitor C17, the other end of the capacitor C3 is connected with the pin 3 of the chip U2.

5. The protection circuit for a data line interface according to claim 4, wherein, The input-output feedback control loop module comprises the resistor R4, the resistor R5, the resistor R7, the resistor R9, the resistor R10, the resistor R11, the resistor R12, the resistor R13, the resistor R14, the diode D2, the inductor L3, the capacitor C4, the capacitor C5, the capacitor C6, the capacitor C18, the capacitor CY1, the capacitor CE4, the chip U1, the chip U6 and the optocoupler U3. The resistor R4 and the resistor R5 are connected in series between HV and the pin 3 of the chip U6, the pin 1 of the chip U6 is further connected with one end of the capacitor C18 and the pin 5 of the chip U1, the cathode of the diode D2 is connected with VDD and one end of the resistor R7, the anode of the diode D2 is connected with one end of the inductor L3, one end of the capacitor CE4, the other end of the inductor L3 is connected with the pin 2 of the chip U6, the other end of the resistor R7 is connected with one end of the resistor R11 and the pin 4 of the chip U6, the pin 8 of the chip U6 is connected with the pin 7, pin 6 of the chip U6, one end of the resistor R10, one end of the resistor R12, the pin 3 of the chip U6 is connected with one end of the capacitor C6 and one end of the resistor R14, the other end of the resistor R14 is connected with the pin 4 of the optocoupler U3, the pin 1 of the chip U6 is connected with one end of the capacitor C4 and the pin 3 of the transformer T1, the pin 2 of the chip U6 is connected with the other end of the inductor L2 and one end of the capacitor C4, one end of the capacitor CY1 is connected with the pin 1 of the transformer T1 and grounded, the other end is connected with the output voltage protocol control circuit, the pin 1 of the optocoupler U3 is connected with one end of the resistor R9, one end of the resistor R13 and one end of the capacitor C5, the other end of the resistor R9 and the other end of the capacitor C5 are connected with the pin A of the transformer T1, the other end of the resistor R13 is connected with the pin 2 of the chip U3, the pin 3 of the chip U3 is connected with the other end of the capacitor C6, the other end of the resistor R10, the other end of the resistor R12, the other end of the capacitor C18, the other end of the resistor R11, the other end of the capacitor CE4, the pin 1 of the chip U6 and grounded.

6. The protection circuit for a data line interface according to claim 5, wherein, The output voltage protocol control circuit comprises a chip U4, a MOS tube Q1, a MOS tube Q2, a capacitor C7, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a resistor R15, a resistor R16, a resistor R17, a resistor R18, a resistor R19, a resistor 20, a resistor R21, a resistor R22, a resistor R23, a resistor R24, a resistor R25, and a resistor R26. One end of the capacitor C9 is connected with one end of the capacitor C11, pin 21 of the chip U4, pin 1 of the chip U2, the other end of the capacitor C9 is connected with pin 5D, pin 6D, pin 7D, pin 8D of the MOS tube Q1 and pin A of the transformer T1, the other end of the capacitor C11 is connected with pin 18 of the chip U4, pin 17 of the chip U4 is connected with pin G4 of the MOS tube Q1, pin 16 of the chip U4 is connected with pin S1, pin S2, pin S3 of the MOS tube Q1 and pin A4 of the interface USB2-C;The pin 20 of the chip U4 is connected with one end of the capacitor C13, one end of the capacitor C14 and pin 2 of the optocoupler U3, the other end of the capacitor C13 is connected with one end of the resistor R16, the other end of the resistor R16 is connected with pin 1 of the chip U4, the other end of the capacitor C14 is connected with one end of the resistor R18, the other end of the resistor R18 is connected with pin 2 of the chip U4, one end of the resistor R22 and one end of the resistor R25, the other end of the resistor R22 is connected with pin A of the transformer T1, the other end of the resistor R25 is connected with pin 2 of the optocoupler U3, pin 4 of the chip U4 is connected with the MOS tube Q2, pin 5 of the U4 is connected with pin 1 of the interface USB1-A, the MOS tube is also connected with pin 1 of the interface USB1-A and pin A of the transformer T1 respectively, the resistor R26 is connected between pin 6 of the chip U4 and pin 2 of the interface USB1-A in series, the resistor R24 is connected between pin 7 of the chip U4 and pin 3 of the interface USB1-A in series, pin 8 of the chip U4 is connected with pin 4 of the interface USB1-A and one end of the resistor R20, the other end of the resistor R20 is connected with pin 1 of the chip U2, pin 10 of the chip U4 is connected with one end of the resistor R23, the other end of the resistor R23 is connected with pin 11 of the chip U4, pin B1 and pin A1 of the interface USB2-C and one end of the capacitor C7, the other end of the capacitor C7 is connected with pin B9, pin A4, pin A9 of the interface USB2-C and one end of the capacitor C15, the other end of the capacitor C15 is connected with pin A1 of the interface USB2-C, pin 15 of the chip U4 is connected with one end of the capacitor C12 and one end of the resistor R15, the other end of the resistor R15 is connected with pin B5 of the interface USB2-C, the other end of the capacitor C12 is connected with one end of the capacitor C10 and pin 1 of the U2, the resistor R17 is connected between pin 14 of the chip U4 and pin A6 of the interface USB2-C in series, the resistor 19 is connected between pin 13 of the chip U4 and pin A7 of the interface USB2-C in series, pin 11 of the chip U4 is connected with the other end of the capacitor C10 and one end of the resistor R21, the other end of the resistor R21 is connected with pin A5 of the interface USB2-C.

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