Circuit board packaging structure with three-dimensional heat dissipation path

Abstract

The utility model provides a circuit board packaging structure with a three-dimensional heat dissipation path, which sequentially comprises a chip contact layer, a signal wiring layer, a power distribution layer, an electromagnetic shielding layer and a heat diffusion layer from top to bottom, an anti-oxidation coating, a boron nitride nanosheet transition layer and an aluminum oxide-graphene mixed coating are sequentially arranged at the bottom of the heat diffusion layer from top to bottom, a copper column is arranged between the chip contact layer and the heat diffusion layer in a penetrating mode, and an annular polyimide / silica gel composite material layer is arranged on the peripheral side of the bonding pad. A snakelike micro-channel is formed in the side face, close to the electromagnetic shielding layer, of the heat diffusion layer, the snakelike micro-channel is filled with a microcapsule packaging phase change material layer, a plurality of strip-shaped heat dissipation channels are sequentially and evenly distributed in the side face, close to the anti-oxidation coating, of the heat diffusion layer in the length direction of the heat diffusion layer, and the strip-shaped heat dissipation channels are filled with microcapsule packaging phase change material layers. The electromagnetic shielding layer is provided with a periodic hole array. And the heat dissipation performance is good.

Description

TECHNICAL FIELD

[0001] The utility model relates to circuit board technical field especially relates to a circuit board package structure with three -dimensional heat radiation path. BACKGROUND

[0002] CN220692006U, authorized announcement day is March 29, 2024, and it discloses an integrated circuit board package structure, including package shell, the one side swing hinge of package shell top end has the cover plate, the both sides fixedly connected with support block in the inside bottom of package shell, the top of support block is fixedly connected with connecting block. The integrated circuit board package structure is provided with the heat dissipation hole, filter screen, support plate and heat conduction copper sheet, and the heat conduction copper sheet at the bottom of support plate carries out heat conduction to the heat generated by circuit board, so that circuit board can be heat dissipated to prevent the damage of components caused by high temperature during the work of circuit board, the inside of cover plate is provided with heat dissipation hole, and the inside of heat dissipation hole can further heat dissipation to the inside of package shell, improve the cooling efficiency inside package shell, and the filter screen in the inside of heat dissipation hole can prevent dust and impurities from entering the inside of package shell through heat dissipation hole, solve the problem that dust and impurities easily enter the inside of shell through heat dissipation hole and the poor heat dissipation efficiency. The defects of the prior art are that the heat conduction path is single, the heat dissipation hole relies on natural convection, the efficiency of such passive heat dissipation is insufficient, the filter screen is easily blocked, air flow resistance increases, and heat dissipation efficiency decreases. In view of this situation, it is urgent to improve. SUMMARY

[0003] Therefore, the utility model discloses a kind of circuit board package structures with three-dimensional heat radiation path, with good heat dissipation performance.

[0004] The utility model provides a kind of circuit board package structures with three-dimensional heat radiation path, from top to bottom include chip contact layer, signal wiring layer, power distribution layer, electromagnetic shield layer, heat diffusion layer in sequence, chip contact layer is provided with solder pad, the bottom of heat diffusion layer is sequentially provided with anti-oxidation coating, boron nitride nanosheet transition layer, alumina-graphene hybrid coating from top to bottom, copper column is arranged between the chip contact layer with the heat diffusion layer, the periphery of solder pad is provided with annular polyimide / silica gel composite material layer, the side of heat diffusion layer close to electromagnetic shield layer is provided with serpentine microchannel, microcapsule encapsulated phase change material layer is filled in the serpentine microchannel, the side of heat diffusion layer close to anti-oxidation coating is sequentially uniformly arranged with several strip-shaped heat dissipation channels along its length direction, microcapsule encapsulated phase change material layer is filled in the strip-shaped heat dissipation channel, and electromagnetic shield layer is provided with periodic hole array.

[0005] Preferably, the signal wiring layer includes a low-dielectric resin layer and a low-roughness copper foil layer.

[0006] Preferably, the copper column surface is plated with a nickel / gold layer.

[0007] Preferably, the low dielectric resin layer is a modified polyimide layer.

[0008] Preferably, the periodic hole array has a hole diameter of 50 μm and a pitch of 150 μm.

[0009] Preferably, the hole inner wall of the periodic hole array is filled with a Fe3O4 / epoxy resin composite layer.

[0010] The copper column, the phase change material layer, and the aluminum oxide-graphene hybrid coating cooperate to form a three-dimensional heat dissipation path, thereby greatly improving the heat dissipation efficiency of the circuit board. BRIEF DESCRIPTION OF DRAWINGS

[0011] Fig. 1 is a cross-sectional view of the present application.

[0012] Fig. 2 is a top view of the heat diffusion layer.

[0013] The reference signs are: chip contact layer 10, signal wiring layer 11, power distribution layer 12, electromagnetic shielding layer 13, heat diffusion layer 14, oxidation-resistant coating 15, serpentine microchannel 16, pad 17, annular polyimide / silica gel composite layer 18, boron nitride nanosheet transition layer 19, aluminum oxide-graphene hybrid coating 20, copper column 22, strip-shaped heat dissipation channel 21, and periodic hole array 23. DETAILED DESCRIPTION

[0014] To further understand the features, technical means, and specific purposes and functions achieved by the present application, the present application is described in further detail below in conjunction with the specific embodiments and drawings.

[0015] In the present application, unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connecting", "fixing", and the like should be understood in a broad sense, for example, can be fixedly connected, can be detachably connected, or integrally connected; can be mechanically connected, or electrically connected; can be directly connected, or indirectly connected through an intermediate medium, or can be connected inside two elements. For those skilled in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0016] Please refer to Figs. 1-2As shown, the utility model provides a kind of circuit board packaging structure with three-dimensional heat radiation path, from top to bottom sequentially include chip contact layer 10, signal wiring layer 11, power distribution layer 12, electromagnetic shielding layer 13, heat diffusion layer 14, chip contact layer 10 is provided with solder pad 17, the bottom of heat diffusion layer 14 is sequentially provided with oxidation-resistant coating 15, boron nitride nanosheet transition layer 19, alumina-graphene hybrid coating 20 from top to bottom, pass through boron nitride nanosheet transition layer 19, reduce the phonon scattering of alumina-graphene hybrid coating 20, interface thermal resistance reduces 40%;Chip contact layer 10 and heat diffusion layer 14 are provided with copper column 22 between, the side of solder pad 17 is provided with annular polyimide / silica gel composite material layer 18, the side surface of heat diffusion layer 14 close to electromagnetic shielding layer 13 is provided with serpentine microchannel 16, fractal structure increases heat dissipation area, the side surface of heat diffusion layer 14 close to oxidation-resistant coating 15 is sequentially and uniformly provided with a plurality of strip-shaped heat dissipation channels 21 along its length direction, directional arrangement guides airflow or cooling liquid flow, greatly improve the efficiency of convective heat dissipation;Serpentine microchannel 16 is filled with microcapsule encapsulated phase change material layer, strip-shaped heat dissipation channel 21 is filled with microcapsule encapsulated phase change material layer, phase change material layer is composed of SiO2 shell+paraffin inner core, realizes transient heat buffering by latent heat absorption, and thermal response time is shortened to 30ms.Electromagnetic shielding layer 13 is provided with periodic hole array 23, and shielding effectiveness is greater than or equal to 30dB in 28GHz frequency band, and specific frequency band interference is selectively inhibited.In the embodiment, the cooperation structure of copper column, phase change material layer and alumina-graphene hybrid coating realizes three-dimensional heat radiation path, and the heat dissipation efficiency of circuit board is greatly improved.

[0017] Signal wiring layer 11 includes a low dielectric resin layer and a low roughness copper foil layer, a low dielectric resin layer with Dk=2.8 is used to reduce signal transmission delay and mutual capacitance coupling, reduce skin effect loss, and a low roughness copper foil with Rz≤1.5μm is combined to control high-frequency signal insertion loss within 0.25dB / inch.

[0018] The low dielectric resin layer is a modified polyimide layer. The surface of the copper column 22 is plated with a nickel / gold layer, which acts as a buffer layer to reduce the interfacial stress caused by the mismatch of the thermal expansion coefficient, greatly improving the temperature cycle life. The periodic hole array 23 has a hole diameter of 50μm and a pitch of 150μm.

[0019] A high-K dielectric layer, such as Ta2O5, is embedded between the power distribution layer and the electromagnetic shielding layer, with Dk=25, forming a distributed decoupling capacitor, greatly reducing power noise and optimizing transient current response.

[0020] The inner wall of the hole of the periodic hole array 23 is filled with a Fe3O4 / epoxy resin composite layer, so that the structure has both heat conduction and wave absorption functions.

[0021] The production process steps of the embodiment are as follows: substrate pretreatment-chip contact layer making-signal wiring layer construction-power distribution layer integration-electromagnetic shielding layer processing-thermal diffusion layer assembly-lamination and interconnection-surface treatment and testing.

[0022] In the substrate pretreatment process, a high-frequency FR4 or a polyimide flexible substrate is selected as the base material, where the Tg of FR4 is ≥180℃; a super-low roughness copper is used for the copper foil, RTF copper, Rz≤1.5μm; chemical micro-etching is used, H2SO4 / H2O2 mixed solution is used to control the copper surface roughness Ra≤0.3μm; plasma activation is used, Ar / O2 mixed gas treatment is used to enhance the interlayer bonding force;

[0023] In the chip contact layer making process, in the pad forming step, laser direct imaging is used, and the pad surface is then treated; in the annular polyimide / silicone composite coating step, screen printing and segmented curing process are used to complete the coating;

[0024] In the signal wiring layer construction process, a low-dielectric resin layer is coated, and a modified polyimide material can be used, and a spin coating process is used; a low-roughness copper foil is patterned, and a semi-additive process is used to achieve this, first sputtering a titanium / copper seed layer, then dry film lithography, and then electroplating copper;

[0025] In the power distribution layer integration process, first deposit a high-K dielectric layer, use Ta2O5 thin film, ALD atomic layer deposition; make a copper column, use laser drilling and hole filling electroplating;

[0026] In the electromagnetic shielding layer processing process, first make a periodic hole array 23, use femtosecond laser drilling and then ferrite filling; then perform surface metallization operation;

[0027] In the thermal diffusion layer assembly process, gradient coating deposition is performed, then serpentine microchannel 16 and strip-shaped heat dissipation channel 21 are processed and filled, the channel is formed by UV laser cutting, and the filling process uses vacuum-assisted microfluidic dispensing;

[0028] In the lamination and interconnection process, first use an X-ray alignment system for interlayer alignment, then use a hot pressing process;

[0029] In the surface treatment and testing process, after the solder resist layer is coated, thermal cycle testing, high-frequency signal integrity and heat dissipation performance testing are performed.

[0030] The above-described embodiment only expresses one implementation manner of the utility model, and the description is relatively specific and detailed, but cannot be understood as a limitation on the utility model patent scope. It should be noted that, for ordinary skilled persons in the art, without departing from the concept of the utility model, a number of modifications and improvements can be made, which all belong to the protection scope of the utility model. Therefore, the protection scope of the utility model patent should be subject to the appended claims.

Claims

1. A circuit board package structure with three-dimensional heat dissipation path, comprising successively from top to bottom a chip contact layer (10), a signal wiring layer (11), a power distribution layer (12), an electromagnetic shielding layer (13), and a heat diffusion layer (14), wherein the chip contact layer (10) is provided with a solder pad (17), characterized in that: The bottom of the heat diffusion layer (14) is sequentially provided from top to bottom with an oxidation-resistant coating (15), a boron nitride nanosheet transition layer (19), and an aluminum oxide-graphene hybrid coating (20), a copper column (22) is provided through between the chip contact layer (10) and the heat diffusion layer (14), the periphery of the pad (17) is provided with an annular polyimide / silica gel composite material layer (18), a serpentine microchannel (16) is opened on the side of the heat diffusion layer (14) close to the electromagnetic shielding layer (13), the serpentine microchannel (16) is filled with a microcapsule-encapsulated phase change material layer, a plurality of strip-shaped heat dissipation channels (21) are sequentially and uniformly arranged along the length direction on the side of the heat diffusion layer (14) close to the oxidation-resistant coating (15), the strip-shaped heat dissipation channels (21) are filled with a microcapsule-encapsulated phase change material layer, and the electromagnetic shielding layer (13) is provided with a periodic hole array (23). ​ 2. The circuit board package structure with three-dimensional heat dissipation paths according to claim 1, wherein: The signal wiring layer (11) comprises a low-dielectric resin layer and a low-roughness copper foil layer.

3. The circuit board package structure with three-dimensional heat dissipation paths of claim 1, wherein: The surface of the copper column (22) is plated with a nickel / gold layer.

4. The circuit board package structure with three-dimensional heat dissipation paths of claim 2, wherein: The low-dielectric resin layer is a modified polyimide layer.

5. The circuit board package structure with three-dimensional heat dissipation paths of claim 1, wherein: The periodic hole array (23) has a hole diameter of 50 microns and a pitch of 150 microns.

6. The circuit board package structure with three-dimensional heat dissipation paths of claim 1, wherein: The hole inner wall of the periodic hole array (23) is filled with a Fe3O4 / epoxy resin composite material layer.

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