Anti-surge protection circuit
By designing a surge protection circuit and employing sampling and feedback control, surge voltage during the startup phase of the switching power supply is quickly suppressed, thus solving the problem of surge voltage's impact on the system and improving the system's safety and reliability.
Patent Information
- Application Number
- CN202423316264.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2026-03-03
- Estimated Expiration
- 2034-12-31
AI Technical Summary
In high-end electronic systems, surge voltages during the startup phase of switching power supplies can affect system stability and safety. Existing technologies struggle to effectively control and suppress surge voltages, leading to system damage.
Design a surge protection circuit, including a power input terminal, an input voltage sampling unit, a power supply regulation unit, a high voltage surge suppression circuit, a BOOST boost circuit, and an output sampling unit. Through sampling and feedback control, the surge voltage is quickly suppressed and restored to a safe range.
It significantly reduces the impact of surges on the load, improves the safety and reliability of the system, protects the power system and load equipment, and extends the service life of the equipment.
Smart Images

Figure CN223967636U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of switching power supply technology, specifically to a surge protection circuit. Background Technology
[0002] In various high-end electronic system applications, including aviation, aerospace, maritime, military, railway, communications, medical, and industrial automation, switching power supplies and DC / DC converters are widely used as auxiliary power supplies. In these systems, the power supply startup phase is particularly critical. Voltage changes at the moment the input power is switched on can affect the stability of the entire load system. When the input voltage changes instantaneously, surge voltage is generated, which can impact both the power supply and the load. If the surge voltage is too high, it can trigger a large inrush current, potentially causing power system failure or even serious damage to the entire system. Summary of the Invention
[0003] The purpose of this invention is to design a surge protection circuit that can quickly detect and control the voltage waveform when a surge occurs at the input of a switching power supply, so that the surge voltage can be quickly restored to a safe range, thereby ensuring the reliability and safety of the switching power supply system.
[0004] To achieve the above objectives, the technical solution adopted by this utility model is as follows: a surge protection circuit, comprising: a power input terminal, an input voltage sampling unit, a power supply voltage regulation unit, a high-voltage surge suppression circuit, a first output sampling unit, a BOOST boost circuit, a second output sampling unit, and a power output terminal. The power input terminal is connected to the input voltage sampling unit, the power supply voltage regulation unit, and the high-voltage surge suppression circuit. The output terminal of the input voltage sampling unit is connected to the high-voltage surge suppression circuit. The output terminal of the power supply voltage regulation unit is connected to the high-voltage surge suppression circuit. The output terminal of the high-voltage surge suppression circuit is connected to the first output sampling unit and the input terminal of the BOOST boost circuit. The output terminal of the BOOST boost circuit is connected to the second output sampling unit and the power output terminal. The input voltage sampling unit samples the input voltage and sends the sampling result to the high-voltage surge suppression circuit for monitoring and determining whether the input voltage is within a safe range. The power supply voltage regulation unit regulates the input voltage, providing a stable voltage to the power supply. The high-voltage surge suppression circuit simultaneously limits current and protects downstream circuits. It monitors the input voltage and controls surge voltage by adjusting internal switching devices to suppress high-voltage surges and protect downstream circuits from their effects. The first output sampling unit samples and divides the output voltage of the high-voltage surge suppression circuit, providing feedback signals to help adjust and stabilize the output voltage. The BOOST boost circuit raises the input voltage to a set output voltage level, ensuring stable output voltage suitable for load requirements. The second output sampling unit samples and divides the output voltage of the BOOST boost circuit, providing feedback signals to help adjust and stabilize the output voltage.
[0005] The beneficial effects of this invention are as follows: Through the surge protection circuit, the voltage surge waveform can be effectively controlled, preventing it from lasting too long or reaching excessively high voltage. Specifically, when a surge occurs at the power input terminal, the surge suppression circuit can respond quickly and control the surge voltage to rapidly return to a safe range. This process greatly reduces the surge duration and significantly reduces the impact on the load. Excessive surge voltage and prolonged surge duration often lead to excessive surge current, which may damage the entire system and power supply system. This invention, through effective surge suppression, greatly reduces this risk.
[0006] Furthermore, the surge protection circuit described in this invention has a wide range of applications and is suitable for various isolated switching power supplies or DC / DC converters. In practical applications, whether in aerospace, aviation, shipbuilding, weaponry, electronics, railway, communications, medical electronics, industrial automation equipment, or other military and civilian electronic systems, it can effectively protect power supply systems and load devices, ensuring their stable and reliable operation.
[0007] In summary, this invention significantly improves the surge protection capability of the power supply system through the design and application of surge protection circuits, ensuring the system's safety and reliability. The rapid suppression and recovery of surge voltage not only protects the power supply system and the entire system but also extends the equipment's lifespan, demonstrating significant practical application value and economic benefits. Attached Figure Description
[0008] Figure 1 This is a connection block diagram of this utility model;
[0009] Figure 2 This is the circuit diagram of this utility model. Detailed Implementation
[0010] The present invention will be further described below with reference to the accompanying drawings: Figure 1 As shown, a surge protection circuit includes a power input terminal, an input voltage sampling unit, a power supply regulating unit, a high-voltage surge suppression circuit, a first output sampling unit, a BOOST boost circuit, a second output sampling unit, and a power output terminal. The power input terminal is connected to the input voltage sampling unit, the power supply regulating unit, and the high-voltage surge suppression circuit. The output terminal of the input voltage sampling unit is connected to the high-voltage surge suppression circuit to sample the input voltage and send the sampling result to the high-voltage surge suppression circuit to monitor and determine whether the input voltage is within a safe range. The output terminal of the power supply regulating unit is connected to the high-voltage surge suppression circuit to regulate the input voltage, providing a stable voltage to the high-voltage surge suppression circuit while limiting current and protecting subsequent circuits. The output terminal of the high-voltage surge suppression circuit is connected to the first output sampling unit and the input terminal of the BOOST boost circuit. The output terminal of the BOOST boost circuit is connected to the second output sampling unit and the power output terminal. The high-voltage surge suppression circuit monitors the input voltage and controls surge voltage. It suppresses high-voltage surges by adjusting internal switching devices, protecting downstream circuits from their effects. The first output sampling unit samples and divides the output voltage of the high-voltage surge suppression circuit, providing feedback signals to help adjust and stabilize the output voltage. The BOOST boost circuit raises the input voltage to a set output voltage level, ensuring stable output voltage suitable for load requirements. The second output sampling unit samples and divides the output voltage of the BOOST boost circuit, providing feedback signals to help adjust and stabilize the output voltage.
[0011] like Figure 2As shown, the voltage sampling unit includes resistors R1, R2, and R3; the power supply regulation unit includes resistor R4 and diode D1; the high-voltage surge suppression circuit includes suppression chip U1, MOSFET power transistors Q1 and Q2, resistors R5 and R6, and capacitor C1; the first output sampling unit includes resistors R7 and R8; the BOOST boost circuit includes boost chip U2, resistors R9 and R12, inductor L1, MOSFET power transistors Q3 and Q4, and capacitors C2, C3, and C4; the second output sampling unit includes resistors R10 and R11. The high-voltage surge suppression chip U1 is an LT4364; the BOOST boost circuit boost chip U2 is an LTC3786.
[0012] The specific circuit of the surge protection circuit is as follows: the power input terminal is connected to one end of the input voltage sampling unit resistor R1, one end of the power supply regulating unit resistor R4, and the drain of the high-voltage surge suppression circuit MOSFET power transistor Q1. The other end of the input voltage sampling unit resistor R1 is connected to one end of resistor R2 and the UV terminal of the suppression chip U1. The other end of resistor R2 is connected to one end of resistor R3 and the 0V terminal of the suppression chip U1. The other end of resistor R3 is grounded. The other end of the power supply regulating unit resistor R4 is connected to the cathode of diode D1 and the Vcc terminal of the suppression chip U1. The anode of diode D1 is grounded. The high-voltage surge suppression circuit MOSFET power transistor Q1... The gate of the MOSFET is connected to one end of resistor R5, and the other end of resistor R5 is connected to the HGATE terminal of the suppression chip U1. The source of MOSFET power transistor Q1 is connected to the source of MOSFET power transistor Q2 and the SOURCE terminal of suppression chip U1. The gate of MOSFET power transistor Q2 is connected to one end of resistor R6, and the other end of resistor R6 is connected to the DGATE terminal of suppression chip U1. The drain of MOSFET power transistor Q2 is connected to the OUT terminal of suppression chip U1, one end of resistor R7 in the first output sampling unit, one end of resistor R9 in the BOOST boost circuit, and the SENSE+ terminal of boost chip U2. One end of capacitor C1 in the high-voltage surge suppression circuit is connected to the suppression... The TMR terminal of chip U1 is connected, and the other end of capacitor C1 is grounded to the GND terminal of the suppression chip U1 and one end of the first output sampling unit resistor R8; the other end of the first output sampling unit resistor R7 is connected to the FB terminal of the suppression chip U1 and the other end of resistor R8; the other end of the BOOST boost circuit resistor R9 is connected to the SENSE- terminal of boost chip U2 and one end of inductor L1, and the other end of inductor L1 is connected to the drain of MOSFET power transistor Q3 and the source of MOSFET power transistor Q4, respectively. The gate of MOSFET power transistor Q3 is connected to the DG terminal of boost chip U2, and the source of MOSFET power transistor Q3 is grounded. The gate of power transistor Q4 is connected to the TG terminal of boost chip U2. The drain of MOSFET power transistor Q4 is connected to the power output terminal and one end of resistor R10 of the second output sampling unit. The ITH terminal of boost chip U2 is connected to one end of resistor R12 and one end of capacitor C3. The other end of resistor R12 is connected to one end of capacitor C4. The other ends of capacitors C3 and C4 are grounded. The SS terminal of boost chip U2 is connected to one end of capacitor C2. The other end of capacitor C2 and the GND terminal of boost chip U2 are grounded. The other end of resistor R10 of the second output sampling unit is connected to the FB terminal of boost chip U2 and one end of resistor R14. The other end of resistor R14 is grounded.
[0013] The working principle of this surge protection circuit is as follows: The output sampling unit samples the output voltage and sends it to the high-voltage surge suppression circuit and the error amplification unit inside the BOOST boost circuit to control their respective output voltages. The power supply regulator generates a stable voltage as the supply voltage for the high-voltage surge suppression circuit. The high-voltage surge suppression circuit suppresses excessively large input surge voltages, keeping them within a safe range when they are too large. The BOOST boost circuit controls the output voltage of the high-voltage surge suppression circuit, boosting it to the required voltage when the voltage is too small. When the output voltage of the high-voltage surge suppression circuit is within the set safe range, the BOOST boost circuit does not activate its boost function. The input voltage sampling unit samples the input voltage and sends it to the high-voltage surge suppression circuit to control the range of surge voltages it can suppress.
[0014] The high-voltage surge suppression circuit and the BOOST boost circuit are the core circuit units of the surge protection circuit. When the surge voltage is too small, the HGATE and DGATE terminals of the high-voltage surge suppression circuit maintain a high level, thereby keeping MOSFET power transistors Q1 and Q2 in the conducting state. At this time, the BOOST boost circuit plays a boosting role. When the surge voltage is too large, the high-voltage surge suppression circuit clamps the voltage at the set voltage, and the MOSFET power transistor Q4 controlled by the BOOST boost circuit is always in the conducting state. When the surge voltage is within the safe range, the MOSFET power transistors Q1, Q2, and Q4 controlled by the high-voltage surge suppression circuit and the BOOST boost circuit are all always in the conducting state. The TMR port of the suppression chip U1 in the high voltage surge suppression circuit is the fault timing period port, which is connected to ground through an external capacitor C1 to control the duration of operation of chip U1 during overvoltage surges. The ITH port of the BOOST boost circuit is the loop adjustment terminal, which controls the stable operation of boost chip U2 through an external resistor R12, capacitor C4 and capacitor C3. SS is the soft start port, which is connected to ground through an external capacitor C2 to control the turn-on speed of suppression chip U2.
[0015] Through the above technical solutions, this surge protection circuit structure controls the surge voltage generated at the input terminal, preventing abnormal operation or damage of the switching power supply, improving circuit safety and adaptability, and providing a guarantee for the safety of the load system.
[0016] The embodiments described above are merely preferred embodiments of the present utility model and are not intended to limit the scope of the present utility model. Various modifications and improvements made to the technical solutions of the present utility model by those skilled in the art without departing from the spirit of the present utility model should fall within the protection scope defined by the claims of the present utility model.
Claims
1. A surge protection circuit, characterized in that: The system includes a power input terminal, an input voltage sampling unit, a power supply regulation unit, a high-voltage surge suppression circuit, a first output sampling unit, a BOOST boost circuit, a second output sampling unit, and a power output terminal. The power input terminal is connected to the input voltage sampling unit, the power supply regulation unit, and the high-voltage surge suppression circuit. The output terminal of the input voltage sampling unit is connected to the high-voltage surge suppression circuit. The output terminal of the power supply regulation unit is also connected to the high-voltage surge suppression circuit. The output terminal of the high-voltage surge suppression circuit is connected to both the first output sampling unit and the input terminal of the BOOST boost circuit. The output terminal of the BOOST boost circuit is connected to both the second output sampling unit and the power output terminal. The input voltage sampling unit samples the input voltage and sends the sampling result to the high-voltage surge suppression circuit for monitoring and judging the input voltage. The voltage is within a safe range; the power supply regulator unit regulates the input voltage, providing a stable voltage to the high-voltage surge suppression circuit while limiting current to protect downstream circuits; the high-voltage surge suppression circuit monitors the input voltage and controls surge voltage, suppressing high-voltage surges by adjusting internal switching devices to protect downstream circuits from surge voltage effects; the first output sampling unit samples and divides the output voltage of the high-voltage surge suppression circuit, providing feedback signals to help adjust and stabilize the output voltage; the BOOST boost circuit raises the input voltage to the set output voltage level, ensuring stable output voltage suitable for load requirements; the second output sampling unit samples and divides the output voltage of the BOOST boost circuit, providing feedback signals to help adjust and stabilize the output voltage.
2. The surge protection circuit according to claim 1, characterized in that: The voltage sampling unit includes resistors R1, R2, and R3; the power supply regulation unit includes resistor R4 and diode D1; the high-voltage surge suppression circuit includes suppression chip U1, MOSFET power transistors Q1 and Q2, resistors R5 and R6, and capacitor C1; the first output sampling unit includes resistors R7 and R8; the BOOST boost circuit includes boost chip U2, resistors R9 and R12, inductor L1, MOSFET power transistors Q3 and Q4, capacitors C2, C3, and C4; the second output sampling unit includes resistors R10 and R11. The high-voltage surge suppression circuit suppression chip U1 is model LT4364, and the BOOST boost circuit boost chip U2 is model LTC3786.
3. The surge protection circuit according to claim 2, characterized in that: The surge protection circuit is specifically designed as follows: the power input terminal is connected to one end of the input voltage sampling unit resistor R1, one end of the power supply regulating unit resistor R4, and the drain of the high-voltage surge suppression circuit MOSFET power transistor Q1. The other end of the input voltage sampling unit resistor R1 is connected to one end of resistor R2 and the UV terminal of the suppression chip U1. The other end of resistor R2 is connected to one end of resistor R3 and the 0V terminal of the suppression chip U1. The other end of resistor R3 is grounded. The other end of the power supply regulating unit resistor R4 is connected to the cathode of diode D1 and the Vcc terminal of the suppression chip U1. The anode of diode D1 is grounded. The gate of the high-voltage surge suppression circuit MOSFET power transistor Q1 is connected to the voltage input terminal of resistor R1. The source of MOSFET power transistor Q1 is connected to the source of MOSFET power transistor Q2 and the source of suppression chip U1. The gate of MOSFET power transistor Q2 is connected to one end of resistor R6, and the other end of resistor R6 is connected to the DGATE terminal of suppression chip U1. The drain of MOSFET power transistor Q2 is connected to the OUT terminal of suppression chip U1, one end of resistor R7 of the first output sampling unit, one end of resistor R9 of the BOOST boost circuit, and the SENSE+ terminal of boost chip U2. One end of capacitor C1 in the high voltage surge suppression circuit is connected to the source of MOSFET power transistor Q2 and the source of suppression chip U1. The TMR terminal of U1 is connected, and the other end of capacitor C1 is connected to the GND terminal of the suppression chip U1 and one end of the resistor R8 of the first output sampling unit, and grounded; the other end of the resistor R7 of the first output sampling unit is connected to the FB terminal of the suppression chip U1 and the other end of resistor R8; the other end of the resistor R9 of the BOOST boost circuit is connected to the SENSE- terminal of the boost chip U2 and one end of inductor L1, and the other end of inductor L1 is connected to the drain of MOSFET power transistor Q3 and the source of MOSFET power transistor Q4, the gate of MOSFET power transistor Q3 is connected to the DG terminal of the boost chip U2, and the source of MOSFET power transistor Q3 is grounded. The gate of the MOSFET power transistor Q4 is connected to the TG terminal of the boost chip U2. The drain of the MOSFET power transistor Q4 is connected to the power output terminal and one end of the resistor R10 of the second output sampling unit. The ITH terminal of the boost chip U2 is connected to one end of the resistor R12 and one end of the capacitor C3. The other end of the resistor R12 is connected to one end of the capacitor C4. The other ends of the capacitors C3 and C4 are grounded. The SS terminal of the boost chip U2 is connected to one end of the capacitor C2. The other end of the capacitor C2 and the GND terminal of the boost chip U2 are grounded. The other end of the resistor R10 of the second output sampling unit is connected to the FB terminal of the boost chip U2 and one end of the resistor R14. The other end of the resistor R14 is grounded.