Thin medium type through hole mechanism of printed circuit board

Abstract

The utility model discloses a thin medium type through hole mechanism of a printed circuit board, and relates to the technical field of circuit boards. The circuit board structure comprises a plurality of thin dielectric layers which are longitudinally distributed and have the thickness of 50 microns, stepped through holes which are formed in the thin dielectric layers, glass fiber layers which are annularly embedded into the inner walls of the through holes, and graphene composite strips which are positioned on the inner walls of the through holes; and; and the reinforcing structure comprises a mounting hole formed in the thin dielectric layer and a copper column inserted into the mounting hole in a penetrating manner. According to the utility model, the circuit board structure is arranged to solve the problem that the service life of the circuit board is affected because the stress around the through hole is concentrated and the through hole of the thin dielectric layer is easy to crack.

Description

Technical Field

[0001] This utility model relates to the field of circuit board technology, and in particular to a thin dielectric through-hole mechanism for printed circuit boards. Background Technology

[0002] A circuit board, or printed circuit board, is primarily used to connect various electronic components. Multilayer circuit boards are made by laminating multiple etched single-sided or double-sided boards. Internal thin dielectric vias in multilayer circuit boards are a crucial component of High-Density Interconnect (HDI) technology. Vias are commonly used to connect two or more adjacent layers and are very common in multilayer HDI PCBs. They allow for higher-density wiring in a smaller area, supporting smaller designs. Due to the small diameter of the vias, inductance and capacitance effects are lower, which helps improve the integrity of high-speed signal transmission.

[0003] Chinese patent discloses a thin dielectric through-hole structure for printed circuit boards (authorization announcement number CN219227922U). This patented technology includes a circuit board, an upper copper foil on the upper surface of the circuit board, a lower copper foil on the lower surface of the circuit board, an etched layer on the upper inside of the circuit board, a ground layer in the middle of the inside of the circuit board, and a signal layer on the lower inside of the circuit board. Through holes are connected to the left side of the circuit board, the etched layer, the ground layer, and the signal layer. By changing the through-hole structure, the filling ability of electroplated small-diameter through holes can be greatly improved, and the plating phenomenon caused by the hole covering the through hole can be effectively avoided. Through the through-hole, buried hole, and blind hole structures on the circuit board, the plating phenomenon in the through hole can be effectively avoided.

[0004] This patented technology avoids the phenomenon of encapsulation during use, but there are still shortcomings in the process of use. Stress concentration around the through hole makes it easy to crack at the through hole in the thin dielectric layer, which affects the service life of the circuit board. Therefore, those skilled in the art have provided a thin dielectric through hole mechanism for printed circuit boards to solve the problems mentioned in the background art. Utility Model Content

[0005] 1. Technical Solution

[0006] To solve the above-mentioned technical problems, this utility model is achieved through the following technical solution:

[0007] This utility model relates to a thin dielectric through-hole mechanism for printed circuit boards, comprising,

[0008] The circuit board structure includes multiple longitudinally distributed thin dielectric layers with a thickness of 50μm, stepped through holes opened inside the thin dielectric layers, a glass fiber layer embedded in the inner wall of the through holes in an annular shape, and a graphene composite strip located on the inner wall of the through holes.

[0009] as well as;

[0010] The structure is reinforced by mounting holes drilled inside the thin dielectric layer and copper pillars inserted through the mounting holes.

[0011] Furthermore, the surface of the thin dielectric layer is coated with a fluorinated polymer;

[0012] Specifically, the fluoropolymer coating is hydrophobic and chemically resistant, preventing the dielectric layer from delaminating due to humid and hot environments.

[0013] Furthermore, the diameter of the through hole is designed in a 1:1.2 ratio with the width of the adjacent signal line, and auxiliary conductive pillars are set next to the key signal through holes;

[0014] Specifically, impedance matching is optimized to reduce signal reflection; auxiliary conductive pillars provide redundant conductive paths to improve reliability.

[0015] Furthermore, the inner wall of the through hole is pre-plated with a chemical nickel layer, the thickness of which is 0.1-0.5 μm;

[0016] Specifically, the electroless nickel layer serves as a seed layer, improving the adhesion of subsequent copper electroplating and reducing the plating void rate.

[0017] Furthermore, a flexible polytetrafluoroethylene layer is inserted inside the thin dielectric layer;

[0018] Specifically, the PTFE flexible layer absorbs thermal expansion stress and alleviates deformation caused by the difference in thermal expansion coefficients between different materials.

[0019] Furthermore, the upper end of the thin dielectric layer is provided with a mating hole located on the outer wall of the through hole, and the lower end of the thin dielectric layer is provided with a mating block located on the outer wall of the through hole;

[0020] Specifically, the mating block aligns with the mating hole to achieve precise alignment of the multilayer board, reduce lamination offset, and improve manufacturing yield.

[0021] 2. Beneficial effects

[0022] Compared with existing technologies, the advantages of this utility model are:

[0023] This invention utilizes a stepped via to disperse stress through multiple steps, combined with the ring constraint of a glass fiber layer, to prevent cracking caused by stress concentration. The combination of the stepped via and the glass fiber layer increases the tensile strength around the via and reduces the risk of cracking in the thin dielectric layer. The graphene composite strip has excellent thermal conductivity, which reduces the temperature rise in the via area, further reducing the risk of cracking at the via in the thin dielectric layer and improving the service life of the circuit board.

[0024] Of course, any product implementing this utility model does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description

[0025] To more clearly illustrate the technical solutions of the embodiments of this utility model, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0026] Figure 1 This is a front-view three-dimensional structural diagram of the present invention;

[0027] Figure 2 This is a schematic diagram of the main sectional three-dimensional structure of this utility model;

[0028] Figure 3 This is a three-dimensional structural schematic diagram of the through hole of this utility model from a first angle, shown in a partial main cross-section.

[0029] Figure 4 This is a partial main cross-sectional view of the through hole of this utility model from a second angle, showing its three-dimensional structure.

[0030] The attached diagram lists the components represented by each number as follows:

[0031] 100. Circuit board structure; 101. Thin dielectric layer; 102. Through-hole; 103. Glass fiber layer; 104. Graphene composite strip;

[0032] 200. Reinforcing structure; 201. Copper pillar; 202. Flexible polytetrafluoroethylene layer; 203. Mounting hole; 204. Butt joint block; 205. Butt joint hole; 206. Fluorinated polymer. Detailed Implementation

[0033] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the specific embodiments of this utility model will be described in detail below with reference to the accompanying drawings.

[0034] Many specific details are set forth in the following description in order to provide a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0035] Secondly, this utility model is described in detail with reference to the schematic diagrams. When describing the embodiments of this utility model, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this utility model. In addition, actual manufacturing should include the three-dimensional spatial dimensions of length, width, and depth.

[0036] To make the objectives, technical solutions, and advantages of this utility model clearer, the embodiments of this utility model will be described in further detail below with reference to the accompanying drawings.

[0037] Example 1

[0038] Please see Figures 1-4 As shown, this embodiment is a thin dielectric through-hole mechanism for a printed circuit board, including,

[0039] The circuit board structure 100 includes multiple longitudinally distributed thin dielectric layers 101 with a thickness of 50μm, stepped through holes 102 opened inside the thin dielectric layers 101, a glass fiber layer 103 embedded in the inner wall of the through holes 102 in an annular shape, and a graphene composite strip 104 located on the inner wall of the through holes 102.

[0040] as well as;

[0041] The reinforcing structure 200 includes a mounting hole 203 opened inside the thin dielectric layer 101 and a copper pillar 201 inserted through the mounting hole 203;

[0042] The surface of the thin dielectric layer 101 is coated with fluorinated polymer 206;

[0043] The diameter of the through hole 102 is designed to be in a 1:1.2 ratio with the width of the adjacent signal line, and an auxiliary conductive post is set next to the critical signal through hole 102;

[0044] The inner wall of through-hole 102 is pre-plated with a chemical nickel layer with a thickness of 0.1-0.5μm;

[0045] A flexible polytetrafluoroethylene layer 202 is inserted inside the thin dielectric layer 101;

[0046] The thin dielectric layer 101 has a mating hole 205 located on the outer wall of the through hole 102 at its upper end, and a mating block 204 located on the outer wall of the through hole 102 at its lower end.

[0047] The circuit board structure 100 and the reinforcing structure 200 are used;

[0048] The thin dielectric layer 101 is prepared using a 50 μm thick modified polyimide film coated with a 1 μm thick fluorinated polymer 206. The through-holes 102 are fabricated using a UV laser to create stepped through-holes 102 on the thin dielectric layer 101, with a diameter of 80 μm and a step width of 10 μm. A 0.3 μm electroless nickel layer is pre-plated on the inner wall of the through-holes 102. A 5 μm wide glass fiber layer 103 is annularly embedded in the inner wall of the through-holes 102. Graphene composite strips 104, with a graphene content of 15%, are then stacked, and a flexible polytetrafluoroethylene layer 202 is inserted. After being hot-pressed through the copper pillar 201 with a diameter of 100μm, the stepped through-hole 102 disperses stress through multiple steps. Combined with the ring constraint of the glass fiber layer 103, it avoids cracking caused by stress concentration. The graphene composite strip 104 in the through-hole 102 provides a low-resistance conductive path and conducts heat to the copper pillar 201 through high thermal conductivity, and finally diffuses to the external heat dissipation layer. The fluorinated polymer 206 coating isolates water vapor, and the polytetrafluoroethylene flexible layer 202 absorbs thermal stress. The two work together to ensure the stability of the thin dielectric layer 101 in extreme environments.

[0049] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0050] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A thin dielectric through-hole mechanism for a printed circuit board, characterized in that: include, The circuit board structure (100) includes multiple longitudinally distributed thin dielectric layers (101) with a thickness of 50 μm, through holes (102) in a stepped shape opened inside the thin dielectric layers (101), a glass fiber layer (103) embedded in the inner wall of the through holes (102) in an annular shape, and a graphene composite strip (104) located on the inner wall of the through holes (102). as well as; The reinforcing structure (200) includes a mounting hole (203) opened inside the thin dielectric layer (101) and a copper pillar (201) inserted through the mounting hole (203).

2. The thin dielectric through-hole mechanism for printed circuit boards according to claim 1, characterized in that: The surface of the thin dielectric layer (101) is coated with a fluorinated polymer (206).

3. The thin dielectric through-hole mechanism for printed circuit boards according to claim 1, characterized in that: The diameter of the through hole (102) is designed in a ratio of 1:1.2 to the width of the adjacent signal line, and an auxiliary conductive post is set next to the key signal through hole (102).

4. The thin dielectric through-hole mechanism for printed circuit boards according to claim 1, characterized in that: The inner wall of the through hole (102) is pre-plated with a chemical nickel layer, the thickness of which is 0.1-0.5 μm.

5. A thin dielectric through-hole mechanism for printed circuit boards according to claim 1, characterized in that: A flexible polytetrafluoroethylene layer (202) is inserted inside the thin dielectric layer (101).

6. The thin dielectric through-hole mechanism for printed circuit boards according to claim 1, characterized in that: The thin dielectric layer (101) has a mating hole (205) located on the outer wall of the through hole (102) at its upper end, and a mating block (204) located on the outer wall of the through hole (102) at its lower end.

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