Charge pump circuit with multi-proportion output
By controlling the switch state and capacitor ratio, multiple proportional outputs of the charge pump circuit can be achieved, solving the problem that the output voltage of the charge pump architecture in the prior art is difficult to adjust. This enables flexible adjustment of the voltage ratio and meets diverse design requirements.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-04
- Publication Date
- 2026-03-24
AI Technical Summary
Existing charge pump architectures are not flexible enough to proportionally boost or buck the output voltage, failing to meet diverse design requirements.
By controlling the on/off states of multiple switches and adjusting the capacitance ratio, the charge pump circuit can achieve multiple proportional outputs, including a first capacitor, an output capacitor, and additional capacitors. The clock signal is used to control the on and off states of the switches, enabling flexible adjustment of the voltage ratio.
It realizes multiple proportional outputs of the charge pump circuit, and can flexibly adjust the voltage boost or buck according to the required voltage to meet diverse design needs.
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Figure CN224037264U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to charge pump circuit technical field, especially a charge pump circuit with multiple proportional output. BACKGROUND
[0002] Due to the rapid development of battery charging and discharging technology and integrated circuit, the market increasingly pursues more efficient charging and discharging mode, and at present, the charge pump architecture is used in the high-power charging of many electronic devices. The existing charge pump architecture is difficult to flexibly adjust the proportional boost or buck of the output voltage, and when the required voltage of the designed circuit is very diverse, the output voltage of the circuit cannot be adjusted in multiple proportions according to the use demand voltage. SUMMARY
[0003] The utility model discloses a purpose in at least solve one of the technical problems existing in prior art, provide a kind of charge pump circuit that realizes charge pump multiple proportional boost and buck with single circuit.
[0004] According to the charge pump circuit with multiple proportional output of the utility model embodiment, it includes: first voltage, second voltage, first capacitor C1, output capacitor Cout, first switch M1, second switch M2, third switch M3, fourth switch M4 and fifth switch M5, one end of first switch M1 inputs / outputs first voltage, the other end of first switch M1 is electrically connected with one end of first capacitor C1, the other end of first capacitor C1 is electrically connected with one end of second switch M2 and one end of third switch M3 respectively, the other end of third switch M3, one end of fifth switch M5 and one end of output capacitor Cout are mutually electrically connected and output / input second voltage, the other end of fifth switch M5 is electrically connected with one end of fourth switch M4, the other end of fourth switch M4 is electrically connected between first switch M1 and first capacitor C1, the other end of second switch M2 and the other end of output capacitor Cout are grounded respectively.
[0005] According to some embodiments of the utility model, when first switch M1 and third switch M3 are turned on / off, second switch M2, fourth switch M4 and fifth switch M5 are turned off / on.
[0006] According to some embodiments of the utility model, the capacitance value of first capacitor C1 is equal to the capacitance value of output capacitor Cout.
[0007] According to some embodiments of this utility model, it further includes: a second capacitor C2, a sixth switch M6 and a seventh switch M7. One end of the second capacitor C2 is electrically connected between the fourth switch M4 and the fifth switch M5. The other end of the second capacitor C2 is electrically connected to one end of the sixth switch M6 and one end of the seventh switch M7, respectively. The other end of the sixth switch M6 is grounded. The other end of the seventh switch M7 is electrically connected to one end of the output capacitor Cout and outputs / inputs a second voltage.
[0008] According to some embodiments of this utility model, when the first switch M1, the third switch M3, the fifth switch M5, and the sixth switch M6 are turned on / off, the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off / on.
[0009] According to some embodiments of this utility model, the capacitance values of the first capacitor C1, the second capacitor C2, and the output capacitor Cout are all equal.
[0010] According to some embodiments of this utility model, the first switch M1, the fourth switch M4, and the fifth switch M5 are turned on, while the other switches remain off.
[0011] The charge pump circuit with multiple proportional outputs according to embodiments of the present invention has at least the following beneficial effects: First, by controlling the on / off states of multiple switches, the connection relationship between the first capacitor C1 and the output capacitor Cout can be adjusted, thereby adjusting the proportional relationship between the first voltage and the second voltage to obtain multiple proportional outputs; second, when the capacitance value of the first capacitor C1 and the capacitance value of the output capacitor Cout change, the ratio between the first voltage and the second voltage also changes accordingly; and the first voltage can be used as the input / output voltage, and the corresponding second voltage as the output / input voltage, facilitating flexible proportional boost or buck adjustment of the output voltage. When the circuit design requires a large number of voltages, the output voltage of the circuit can be adjusted in multiple proportions according to the required voltage by controlling the on / off states of five switches and / or adjusting the capacitance ratio of the first capacitor C1 and the output capacitor Cout.
[0012] Additional aspects and advantages of this invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0013] The specific embodiments of this utility model will be further described below with reference to the accompanying drawings;
[0014] Figure 1 This is a circuit schematic diagram of one embodiment;
[0015] Figure 2 yes Figure 1Circuit simplified diagram when M1 / M3 is on and M2 / M4 / M5 is off;
[0016] Figure 3 Circuit simplified diagram when M2 / M4 / M5 is on and M1 / M3 is off; Figure 1 Circuit simplified diagram when M2 / M4 / M5 is on and M1 / M3 is off;
[0017] Figure 4 Circuit simplified diagram when M1 / M3 is on and M2 / M4 / M5 is off;
[0018] Figure 5 Circuit simplified diagram when M1 / M3 is on and M2 / M4 / M5 is off; Figure 4 Circuit simplified diagram when M1 / M3 is on and M2 / M4 / M5 is off;
[0019] Figure 6 Circuit simplified diagram when M1 / M3 is on and M2 / M4 / M5 is off; Figure 4 Circuit simplified diagram when M1 / M3 is on and M2 / M4 / M5 is off;
[0020] Figure 7 Circuit simplified diagram when M1 / M3 is on and M2 / M4 / M5 is off;
[0021] Figure 8 Circuit simplified diagram when M1 / M3 is on and M2 / M4 / M5 is off; Figure 7 Circuit simplified diagram when M2 / M4 / M7 is on and M1 / M3 / M5 / M6 is off;
[0022] Figure 9 Circuit simplified diagram when M2 / M4 / M7 is on and M1 / M3 / M5 / M6 is off; Figure 7 Circuit simplified diagram when M2 / M4 / M7 is on and M1 / M3 / M5 / M6 is off;
[0023] Figure 10 Circuit simplified diagram when M2 / M4 / M7 is on and M1 / M3 / M5 / M6 is off;
[0024] Figure 11 Circuit simplified diagram when M2 / M4 / M7 is on and M1 / M3 / M5 / M6 is off;
[0025] Figure 12 Circuit simplified diagram when M2 / M4 / M7 is on and M1 / M3 / M5 / M6 is off. DETAILED DESCRIPTION
[0026] This part will describe the specific embodiments of the present application in detail, the preferred embodiments of the present application are shown in the drawings, the role of the drawings is to supplement the description of the text part with graphics, so that people can intuitively and visually understand each technical feature and the overall technical scheme of the present application, but it cannot be understood as a limitation on the protection scope of the present application.
[0027] In the description of the utility model, it needs to be understood that, if the direction description, such as up, down, front, back, left, right and other directions or positional relationship shown in the drawing is based on the direction or positional relationship, only for the convenience of describing the utility model and simplifying the description, and therefore cannot be understood as the limitation of the utility model.
[0028] In the description of the utility model, the meaning of several is one or more, the meaning of multiple is more than two, greater than, less than, more than and the like are not included in the number, above, below, within and the like are included in the number.If the first, second are described, it is only for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the sequence of indicated technical features.
[0029] Referring to Figures 1 to 12 , the utility model embodiment provides a charge pump circuit with multiple proportional outputs, as shown in the first embodiment Figure 1 , comprising: first voltage, second voltage, first capacitor C1, output capacitor Cout, first switch M1, second switch M2, third switch M3, fourth switch M4 and fifth switch M5, one end of first switch M1 input / output first voltage, the other end of first switch M1 and one end of first capacitor C1 are electrically connected, the other end of first capacitor C1 is electrically connected with one end of second switch M2 and one end of third switch M3 respectively, the other end of third switch M3, one end of fifth switch M5 and one end of output capacitor Cout are mutually electrically connected and output / input second voltage, the other end of fifth switch M5 and one end of fourth switch M4 are electrically connected, the other end of fourth switch M4 is electrically connected between first switch M1 and first capacitor C1, the other end of second switch M2 and the other end of output capacitor Cout are grounded respectively.Through clock signal control first switch M1, third switch M3 turn on / off, second switch M2, fourth switch M4, fifth switch M5 are off / on.
[0030] As Figure 1 , the first voltage is input voltage VI, and the second voltage is output voltage V0, Figure 2 , when M1 / M3 is turned on, M2 / M4 / M5 is turned off, the circuit simplification diagram, input voltage VI charges first capacitor C1 and output capacitor Cout, when the capacitance of first capacitor C1 and output capacitor Cout is equal, the voltage Vc1 between the two ends of first capacitor C1 Vcout=1 / 2 VI, VO= Vcout=1 / 2 VI, thereby realizing 2:1 voltage reduction; Figure 3As shown in FIG. 1, the first voltage is the output voltage VO, and the second voltage is the input voltage VI. When the first switch M1, the third switch M3, and the fifth switch M5 are turned on, and the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off, the first voltage = the second voltage.
[0031] As shown in FIG. 2, the first voltage is the output voltage VO, and the second voltage is the input voltage VI. When the first switch M1, the third switch M3, and the fifth switch M5 are turned on, and the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off, the first voltage = the second voltage. Figure 4 As shown in FIG. 3, the first voltage is the output voltage VO, and the second voltage is the input voltage VI. When the first switch M1, the third switch M3, and the fifth switch M5 are turned on, and the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off, the first voltage = the second voltage. Figure 5 As shown in FIG. 4, the first voltage is the output voltage VO, and the second voltage is the input voltage VI. When the first switch M1, the third switch M3, and the fifth switch M5 are turned on, and the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off, the first voltage = the second voltage. Figure 6 As shown in FIG. 5, the first voltage is the output voltage VO, and the second voltage is the input voltage VI. When the first switch M1, the third switch M3, and the fifth switch M5 are turned on, and the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off, the first voltage = the second voltage.
[0032] When the clock signal controls the first switch M1, the fourth switch M4, and the fifth switch M5 to be turned on, and the other switches to be turned off, the first voltage = the second voltage.
[0033] As shown in FIG. 6, the second embodiment further includes a second capacitor C2, a sixth switch M6, and a seventh switch M7. One end of the second capacitor C2 is electrically connected between the fourth switch M4 and the fifth switch M5, and the other end of the second capacitor C2 is electrically connected to one end of the sixth switch M6 and one end of the seventh switch M7, respectively. The other end of the sixth switch M6 is grounded, and the other end of the seventh switch M7 is electrically connected to one end of the output capacitor Cout and outputs / inputs the second voltage. When the clock signal controls the first switch M1, the third switch M3, the fifth switch M5, and the sixth switch M6 to be turned on / off, the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off / on. Figure 7 As shown in FIG. 7, the first voltage is the output voltage VO, and the second voltage is the input voltage VI. When the first switch M1, the third switch M3, the fifth switch M5, and the sixth switch M6 are turned on, and the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off, the first voltage = the second voltage. Figure 8 As shown in FIG. 8, the first voltage is the output voltage VO, and the second voltage is the input voltage VI. When the first switch M1, the third switch M3, the fifth switch M5, and the sixth switch M6 are turned on, and the second switch M2, the fourth switch M4, and the seventh switch M7 are turned off, the first voltage = the second voltage.Figure 9 The circuit simplification diagram when M2 / M4 / M7 is turned on and M1 / M3 / M5 / M6 is turned off, the first capacitor C1 charges the second capacitor C2 and the output capacitor Cout, when the capacitance of the first capacitor C1, the capacitance of the second capacitor C2 and the capacitance of the output capacitor Cout are equal respectively, Vc1 = Vc2 + Vcout = 2 / 3 VI, Vc2 = Vcout, then VO = Vcout = 1 / 3 VI, realizing 1:3 voltage reduction. When the capacitance of the first capacitor C1, the capacitance of the second capacitor C2 and the capacitance of the output capacitor Cout are not equal, different proportional voltage reduction can be realized.
[0034] As shown in Figure 10 , when the first voltage is the input voltage VI and the second voltage is the output voltage VO, the first switch M1 and the third switch M3 are turned on / off by the clock signal, the second switch M2, the fourth switch M4 and the fifth switch M5 are turned off / turned on, and the sixth switch M6 and the seventh switch M7 are always turned off (the dashed line in Figure 10 represents the off state). Figure 2 The circuit simplification diagram when M1 / M3 is turned on and M2 / M4 / M5 is turned off, the input voltage VI charges the first capacitor C1 and the output capacitor Cout, when the capacitance of the first capacitor C1 and the capacitance of the output capacitor Cout are equal, the voltage Vc1 between the two ends of the first capacitor C1 is equal to the voltage Vcout between the two ends of the output capacitor Cout, that is, Vc1 = Vcout = 1 / 2 VI, VO = Vcout = 1 / 2 VI, thereby realizing 2:1 voltage reduction. Figure 3 The circuit simplification diagram when M2 / M4 / M5 is turned on and M1 / M3 is turned off, the first capacitor C1 charges the output capacitor Cout, when the capacitance of the first capacitor C1 and the capacitance of the output capacitor Cout are equal, VO = Vc1 = Vcout = 1 / 2 VI, realizing 2:1 voltage reduction. When the capacitance ratio of the first capacitor C1 and the output capacitor Cout changes, the ratio between the first voltage and the second voltage also changes, thereby realizing output adjustment of multiple ratios.
[0035] As shown in Figure 11 , when the first voltage is the output voltage VO and the second voltage is the input voltage VI, the first switch M1 and the third switch M3 are turned on / off by the clock signal, the second switch M2, the fourth switch M4 and the fifth switch M5 are turned off / turned on, and the sixth switch M6 and the seventh switch M7 are always turned off (the dashed line of the switch in Figure 11 represents the off state), Figure 5 The circuit simplification diagram when M2 / M4 / M5 is turned on and M1 / M3 is turned off, VI charges the first capacitor C1, VI = Vc1; Figure 6For M1 / M3 conduction, M2 / M4 / M5 is disconnected, the circuit simplification diagram, VO=Vc1+VI, when the first capacitor C1 and the output capacitor Cout The value is equal, then VO=2VI, realize 1:2 boost. When the value of the first capacitor C1 and the value of the output capacitor Cout change, the ratio between the first voltage and the second voltage also changes, thereby realizing the output regulation of multiple ratios.
[0036] As Figure 12 When the clock signal controls the first switch M1, the fourth switch M4, the fifth switch M5 to be turned on, and the other switches remain disconnected, the first voltage=the second voltage.
[0037] That is, by controlling the on-off state of the plurality of switches, the connection relationship between the first capacitor C1, the second capacitor C2 and the output capacitor Cout can be adjusted, thereby adjusting the proportional relationship between the first voltage and the second voltage, and obtaining multiple proportional outputs; secondly, when the value of the first capacitor C1, the value of the second capacitor C2 and the value of the output capacitor Cout change, the ratio between the first voltage and the second voltage also changes; and the first voltage can be used as an input / output voltage, and the corresponding second voltage can be used as an output / input voltage, so that the output voltage can be flexibly adjusted in proportion to the boost or buck. When the required voltage of the designed circuit is relatively large, the output voltage of the circuit can be adjusted in multiple proportions by controlling the on-off state of the plurality of switches and / or adjusting the value ratio of the first capacitor C1, the second capacitor C2 and the output capacitor Cout.
[0038] Those skilled in the art will readily understand that the above preferred modes can be freely combined and superimposed without conflict.
[0039] The above is only the preferred embodiment of the present application, and does not limit the patent range of the present application, and any equivalent structural transformation made by the present application specification and drawings, or directly or indirectly applied in other related technical fields under the utility model concept of the present application are included in the patent protection range of the present application.
Claims
1. A charge pump circuit with multiple proportional outputs, characterized in that, include: The system includes a first voltage, a second voltage, a first capacitor C1, an output capacitor Cout, a first switch M1, a second switch M2, a third switch M3, a fourth switch M4, and a fifth switch M5. One end of the first switch M1 is used to input / output the first voltage, and the other end of the first switch M1 is electrically connected to one end of the first capacitor C1. The other end of the first capacitor C1 is electrically connected to one end of the second switch M2 and one end of the third switch M3. The other end of the third switch M3, one end of the fifth switch M5, and one end of the output capacitor Cout are electrically connected to each other and output / input the second voltage. The other end of the fifth switch M5 is electrically connected to one end of the fourth switch M4. The other end of the fourth switch M4 is electrically connected between the first switch M1 and the first capacitor C1. The other ends of the second switch M2 and the other end of the output capacitor Cout are grounded.
2. The charge pump circuit with multiple ratio outputs according to claim 1, characterized in that: When the first switch M1 and the third switch M3 are on / off, the second switch M2, the fourth switch M4, and the fifth switch M5 are off / on.
3. The charge pump circuit with multiple ratio outputs according to claim 1, characterized in that: The capacitance of the first capacitor C1 is equal to the capacitance of the output capacitor Cout.
4. The charge pump circuit with multiple ratio outputs according to claim 1, characterized in that, Also includes: The second capacitor C2, the sixth switch M6, and the seventh switch M7 are connected together. One end of the second capacitor C2 is electrically connected between the fourth switch M4 and the fifth switch M5. The other end of the second capacitor C2 is electrically connected to one end of the sixth switch M6 and one end of the seventh switch M7, respectively. The other end of the sixth switch M6 is grounded. The other end of the seventh switch M7 is electrically connected to one end of the output capacitor Cout and outputs / inputs the second voltage.
5. The charge pump circuit with multiple ratio outputs according to claim 4, characterized in that: When the first switch M1, the third switch M3, the fifth switch M5, and the sixth switch M6 are on / off, the second switch M2, the fourth switch M4, and the seventh switch M7 are off / on.
6. The charge pump circuit with multiple ratio outputs according to claim 4, characterized in that: The capacitance values of the first capacitor C1, the second capacitor C2, and the output capacitor Cout are all equal.
7. The charge pump circuit with multiple ratio outputs according to claim 1 or 4, characterized in that: The first switch M1, the fourth switch M4, and the fifth switch M5 are turned on, while the other switches remain off.