MOSFET photovoltaic bypass protection module
By using an insulating substrate and conductive layer carrier plate to replace the metal connection wire in the MOSFET photovoltaic bypass protection module, the problems of high cost and low reliability in the prior art are solved, and the effects of simplifying the process, reducing costs and improving reliability are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-25
- Publication Date
- 2026-03-24
AI Technical Summary
Existing MOSFET photovoltaic bypass protection modules are costly and unreliable during production and use. The metal connection wires are prone to breakage, and the insulation adhesive treatment of the control chip and capacitors is complicated, making it difficult to improve yield and reliability.
The carrier board with insulating substrate and conductive layer replaces the metal interconnects. The electrical connection of control chip, capacitor and MOSFET device is realized through the conductive layer on the carrier board, which simplifies the process and reduces the cost. At the same time, through holes are set on the carrier board to improve packaging speed and structural strength.
This simplifies the manufacturing process, reduces costs, improves product reliability and heat dissipation performance, reduces the risk of metal lead breakage, and enhances the overall performance of the MOSFET photovoltaic bypass protection module.
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Figure CN224037329U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to photovoltaic technology field especially, relates to a MOSFET photovoltaic bypass protection module. BACKGROUND
[0002] The photovoltaic bypass protection module is an important component in the photovoltaic module, mainly used to improve the reliability and efficiency of the photovoltaic system. When a certain cell in the photovoltaic cell string causes current mismatch due to shading, damage or performance degradation, the bypass module can provide a low-resistance bypass path for this part of the cell, allowing the current to bypass the faulty cell and continue to flow, thereby reducing the hot spot effect and maintaining the power generation efficiency of the entire photovoltaic module.
[0003] Compared with the traditional photovoltaic bypass protection module, the MOSFET photovoltaic bypass protection module has higher efficiency and stability. It is used in the photovoltaic system, which can realize more efficient power management and protection function. The MOSFET photovoltaic bypass protection module is usually integrated in the junction box of the photovoltaic module, mainly for bypass protection under certain conditions, such as shadow shading, hot spot effect or module failure, to ensure the stability and efficiency of the entire photovoltaic system.
[0004] When a certain part of the photovoltaic cell string cannot work normally due to shading or damage, the impedance of this part of the photovoltaic cell sheet becomes larger, which may cause the output of the entire string to be blocked and the current to be reduced. After detecting this imbalance, the MOSFET photovoltaic bypass protection module provides a relatively lower impedance path for the string current, ensuring that the remaining normal part can continue to generate electricity. And because the MOSFET photovoltaic bypass protection module has a low on-resistance, it can significantly reduce energy loss, reduce the heating of the junction box, and improve the overall conversion efficiency of the photovoltaic system.
[0005] The disclosure of the above background art content is only used to assist in understanding the utility model concept and technical scheme of the utility model, which does not necessarily belong to the prior art of the present application, nor does it necessarily provide technical guidance; in the absence of explicit evidence that the above content has been disclosed before the filing date of the present application, the above background art should not be used to evaluate the novelty and inventiveness of the present application. UTILITY MODEL CONTENT
[0006] The utility model aims at providing a MOSFET photovoltaic bypass protection module, which can greatly reduce the use of metal wire electrical connection between its components during production and packaging, simplify the process, reduce costs and improve product reliability.
[0007] To achieve the above-mentioned purpose, the utility model adopts the following technical scheme:
[0008] A MOSFET photovoltaic bypass protection module comprises a first conductor, a second conductor, a MOSFET device, a control chip, a capacitor and a carrier plate; wherein an insulating gap is arranged between the first conductor and the second conductor, the carrier plate spans the insulating gap and connects the first conductor and the second conductor;
[0009] The carrier plate comprises an insulating substrate and a conductive layer arranged on the insulating substrate, the control chip and the capacitor are arranged on the surface of the carrier plate and are electrically connected through the conductive layer, and the control chip is electrically connected with the first conductor and the second conductor through the conductive layer respectively;
[0010] The MOSFET device is arranged on the first conductor or the second conductor, and the MOSFET device is electrically connected with the control chip, the first conductor and the second conductor respectively.
[0011] Further, any one of the above technical solutions or a combination of multiple technical solutions, the MOSFET device is arranged on the first conductor, one of the source and the drain of the MOSFET device is electrically connected with the first conductor, the other of the source and the drain of the MOSFET device is electrically connected with the second conductor, the gate of the MOSFET device is electrically connected with the control electrode of the control chip through the first metal conductor, and the upper surface of the MOSFET device is electrically connected with the second conductor through the second metal conductor; preferably, one of the drain and the source of the MOSFET device is arranged on the lower surface of the MOSFET device and is electrically connected with the first conductor, the other of the drain and the source of the MOSFET device is arranged on the upper surface of the MOSFET device and is electrically connected with the second conductor through the second metal conductor.
[0012] Further, any one of the above technical solutions or a combination of multiple technical solutions, the lower surface of the carrier plate is provided with an insulating isolated first conductive area and a second conductive area, the first conductive area is electrically connected with the first conductor, and the second conductive area is electrically connected with the second conductor;
[0013] The upper surface of the carrier plate is provided with an insulating isolated third conductive area and a fourth conductive area, a first port of the control chip is electrically connected with the third conductive area, and a second port of the control chip is electrically connected with the fourth conductive area;
[0014] The third conductive area is electrically connected with the first conductive area, and the fourth conductive area is electrically connected with the second conductive area.
[0015] Further, according to any one of the above technical solutions or the combination of the above technical solutions, the upper surface of the carrier plate is further provided with a fifth conductive area, the control electrode of the control chip is electrically connected with the fifth conductive area, and the control electrode of the MOSFET device is electrically connected with the fifth conductive area through the second metal conductor.
[0016] Further, according to any one of the above technical solutions or the combination of the above technical solutions, the carrier plate is a PCB plate, the third conductive area is electrically connected with the first conductive area through a first via, and the fourth conductive area is electrically connected with the second conductive area through a second via.
[0017] Further, according to any one of the above technical solutions or the combination of the above technical solutions, the first conductive area and the second conductive area are conductive layers arranged on the lower surface of the insulating substrate.
[0018] The third conductive area and the fourth conductive area are conductive layers arranged on the upper surface of the insulating substrate.
[0019] Further, according to any one of the above technical solutions or the combination of the above technical solutions, the surface of the carrier plate is provided with a resistor device.
[0020] One end of the resistor device is electrically connected with the first conductive area, and the other end of the resistor device is electrically connected with the second conductive area, or one end of the resistor device is electrically connected with the third conductive area, and the other end of the resistor device is electrically connected with the fourth conductive area.
[0021] Further, according to any one of the above technical solutions or the combination of the above technical solutions, the control chip and the capacitor are arranged on the upper surface of the carrier plate.
[0022] The upper surface of the carrier plate is provided with a sixth conductive area and a seventh conductive area, the third port of the control chip is electrically connected with one end of the capacitor through the sixth conductive area, and the fourth port of the control chip is electrically connected with the other end of the capacitor through the seventh conductive area.
[0023] Further, according to any one of the above technical solutions or the combination of the above technical solutions, the first metal conductor is a metal wire; and / or,
[0024] The second metal conductor is a metal interconnection piece, and a bending part upwardly arched is arranged at the middle part of the metal interconnection piece.
[0025] Further, according to any one of the above technical solutions or the combination of the above technical solutions, at least one through hole is arranged on the carrier plate, and the through hole is configured as a glue leakage hole or a mechanical stress reduction hole.
[0026] Further, according to any one of the above technical solutions or the combination of the above technical solutions, the MOSFET device is an unpackaged MOSFET wafer chip.
[0027] The technical scheme provided by the utility model has the beneficial effects as follows:
[0028] a. The utility model discloses a conductive layer of an insulating substrate is arranged on the carrier plate, the first conductive body and the second conductive body are connected by the carrier plate, and the control chip and the capacitor are arranged on the carrier plate, the electrical connection between the control chip and the conductive body and the MOSFET device is realized through the conductive layer on the carrier plate, which can greatly reduce the electrical connection between the components in the MOSFET photovoltaic bypass protection module through metal wiring, simplify the process, integrate the process, reduce the cost and improve the product reliability.
[0029] b. The control chip and the capacitor are arranged on the carrier plate, and the MOSFET device is arranged on the first conductive body or the second conductive body, and the layout mode of the MOSFET photovoltaic bypass protection module can not only simplify the process, reduce the metal lead, reduce the cost and improve the product reliability, but also has excellent heat dissipation performance.
[0030] c. At least one through hole is arranged on the carrier plate, and when the MOSFET photovoltaic bypass protection module is packaged, the packaging glue leaks from the glue leakage hole, which can improve the packaging speed and the overall structural strength of the product, because the glue passes through the through hole and locks the carrier plate, and can improve the layering. BRIEF DESCRIPTION OF DRAWINGS
[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed in the embodiment or prior art description will be briefly introduced below, and obviously, the drawings in the following description are only some embodiments described in the present application, and those skilled in the art can obtain other drawings according to these drawings without creating any creative labor.
[0032] Figure 1 The utility model provides a MOSFET photovoltaic bypass protection module's three -dimensional schematic diagram for an exemplary embodiment of the utility model;
[0033] Figure 2 The utility model provides a MOSFET photovoltaic bypass protection module's overhead schematic view for an exemplary embodiment of the utility model;
[0034] Figure 3 The utility model provides a MOSFET photovoltaic bypass protection module's front view schematic drawing for an exemplary embodiment of the utility model;
[0035] Figure 4 An exploded view of the control chip, capacitor, and first type of carrier board provided for an exemplary embodiment of the present invention;
[0036] Figure 5 An exploded view of a control chip, a capacitor, and a second type of carrier board provided as an exemplary embodiment of the present invention;
[0037] Figure 6 A bottom view of a carrier plate provided for an exemplary embodiment of the present invention;
[0038] Figure 7 This is a bottom view of a carrier plate with a resistor device disposed on its lower surface, which is an exemplary embodiment of the present invention.
[0039] The reference numerals in the accompanying drawings include: 1-first conductor, 11-first wave structure, 2-second conductor, 21-second wave structure, 3-MOSFET device, 31-gate of MOSFET device, 4-control chip, 5-capacitor, 6-carrier plate, 60-through hole, 61-first conductive region, 62-second conductive region, 63-third conductive region, 64-fourth conductive region, 65-fifth conductive region, 66-sixth conductive region, 67-seventh conductive region, 68-first via, 69-second via, 7-first metal conductor, 8-second metal conductor, 81-bend, 10-resistor device. Detailed Implementation
[0040] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.
[0041] It should be noted that the terms "first", "second", and the like in the description and claims of the utility model and the above drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the utility model described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, device, product or equipment including a series of steps or units does not have to be limited to the clearly listed steps or units, but can include other steps or units not clearly listed or inherent to these processes, methods, products or equipment.
[0042] At present, there are many technical solutions about MOSFET photovoltaic bypass protection module layout, but these technical solutions all uniformly adopt metal connecting lines to connect various components in the MOSFET photovoltaic bypass protection module. There are many reasons for this technical situation, on the one hand, it is true that the metal connecting line has a relatively large advantage in reducing the volume; on the other hand, it may be that the existing gold-plated line connection technology is also relatively mature. Therefore, the technical personnel in the field will default to adopt the metal connecting line to connect the various components in the MOSFET photovoltaic bypass protection module as the preferred scheme, and will not think of other non-metal line connection layout schemes.
[0043] But in fact, the metal connecting line in the MOSFET photovoltaic bypass protection module generally selects gold-plated wire, and 5-6 gold-plated wires are needed to complete a complete MOSFET photovoltaic bypass protection module layout. Secondly, the connection of the control chip and the capacitor, the connection of the control chip and the MOS tube are all connected through gold-plated wires. In addition, in order to improve the solderable wire, gold or silver plating is also needed on the control chip, capacitor and MOS tube, which further increases the cost. Therefore, the existing MOSFET photovoltaic bypass protection module not only has high cost, but also has a relatively high risk of gold-plated wire breakage, which further leads to the difficulty of further improving the yield rate in the production and preparation process and the reliability in the use process of the MOSFET photovoltaic bypass protection module.
[0044] In addition, the existing MOSFET photovoltaic bypass protection module generally adopts the scheme of directly arranging the control chip and the capacitor on the conductive copper plate, i.e. the conductor. This technical scheme needs to brush a layer of insulating glue on the conductor. If the insulating glue is brushed too thin, it may cause the control chip and the capacitor to be electrically connected with the underlying conductive copper plate, forming a short circuit. If the insulating glue is brushed too thick, the control chip and the capacitor may not be on the same plane, which further leads to the increase of the poor rate of wiring.
[0045] Based on the above-mentioned technical problems, the utility model provides a kind of MOSFET photovoltaic bypass protection module, break the inherent thinking of connecting each component in MOSFET photovoltaic bypass protection module using metal connecting line in prior art, provide a new MOSFET photovoltaic bypass protection module layout thinking, can further reduce its production cost, improve its reliability.
[0046] In an embodiment of the utility model, a kind of MOSFET photovoltaic bypass protection module is presented, as shown in Figures 1 to 3 As shown in, it includes first conductor 1, second conductor 2, MOSFET device 3, control chip 4, capacitor 5 and carrier plate 6;Wherein, the first conductor 1 and second conductor 2 between being provided with insulating gap, the carrier plate 6 straddles the insulating gap and connects the first conductor 1 and second conductor 2;
[0047] The carrier plate 6 includes insulating substrate and the conductive layer being arranged on the insulating substrate, the control chip 4 and capacitor 5 are arranged on the carrier plate 6 and are electrically connected by the conductive layer, and the control chip 4 is electrically connected with the first conductor 1, second conductor 2 respectively by the conductive layer;
[0048] The MOSFET device 3 is arranged on the first conductor 1 or second conductor 2, and the MOSFET device 3 is electrically connected with the control chip 4, the first conductor 1 and the second conductor 2 respectively.
[0049] In an embodiment of the utility model, the carrier plate 6 is a PCB board. As shown in Figure 4 And Figure 5 As shown in, the carrier plate 6 includes insulating substrate and the conductive layer being arranged on the insulating substrate, preferably copper foil metal layer.
[0050] In an embodiment of the utility model, the first conductive area 61 and the second conductive area 62 of insulating isolation are provided on the lower surface of the PCB board.In this embodiment, the first conductive area 61 is electrically connected with the first conductor 1, and the second conductive area 62 is electrically connected with the second conductor 2.Preferably, the first conductive area 61 is electrically connected with the first conductor 1 by tinning welding mode, and the second conductive area 62 is electrically connected with the second conductor 2 by tinning welding mode.In other embodiments, the first conductive area 61 can be electrically connected with the first conductor 1 and the second conductive area 62 can be electrically connected with the second conductor 2 by other electrical connection modes such as conductive glue.
[0051] Furthermore, an insulating third conductive region 63, a fourth conductive region 64, a fifth conductive region 65, a sixth conductive region 66, and a seventh conductive region 67 are provided on the upper surface of the PCB board. The control chip 4 and the capacitor 5 are soldered to the PCB board. The control electrode of the control chip 4 is electrically connected to the fifth conductive region 65. The first port of the control chip 4 is soldered and electrically connected to the third conductive region 63. The second port of the control chip 4 is soldered and electrically connected to the fourth conductive region 64. The third port of the control chip 4 is soldered and electrically connected to the sixth conductive region 66. The fourth port of the control chip 4 is soldered and electrically connected to the seventh conductive region 67. The two ends of the capacitor 5 are electrically connected to the sixth conductive region 66 and the seventh conductive region 67, respectively. This allows the third port of the control chip 4 to be electrically connected to one end of the capacitor 5 through the sixth conductive region 66, and the fourth port of the control chip 4 to be electrically connected to the other end of the capacitor 5 through the seventh conductive region 67. The technical solution proposed in this embodiment designs a carrier board including an insulating substrate and a conductive layer. By using the conductive layer disposed on the insulating substrate to replace the metal wire, the metal leads used to connect the control chip 4 and the capacitor 5 in the prior art are eliminated. The insulating substrate replaces the original solution of insulating the control chip, capacitor and conductor by brushing on insulating glue, which simplifies the production process, reduces costs and improves product reliability.
[0052] The electrical connection can be achieved by soldering or by bonding with conductive adhesive. Preferably, both the control chip 4 and the capacitor 5 are mounted on the PCB board using a soldering process.
[0053] In this embodiment, the third conductive region 63 is electrically connected to the first conductive region 61, and the fourth conductive region 64 is electrically connected to the second conductive region 62. More preferably, the third conductive region 63 is electrically connected to the first conductive region 61 through a first via 68, and the fourth conductive region 64 is electrically connected to the second conductive region 62 through a second via 69. The first conductive region 61, the third conductive region 63, and the first via 68 are configured in at least the following ways: Figure 4 and Figure 5 As shown in the diagram.
[0054] exist Figure 4 In the illustrated embodiment, the third conductive region 63 is correspondingly disposed on the target placement area of the control chip 4 on the carrier board 6, and the third conductive region 63 is electrically connected to the lower surface of the insulating substrate through the first via 68. The first conductive region 61 is connected through a conductive layer ( Figure 4The area (D shown in the diagram) or metal connection is electrically connected to the first via 68, and then electrically connected to the third conductive area 63. It should be noted that, for a PCB board, since both ends of the PCB board are connected to the first conductor and the second conductor respectively through the first conductive area 61 and the second conductive area 62, the first conductive area 61 preferably extends from the location of the first via 68 on the lower surface of the PCB board to a metal layer away from the location of the second conductive area 62.
[0055] exist Figure 5 In the illustrated embodiment, the first conductive region 61 is electrically connected to the upper surface of the insulating substrate through the first via 68. The third conductive region 63 is connected through a conductive layer ( Figure 5 The area (D shown in the diagram) or metal connection is electrically connected to the first via 68, and further electrically connected to the first conductive area 61. It should be noted that, for the PCB board, since both the third conductive area 63 and the fourth conductive area 64 are electrically connected to the control chip 4, the third conductive area 63 is preferably an extension from the location of the first via 68 on the upper surface of the PCB board to a metal layer near the location of the fourth conductive area 64.
[0056] Similarly, the second conductive region 62 can be electrically connected to the fourth conductive region 64 through the second via 69. Figure 4 The method shown, which involves passing through holes first, can also be adopted. Figure 5 The method of using the through-hole shown will not be described in detail again.
[0057] In one embodiment of this utility model, the first conductive region 61 and the second conductive region 62 are located on the lower surface of the PCB board as shown in the figure. Figure 6 The PCB board is configured as shown. Specifically, the two ends of the lower surface of the PCB board are respectively designated as the first conductive area 61 and the second conductive area 62. The width of the first conductive area 61 and the second conductive area 62 is equal to or close to that of the PCB board, and the length of the first conductive area 61 and the second conductive area 62 is not less than 1 / 4 of the length of the PCB board. This facilitates soldering the PCB board to the first conductor 1 and the second conductor 2, and also ensures high reliability of both mechanical and electrical connections.
[0058] In the above embodiment, the third conductive region 63 is electrically connected to the first conductive region 61 through the first via hole 68, the fourth conductive region 64 is electrically connected to the second conductive region 62 through the second via hole 69, the first conductive region 61 is electrically connected to the first conductive body 1 through soldering, and the second conductive region 62 is electrically connected to the second conductive body 2 through soldering. Therefore, the first port of the control chip 4 is electrically connected to the first conductive body 1, and the second port of the control chip 4 is electrically connected to the second conductive body 2 without the need of metal leads, which is simple and reliable, and is less likely to cause a short circuit during production.
[0059] The MOSFET device 3 is preferably an unpackaged MOSFET die. The MOSFET device 3 is disposed on the first conductive body 1, and the upper surface of the MOSFET device 3 is electrically connected to the second conductive body 2 through the second metal conductor 8. The gate 31 of the MOSFET device 3 is electrically connected to the fifth conductive region 65 through the first metal conductor 7, and the gate of the MOSFET device 3 is electrically connected to the control pole of the control chip 4 because the control pole of the control chip 4 is electrically connected to the fifth conductive region 65. As shown in Figure 2 The end of the control chip 4 is directed to the end close to the MOSFET device 3 through the fifth conductive region 65, which facilitates the lead.
[0060] The first metal conductor 7 is preferably gold-plated or silver-plated wire. The second metal conductor 8 is preferably a metal interconnection sheet, and the middle part of the metal interconnection sheet is provided with an upwardly arched bending part 81.
[0061] In order to improve the reliability of the connection between the MOSFET device 3 and other components and the electrical performance of the product, a first metal-plated region is provided on the gate of the MOSFET device 3, and a second metal-plated region is provided on each conductive region (the first conductive region 61 to the seventh conductive region 67) for soldering. The metal plating layer of the first metal-plated region and the second metal-plated region can be gold, silver, or tin.
[0062] It should be noted that in other embodiments, the carrier board can also not be a PCB board, as long as it has an insulating substrate and a structure of conductive layers of conductive regions and via holes as described above, which can electrically connect the conductive regions that need to be electrically connected. In addition, the plating layer of each conductive region can be gold, silver, or tin, in addition to copper.
[0063] The MOSFET device 3, the control chip 4, the capacitor 5, the PCB board, the first metal conductor 7, the second metal conductor 8 and the part of the first conductor 1 and the part of the second conductor 2 are insulated and packaged by the plastic package body.
[0064] Preferably, at least one through hole 60 is arranged on the carrier plate 6, and the through hole is configured as a glue leakage hole. When the MOSFET photovoltaic bypass protection module is packaged, the packaging glue leaks from the glue leakage hole, which can improve the packaging speed and the overall structural strength of the product. Through the through hole 60, the glue penetrates up and down to firmly lock the PCB board and can improve the delamination effect (the surface of the PCB board is smooth and easy to delaminate), so as to realize firm glue locking, improve delamination and reduce mechanical stress.
[0065] Preferably, as shown in Figure 1 and Figure 2 A first wave structure 11 is arranged at the position of the target packaging on the first conductor 1, and a second wave structure 21 is arranged at the position of the target packaging on the second conductor 2. When the first conductor 1 and the second conductor 2 are insulated and packaged by the plastic package body, the grooves of the first wave structure 11 and the second wave structure are filled with epoxy resin correspondingly. The structure can increase the resistance and pulling force of the two conductors to the glue, and can effectively realize the anti-pulling effect.
[0066] In the embodiment, the control chip 4 and the capacitor 5 are arranged on the carrier plate 6, and the MOSFET device 3 is arranged on the first conductor 1 or the second conductor 2. Because the MOSFET device 3 generates a large amount of heat during work, the layout mode of the MOSFET photovoltaic bypass protection module can not only simplify the process, reduce the metal lead, reduce the cost and improve the reliability of the product, but also has excellent heat dissipation performance.
[0067] In one embodiment of the utility model, the surface of the PCB board is attached with a resistor device 10. Specifically, one end of the resistor device 10 is electrically connected with the first conductive area 61, and the other end of the resistor device 10 is electrically connected with the second conductive area 62; or one end of the resistor device 10 is electrically connected with the third conductive area 63, and the other end of the resistor device 10 is electrically connected with the fourth conductive area 64. The resistor device can be a single resistor or a resistor module composed of multiple resistors electrically connected. By arranging the resistor device, when multiple MOSFET photovoltaic bypass protection modules are used in series, the resistor device can play a voltage balancing function.
[0068] In one embodiment of the utility model, a MOSFET photovoltaic bypass protection module is provided, which is different from the technical scheme of arranging the control chip 4 and the capacitor 5 on the carrier plate 6 and arranging the MOSFET device 3 on the first conductor 1 or the second conductor 2 in the above-mentioned embodiment, in the embodiment, the MOSFET device 3, the control chip 4 and the capacitor 5 are arranged on the carrier plate 6.
[0069] In the embodiment, an eighth conductive area is additionally arranged on the upper surface of the carrier plate 6, the lower surface of the MOSFET device 3 is welded and connected with the eighth conductive area, and the eighth conductive area is electrically connected with the third conductive area in the above-mentioned embodiment. The connection mode between other components and electrodes is the same as that in the above-mentioned embodiment, and will not be described again. In order to improve the heat dissipation performance of the product, the size of the carrier plate 6 is larger, and the area of the eighth conductive area is preferably larger than the area of the lower surface of the MOSFET device 3.
[0070] It should be noted that, in one specific embodiment, the control chip adopts an ideal diode control chip, the first port of the ideal diode control chip is an anode connected to the source of the MOSFET device, the second port of the ideal diode control chip is a cathode connected to the drain of the MOSFET device, the third port and the fourth port are charge pump output ports of the ideal diode control chip, and are connected to external charge pump capacitors and the two ends of the charge pump capacitors, respectively. The control electrode of the ideal diode control chip is a gate drive output port connected to the gate of the external MOSFET. The lower surface of the MOSFET device is provided with one of the source and the drain and is electrically connected with one of the two conductors; the upper surface of the MOSFET device is provided with the other one of the source and the drain and is electrically connected with the second metal conductor. It should be noted that, in other specific embodiments, the control chip can also adopt other control chips. In actual application, according to the functional requirements and application requirements of the MOSFET photovoltaic bypass protection module, a corresponding control chip is selected, and the specific selection of the control chip does not limit the protection scope of the application.
[0071] It needs to be explained that in this document, the terms such as first and second, and the like are used only to distinguish one entity or operation from another, and do not necessarily require or imply these entities or operations to be in any such actual relationship or order. Moreover, the terms "comprising", "containing", or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the statement "comprising a" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the stated element.
[0072] The above description is merely specific implementation of the present application, and it should be noted that for those skilled in the art, without departing from the principles of the present application, a number of improvements and refinements can be made, and these improvements and refinements should also be considered as the protection scope of the present application.
Claims
1. A MOSFET photovoltaic bypass protection module, characterized in that, It includes a first conductor (1), a second conductor (2), a MOSFET device (3), a control chip (4), a capacitor (5), and a carrier plate (6); wherein, an insulating gap is provided between the first conductor (1) and the second conductor (2), and the carrier plate (6) spans the insulating gap and its two ends are directly connected to the first conductor (1) and the second conductor (2) respectively. The carrier plate (6) includes an insulating substrate and a conductive layer disposed on the insulating substrate. The control chip (4) and the capacitor (5) are disposed on the carrier plate (6) and electrically connected through the conductive layer. The control chip (4) is electrically connected to the first conductor (1) and the second conductor (2) respectively through the conductive layer. The MOSFET device (3) is disposed on the first conductor (1) or the second conductor (2), and the MOSFET device (3) is electrically connected to the control chip (4), the first conductor (1) and the second conductor (2) respectively.
2. The MOSFET photovoltaic bypass protection module according to claim 1, characterized in that, The MOSFET device (3) is disposed on the first conductor (1). The gate of the MOSFET device (3) is electrically connected to the control electrode of the control chip (4) through the first metal conductor (7). One of the drain and source of the MOSFET device is electrically connected to the first conductor, and the other of the drain and source of the MOSFET device is electrically connected to the second conductor through the second metal conductor.
3. The MOSFET photovoltaic bypass protection module according to claim 2, characterized in that, The lower surface of the carrier plate (6) is provided with an insulating first conductive area (61) and a second conductive area (62), the first conductive area (61) is electrically connected to the first conductor (1), and the second conductive area (62) is electrically connected to the second conductor (2). The upper surface of the carrier plate (6) is provided with an insulating and isolated third conductive area (63) and a fourth conductive area (64). The control chip (4) is disposed on the upper surface of the carrier plate (6) and its first port is electrically connected to the third conductive area (63). The second port of the control chip (4) is electrically connected to the fourth conductive area (64). The third conductive region (63) is electrically connected to the first conductive region (61), and the fourth conductive region (64) is electrically connected to the second conductive region (62).
4. The MOSFET photovoltaic bypass protection module according to claim 3, characterized in that, The upper surface of the carrier plate (6) is also provided with a fifth conductive region (65), the control electrode of the control chip (4) is electrically connected to the fifth conductive region (65), and the gate (31) of the MOSFET device (3) is electrically connected to the fifth conductive region (65) through the second metal conductor (8).
5. The MOSFET photovoltaic bypass protection module according to claim 3, characterized in that, The carrier board (6) is a PCB board. The third conductive area (63) is electrically connected to the first conductive area (61) through the first via (68), and the fourth conductive area (64) is electrically connected to the second conductive area (62) through the second via (69).
6. The MOSFET photovoltaic bypass protection module according to claim 5, characterized in that, The first conductive region (61) and the second conductive region (62) are conductive layers disposed on the lower surface of the insulating substrate; The third conductive region (63) and the fourth conductive region (64) are conductive layers disposed on the upper surface of the insulating substrate.
7. The MOSFET photovoltaic bypass protection module according to claim 3, characterized in that, The surface of the carrier plate (6) is provided with a resistive device (10); One end of the resistor (10) is electrically connected to the first conductive region (61), and the other end of the resistor (10) is electrically connected to the second conductive region (62); or, one end of the resistor (10) is electrically connected to the third conductive region (63), and the other end of the resistor (10) is electrically connected to the fourth conductive region (64).
8. The MOSFET photovoltaic bypass protection module according to claim 2, characterized in that, The control chip (4) and the capacitor (5) are both disposed on the upper surface of the carrier plate (6); The upper surface of the carrier plate (6) is provided with a sixth conductive area (66) and a seventh conductive area (67). The third port of the control chip (4) is electrically connected to one end of the capacitor (5) through the sixth conductive area (66), and the fourth port of the control chip (4) is electrically connected to the other end of the capacitor (5) through the seventh conductive area (67).
9. The MOSFET photovoltaic bypass protection module according to claim 2, characterized in that, The first metal conductor (7) is a metal wire; and / or, The second metal conductor (8) is a metal interconnect sheet, and the middle part of the metal interconnect sheet is provided with an upwardly arched bend (81).
10. The MOSFET photovoltaic bypass protection module according to claim 1, characterized in that, The carrier plate (6) is provided with at least one through hole (60); and / or, The MOSFET device (3) is an unpackaged MOSFET die.