Light supplement lamp time-sharing control circuit
By designing a time-sharing control circuit, the charging and discharging of the supplementary light control circuit can be operated independently, which solves the problems of low circuit efficiency and stability caused by synchronous charging and discharging, and improves the working efficiency of the barcode scanning device and the stability of the supplementary light.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-20
- Publication Date
- 2026-03-27
AI Technical Summary
The existing fill light control circuit operates with simultaneous charging and discharging, resulting in low energy conversion efficiency, component overheating, and affecting the stability of the fill light.
The circuit adopts a time-sharing control design, with the charging and discharging circuits operating independently. Time-sharing control of charging and discharging is achieved through a supercapacitor, and the circuit structure composed of a supplementary light control chip and NMOS/PMOS transistors ensures that the charging and discharging processes do not interfere with each other.
This reduces redundant workload in the circuitry, improves the efficiency of the barcode scanning device, and enhances the stability and reliability of the supplementary lighting.
Smart Images
Figure CN224054463U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to circuit technical field especially relates to a light supplementing lamp time -sharing control circuit. BACKGROUND
[0002] In modern bar code recognition and data acquisition equipment, bar code scanning technology plays a vital role, whether in retail, logistics, manufacturing or medical field, bar code scanning technology is the key means to realize fast and accurate data input. And the light supplementing lamp as the important component of bar code scanning equipment, through providing uniform, sufficient illumination, enhancing the contrast of bar code, so that the scanning device can capture bar code image more clearly, especially in low light environment, the role of light supplementing lamp is particularly significant, can significantly improve the accuracy and reliability of scanning. The charge and discharge work of most light supplementing lamp control circuits on the market can be carried out synchronously, and synchronous charge and discharge can cause the problems of energy conversion efficiency reduction of circuit, component heating and the like, so that the light supplementing lamp works unstably, therefore, the present urgently needs a light supplementing lamp control circuit which can work independently and does not interfere with each other. SUMMARY
[0003] The utility model provides a light supplementing lamp time -sharing control circuit to solve the defect that the charge and discharge work of light supplementing lamp control circuit in prior art is carried out synchronously, causes the light supplementing lamp to work unstably, realizes the independent operation of circuit charge and discharge work, does not interfere with each other, has reduced the redundant work of circuit.
[0004] The utility model provides a light supplementing lamp time -sharing control circuit, include: power access end, charging circuit, super capacitor, discharge circuit, light supplementing lamp control chip, CPU connection end, camera module access end, first light supplementing lamp access end and second light supplementing lamp access end,
[0005] The power access end is connected with super capacitor through charging circuit, and the charging circuit is also connected with camera module access end,
[0006] The super capacitor is connected with light supplementing lamp control chip through discharge circuit, and the discharge circuit is also connected with camera module access end,
[0007] Among them, the light supplementing lamp control chip has 12 pins, and the A2, C2 and C3 pins are connected with the discharge circuit respectively, the D2 pin is suspended, the A3 and B3 pins are connected with the CPU connection end respectively, the B2 pin is connected with the camera module access end, the B1 pin is connected with the discharge circuit through the first inductance, the A1 and C1 pins are grounded respectively, the D3 pin is connected with the first light supplementing lamp access end, and the D1 pin is connected with the second light supplementing lamp access end.
[0008] The charging circuit comprises a first NMOS tube, a second NMOS tube, a first PMOS tube and a second PMOS tube.
[0009] The 1th pin of the first NMOS tube is connected with the camera module access end, the 2th pin of the first NMOS tube is grounded, the 3th pin of the first NMOS tube is connected with the 1th pin of the second NMOS tube, the 2th pin of the second NMOS tube is grounded, the 3th pin of the second NMOS tube is connected with the 1th pin of the first PMOS tube, the 2th pin of the first PMOS tube is connected with the power supply access end, the 3th pin of the first PMOS tube is connected with the 3th pin of the second PMOS tube, the 1th pin of the second PMOS tube is connected with the 3th pin of the second NMOS tube, the 2th pin of the second PMOS tube is connected with the positive pole of the super capacitor, and the negative pole of the super capacitor is grounded.
[0010] The 1th pin of the first PMOS tube and the 1th pin of the second PMOS tube are further connected with the power supply access end through a third resistor.
[0011] The 3th pin of the first NMOS tube is further connected with the power supply access end through a fourth resistor.
[0012] The 3th pin of the first NMOS tube and the 1th pin of the second NMOS tube are further connected with a fifth resistor; and the 1th pin of the second NMOS tube is further grounded through a sixth resistor.
[0013] The discharge circuit comprises a third NMOS tube and a third PMOS tube.
[0014] The 1th pin of the third NMOS tube is connected with the camera module access end, the 2th pin of the third NMOS tube is grounded, and the 3th pin of the third NMOS tube is connected with the 1th pin of the third PMOS tube; the 2th pin of the third PMOS tube is connected with the positive pole of the super capacitor, and the 3th pin of the third PMOS tube is connected with the A2, C2 and C3 pins of the light supplementing lamp control chip.
[0015] The 3th pin of the third PMOS tube is further connected with a first inductor; and the 1th pin of the third PMOS tube is further connected with the positive pole of the super capacitor through a ninth resistor.
[0016] The seventh resistor is connected between the camera module access end and the 1 pin of the third NMOS tube.
[0017] The C3 pin of the light supplementing lamp control chip is connected with the 3 pin of the third PMOS tube through the tenth resistor, and the C2 pin is connected with the 3 pin of the third PMOS tube through the eleventh resistor.
[0018] The B2 pin of the light supplementing lamp control chip is also grounded through the twelfth resistor.
[0019] The charging circuit, the super capacitor, the discharging circuit and the light supplementing lamp control chip are combined, so that the charging and discharging of the light supplementing lamp control circuit is controlled in time. BRIEF DESCRIPTION OF DRAWINGS
[0020] In order to more clearly illustrate the technical scheme of the present application or the prior art, the drawings needed in the following embodiment or prior art description will be briefly introduced.
[0021] Fig. 1 is an electrical diagram of the light supplementing lamp control circuit provided by the present application;
[0022] Fig. 2 is a schematic view of the light supplementing lamp control circuit provided by the present application. DETAILED DESCRIPTION
[0023] To make the objectives, technical solutions, and advantages of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.
[0024] The following is combined Figs. 1-2 This utility model describes a time-division control circuit for a fill light, comprising: a power input terminal, a charging circuit, a supercapacitor C40, a discharging circuit, a fill light control chip U1, a CPU connection terminal, a camera module input terminal, a first fill light input terminal, and a second fill light input terminal.
[0025] The power input terminal is connected to the supercapacitor C40 via a charging circuit, which is also connected to the camera module input terminal.
[0026] The supercapacitor C40 is connected to the fill light control chip U1 through a discharge circuit, which is also connected to the camera module access terminal.
[0027] As the names suggest, the power input terminal mentioned above is used to connect to the power supply, the CPU connection terminal is used to connect to the CPU, the camera module input terminal is used to connect to the camera module, the first fill light input terminal is used to connect to the first fill light F1, and the second fill light input terminal is used to connect to the second fill light F2.
[0028] The fill light control chip U1 is model LM3644, which has 12 pins: A1 (GND), A2 (IN), A3 (SDA), B1 (SW), B2 (STROBE), B3 (SCL), C1 (OUT), C2 (HWEN), C3 (TORCH / TEMP), D1 (LED2), D2 (TX), and D3 (LED1). Pins A2, C2, and C3 of the fill light control chip U1 are connected to the discharge circuit, pin D2 is left floating, pins A3 and B3 are connected to the CPU connection terminal, pin B2 is connected to the camera module access terminal, pin B1 is connected to the discharge circuit through the first inductor L1, pins A1 and C1 are grounded, pin D3 is connected to the first fill light access terminal, and pin D1 is connected to the second fill light access terminal.
[0029] In this embodiment, the charging circuit includes: a first NMOS transistor D1, a second NMOS transistor D2, a first PMOS transistor D3, and a second PMOS transistor D4;
[0030] The 1st pin of the 1st NMOS transistor D1 is connected with the camera module access end, the 2nd pin of the 1st NMOS transistor D1 is grounded, the 3rd pin of the 1st NMOS transistor D1 is connected with the 1st pin of the 2nd NMOS transistor D2, the 2nd pin of the 2nd NMOS transistor D2 is grounded, the 3rd pin of the 2nd NMOS transistor D2 is connected with the 1st pin of the 1st PMOS transistor D3, the 2nd pin of the 1st PMOS transistor D3 is connected with the power supply access end, the 3rd pin of the 1st PMOS transistor D3 is connected with the 3rd pin of the 2nd PMOS transistor D4, the 1st pin of the 2nd PMOS transistor D4 is connected with the 3rd pin of the 2nd NMOS transistor D2, the 2nd pin of the 2nd PMOS transistor D4 is connected with the positive pole of the super capacitor C40, and the negative pole of the super capacitor C40 is grounded.
[0031] Further, the 1st pin of the 1st NMOS transistor D1 is connected with the camera module access end through the 1st resistor R1, the 1st pin of the 1st NMOS transistor D1 is connected with the 1st resistor R1 through the 2nd resistor R2, the 3rd pin of the 1st NMOS transistor D1 is connected with the power supply access end through the 4th resistor R4, the 1st pin of the 1st PMOS transistor D3 and the 1st pin of the 2nd PMOS transistor D4 are connected with the power supply access end through the 3rd resistor R3, the 3rd pin of the 1st NMOS transistor D1 and the 1st pin of the 2nd NMOS transistor D2 are further connected with the 5th resistor R5, and the 1st pin of the 2nd NMOS transistor D2 is further grounded through the 6th resistor.
[0032] Further, the power supply access end is further grounded through the 2nd capacitor C20 and the 3rd capacitor C30 in parallel.
[0033] When the camera module access end is in low level state, the 1st pin and the 2nd pin of the 1st NMOS transistor D1 cannot form pressure difference, the 2nd pin and the 3rd pin of the 1st NMOS transistor D1 are not conductive, and then the 1st NMOS transistor D1 is disconnected. The 1st pin of the 2nd NMOS transistor D2 is in high level state due to the pull-up action of the 5th resistor R5, the 1st pin and the 2nd pin of the 2nd NMOS transistor D2 form pressure difference, the 2nd pin and the 3rd pin of the 2nd NMOS transistor D2 are conductive, and then the 2nd NMOS transistor D2 is conductive, so that the 1st pin of the 1st PMOS transistor D3 and the 1st pin of the 2nd PMOS transistor D4 are grounded through the 3rd pin and the 2nd pin of the 2nd NMOS transistor D2, the 2nd pin and the 3rd pin of the 1st PMOS transistor D3 are conductive, the 2nd pin and the 3rd pin of the 2nd PMOS transistor D4 are conductive, and then the 1st PMOS transistor D3 and the 2nd PMOS transistor D4 are also conductive. At this time, the power supply charges (stores energy) the super capacitor C40 through the power supply access end and the discharge circuit.
[0034] In the embodiment, the discharging circuit comprises a third NMOS transistor D6 and a third PMOS transistor D5; wherein the 1st pin of the third NMOS transistor D6 is connected with the camera module access end, the 2nd pin of the third NMOS transistor D6 is grounded, the 3rd pin of the third NMOS transistor D6 is connected with the 1st pin of the third PMOS transistor D5, the 2nd pin of the third PMOS transistor D5 is connected with the positive pole of the super capacitor C40, and the 3rd pin of the third PMOS transistor D5 is connected with the A2, C2 and C3 pins of the light supplement lamp control chip U1 respectively.
[0035] Further, the 1st pin of the third NMOS transistor D6 is connected with the 7th resistor R7 between the camera module access end, the 1st pin of the third NMOS transistor D6 is also grounded through the 8th resistor R8, and the 1st pin of the third PMOS transistor D5 is also connected with the positive pole of the super capacitor C40 through the 9th resistor R9.
[0036] Further, the 3rd pin of the third PMOS transistor D5 is also connected with the ground through the 5th capacitor C50 and the 6th capacitor C60 in parallel on the line connected with the light supplement lamp control chip U1.
[0037] When the camera module access end is in high level state, the B2 pin of the light supplement lamp control chip U1 is in high level state, at this time, the light supplement lamp control chip U1 is in the opening state; the 1st pin of the third NMOS transistor D6 is in high level state, the 2nd pin and the 3rd pin of the third NMOS transistor D6 are turned on, so the third NMOS transistor D6 is turned on. The 1st pin of the third PMOS transistor D5 is grounded through the 2nd pin and the 3rd pin of the third NMOS transistor D6, the 2nd pin and the 3rd pin of the third PMOS transistor D5 are turned on, so the third PMOS transistor D5 is turned on, at this time, the super capacitor C40 supplies power to the light supplement lamp control chip U1 through the discharging circuit (the super capacitor C40 discharges).
[0038] Similarly, when the camera module is in low level state, the third NMOS transistor D6 and the third PMOS transistor D5 are both disconnected, that is, at this time, the discharging circuit does not work, and the super capacitor C40 only charges but does not discharge; when the camera module is in high level state, the first NMOS transistor D1 is turned on, the second NMOS transistor D2, the first PMOS transistor D3 and the second PMOS transistor D4 are all disconnected, that is, at this time, the charging circuit does not work, and the super capacitor C40 only discharges but does not charge.
[0039] Further, the C3 pin of the light supplement lamp control chip U1 is connected with the 3rd pin of the third PMOS transistor D5 through the 10th resistor R10, the C2 pin is connected with the 3rd pin of the third PMOS transistor through the 11th resistor R11, the B2 pin is grounded through the 12th resistor R12, and the C1 pin is grounded through the first capacitor C10.
[0040] In the embodiment, only when the camera module is in high level state, the light supplement lamp control chip U1 is in open state, and the super capacitor C40 supplies power to the light supplement lamp control chip U1, the first light supplement lamp F1 and the second light supplement lamp F2 through the discharging circuit.
[0041] Further, the CPU controls the switching, light intensity, flashing frequency and other working states of the first light supplement lamp F1 and the second light supplement lamp F2 through the A3 and B3 pins of the light supplement lamp control chip U1.
[0042] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A light supplement lamp time-sharing control circuit, characterized by comprising: The application relates to a power supply access end, a charging circuit, a super capacitor, a discharging circuit, a light supplementing lamp control chip, a CPU connection end, a camera module access end, a first light supplementing lamp access end and a second light supplementing lamp access end. The power supply access end is connected with the super capacitor through the charging circuit, and the charging circuit is also connected with the camera module access end. The super capacitor is connected with the light supplementing lamp control chip through the discharging circuit, and the discharging circuit is also connected with the camera module access end. The light supplementing lamp control chip has 12 pins, the A2, C2 and C3 pins of which are connected with the discharging circuit, the D2 pin is suspended, the A3 and B3 pins are connected with the CPU connection end, the B2 pin is connected with the camera module access end, the B1 pin is connected with the discharging circuit through a first inductor, the A1 and C1 pins are grounded, the D3 pin is connected with the first light supplementing lamp access end, and the D1 pin is connected with the second light supplementing lamp access end. The charging circuit comprises a first NMOS tube, a second NMOS tube, a first PMOS tube and a second PMOS tube.
2. The light supplement lamp time-sharing control circuit according to claim 1, characterized in that, The 1 pin of the first NMOS tube is connected with the camera module access end, the 2 pin of the first NMOS tube is grounded, the 3 pin of the first NMOS tube is connected with the 1 pin of the second NMOS tube, the 2 pin of the second NMOS tube is grounded, the 3 pin of the second NMOS tube is connected with the 1 pin of the first PMOS tube, the 2 pin of the first PMOS tube is connected with the power supply access end, the 3 pin of the first PMOS tube is connected with the 3 pin of the second PMOS tube, the 1 pin of the second PMOS tube is connected with the 3 pin of the second NMOS tube, the 2 pin of the second PMOS tube is connected with the positive electrode of the super capacitor, and the negative electrode of the super capacitor is grounded. The 1 pin of the first PMOS tube and the 1 pin of the second PMOS tube are also connected with the power supply access end through a third resistor.
3. The light supplement lamp time-sharing control circuit according to claim 2, characterized in that, The 3 pin of the first NMOS tube is also connected with the power supply access end through a fourth resistor.
4. The light supplement lamp time-sharing control circuit according to claim 2, characterized in that, The 3 pin of the first NMOS tube and the 1 pin of the second NMOS tube are also connected with a fifth resistor, and the 1 pin of the second NMOS tube is also grounded through a sixth resistor.
5. The light supplement lamp time-sharing control circuit according to claim 2, characterized in that, The discharging circuit comprises a third NMOS tube and a third PMOS tube.
6. The light supplement lamp time-sharing control circuit according to claim 1, characterized in that, The 1 pin of the third NMOS tube is connected with the camera module access end, the 2 pin of the third NMOS tube is grounded, and the 3 pin of the third NMOS tube is connected with the 1 pin of the third PMOS tube; the 2 pin of the third PMOS tube is connected with the positive electrode of the super capacitor, and the 3 pin of the third PMOS tube is connected with the A2, C2 and C3 pins of the light supplementing lamp control chip. The 3 pin of the third PMOS tube is also connected with the first inductor, and the 1 pin of the third PMOS tube is also connected with the positive electrode of the super capacitor through a ninth resistor.
7. The light supplement lamp time-sharing control circuit according to claim 6, characterized in that, A seventh resistor is connected between the camera module access end and the 1 pin of the third NMOS tube; the 1 pin of the third NMOS tube is grounded through an eighth resistor on the line connected with the seventh resistor.
8. The light supplement lamp time-sharing control circuit according to claim 6, characterized in that, 9. The light supplement lamp time-sharing control circuit according to claim 6, characterized in that, The C3 pin of the light supplement lamp control chip is connected with the 3 pin of the third PMOS tube through the tenth resistor, and the C2 pin is connected with the 3 pin of the third PMOS tube through the eleventh resistor.
10. The light supplement lamp time-sharing control circuit according to claim 1, characterized in that, The B2 pin of the light supplement lamp control chip is also grounded through the twelfth resistor.