LCM test board serial port automatic downloading circuit

Abstract

The utility model discloses an automatic serial port downloading circuit for an LCM (Liquid Crystal Module) test board, which belongs to the technical field of LCM test boards, and is provided with a level conversion unit, a port connection unit, a main control unit and a switch unit, and the port connection unit sends the communication state of the level conversion unit and external equipment to the main control unit; the main control unit controls the port connection unit to enter a downloading mode according to the communication state, the main control unit controls the port connection unit to generate a downloading time sequence through the level conversion unit, so that an automatic downloading function is realized, the port connection unit can realize downloading configuration of the main control unit, and a time sequence for automatically entering the downloading mode is generated through serial port communication; the downloading operation time of the LCM test board is effectively saved, and the debugging efficiency of the LCM is improved.

Description

Technical Field

[0001] This utility model belongs to the technical field of LCM test board, and in particular relates to an automatic serial port download circuit for LCM test board. Background Technology

[0002] Liquid Crystal Modules (LCMs) are fundamental components of high technology that can be assembled with other components to form electronic products such as mobile phones and tablets. Existing LCM test boards typically enter download mode by shorting jumpers or pressing a switch before power-on. This requires manual operation to enter download mode, resulting in high labor intensity for workers and low testing efficiency. Utility Model Content

[0003] To address the aforementioned problems, this utility model provides an automatic serial port download circuit for an LCM test board. By optimizing the circuit, the USB module of the LCM test board can be connected to a computer, and the board can automatically enter the download program mode through serial port software, thereby solving the problems mentioned in the background art.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] This utility model provides an automatic serial port download circuit for an LCM test board, including a level conversion unit, a port connection unit, a main control unit, and a switch unit. The port connection unit and the switch unit are both connected to the main control unit. The level conversion unit is connected to one end of the port connection unit, and the other end of the port connection unit is connected to the switch unit.

[0006] The port connection unit sends the communication status between the level conversion unit and the external device to the main control unit. The main control unit controls the port connection unit to enter the download mode according to the communication status, wherein the communication status includes power supply and data transmission.

[0007] As a preferred embodiment of the above technical solution, the port connection unit includes a current limiting module and an amplification module connected to the level conversion unit. One end of the amplification module is connected to the current limiting module, and the other end of the amplification module is connected to the main control unit.

[0008] As a preferred embodiment of the above technical solution, the level conversion unit includes a chip U4, a serial port module, and a USB module. The serial port module and the USB module are both connected to the chip U4, and the level conversion unit is connected to the external device through the serial port module and / or the USB module.

[0009] As a preferred embodiment of the above technical solution, the current limiting module includes resistors R3 and R4, transistors Q1 and Q2. One end of resistor R3 is connected to pin DTR of chip U4 and the emitter of transistor Q2, and the other end of resistor R3 is connected to the base of transistor Q1. One end of resistor R4 is connected to pin RTS of chip U4 and the emitter of transistor Q1, and the other end of resistor R4 is connected to the base of transistor Q2. The collectors of transistor Q1 and transistor Q2 are connected to the main control unit.

[0010] As a preferred embodiment of the above technical solution, the chip U4 is also connected to capacitors C3 and C4.

[0011] As a preferred embodiment of the above technical solution, the chip U4 is model CH340C.

[0012] As a preferred embodiment of the above technical solution, the switching unit includes resistor R1, resistor R2, capacitor C6, capacitor C7, switch SW1 and switch SW2. Resistor R1 is connected to one end of switch SW1, one end of capacitor C7 and the EN terminal of the main control unit. Resistor R2 is connected to one end of switch SW2, one end of capacitor C6 and the GPIO0 terminal of the main control unit. The other end of switch SW1 is connected to the other end of switch SW2 and grounded. The other ends of capacitor C6 and capacitor C7 are grounded respectively.

[0013] As a preferred embodiment of the above technical solution, both the switch SW1 and the switch SW2 are model TS-1101-CW.

[0014] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0015] By configuring a level conversion unit, a port connection unit, a main control unit, and a switch unit, the port connection unit sends the communication status between the level conversion unit and the external device to the main control unit. The main control unit controls the port connection unit to enter download mode based on the communication status. The main control unit controls the port connection unit to generate download timing through the level conversion unit, thereby realizing the automatic download function. The port connection unit can realize the download configuration of the main control unit and generate the timing for automatically entering download mode through serial communication, effectively saving the download operation time of the LCM test board and improving the debugging efficiency of LCM. Attached Figure Description

[0016] Figure 1 This is a structural block diagram of the LCM test board serial port automatic download circuit proposed in this utility model;

[0017] Figure 2 This is a circuit diagram of the level conversion unit proposed in this utility model;

[0018] Figure 3This is a circuit diagram of the port connection unit proposed in this utility model;

[0019] Figure 4 This is a circuit diagram of the switching unit proposed in this utility model.

[0020] The symbols for the main components are explained below:

[0021] 10-Level conversion unit; 20-Port connection unit; 21-Current limiting module; 22-Amplification module; 30-Main control unit; 40-Switch unit. Detailed Implementation

[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.

[0023] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0024] See Figure 1 This utility model provides an automatic serial port download circuit for an LCM test board, including a level conversion unit 10, a port connection unit 20, a main control unit 30, and a switch unit 40. The port connection unit 20 and the switch unit 40 are both connected to the main control unit 30. The level conversion unit 10 is connected to one end of the port connection unit 20, and the other end of the port connection unit 20 is connected to the switch unit 40.

[0025] The port connection unit 20 sends the communication status between the level conversion unit 10 and the external device to the main control unit 30. The main control unit 30 controls the port connection unit 20 to enter the download mode according to the communication status. The communication status includes power supply and data transmission.

[0026] In this embodiment, the port connection unit 20 includes a current limiting module 21 and an amplification module 22 connected to the level conversion unit 10. One end of the amplification module 22 is connected to the current limiting module 21, and the other end of the amplification module 22 is connected to the main control unit 30. The level conversion unit 10 includes a chip U4, a serial port module, and a USB module. The serial port module and the USB module are both connected to the chip U4. The level conversion unit 10 is connected to the external device through the serial port module and / or the USB module. The current limiting module 21 includes resistors R3 and R4, transistors Q1 and Q2. One end of resistor R3 is connected to pin DTR of chip U4 and the emitter of transistor Q2, and the other end of resistor R3 is connected to the base of transistor Q1. One end of resistor R4 is connected to pin RTS of chip U4 and the emitter of transistor Q1, and the other end of resistor R4 is connected to the base of transistor Q2. The collectors of transistor Q1 and Q2 are connected to the main control unit 30. The amplification module 22 can be an NPN transistor or a MOSFET.

[0027] It should be noted that the chip U4 is also connected to capacitors C3 and C4. The model of the chip U4 is CH340C. The switching unit 40 includes resistors R1 and R2, capacitors C6 and C7, switch SW1 and switch SW2. Resistor R1 is connected to one end of switch SW1, one end of capacitor C7 and the EN terminal of the main control unit 30. Resistor R2 is connected to one end of switch SW2, one end of capacitor C6 and the GPIO0 terminal of the main control unit. The other end of switch SW1 is connected to the other end of switch SW2 and grounded. The other ends of capacitors C6 and C7 are grounded respectively. The model of switch SW1 and switch SW2 is TS-1101-CW.

[0028] The main control unit 30 can be an MCU or a microcontroller, and the level conversion unit 10 is a USB-to-serial chip U4. The CH340C is a USB-to-TTL level converter that can convert USB data from a computer into serial data, facilitating communication with devices such as microcontrollers (MCUs). The chip U4 supports 3.3V and 5V power supply voltages, is fully functional, and is a commonly used component in DIY design and embedded development. Chip U4 contains multiple pins. Pins 2 and 3 of chip U4 are TXD0 (serial data output) and RXD0 (serial data input) of the serial port module (serial communication state). Pins 5 and 6 of chip U4 are D+ and D- of the USB module. Pins 1 and 16 of chip U4 are connected to capacitor C3. Pin 4 of chip U4 (V3 is connected to VCC input external power supply when the power supply voltage is 3.3V, and an external decoupling capacitor with a capacitance of 0.1uF is connected when the power supply voltage is 5V) is connected to capacitor C4. Pins 13 (DTR#) and 14 (RTS#) of chip U4 indicate that the data terminal is ready and active low (high) and request to send and active low (high), respectively.

[0029] In this configuration, pin 14 (RTS) of chip U4 is connected to resistor R4, and pin 13 (DTR) of chip U4 is connected to resistor R3. Transistors Q1 and Q2 are S8050, and resistors R3 and R4 are both 10kΩ. The collectors of transistors Q1 and Q2 are connected to resistors R1 and R2, respectively. This means the collectors of transistors Q1 and Q2 are connected to the MCU's EN (reset mode) and GPIO0 (download mode) pins, respectively. The purpose of resistors R1, R2, R3, and R4 is to prevent reverse current from exceeding the chip's design tolerance limit, thus causing internal circuit malfunctions and achieving current limiting and voltage regulation.

[0030] Specifically, the communication states of the RTS and DTR pins of chip U4 (CH340C, USB to UART interface chip) are utilized. Q1 and Q2 (NPN transistors) are used to control the MCU's GPIO0 configuration pin and EN (reset pin) to automatically enter download mode via serial communication. The specific control process is as follows: 1) When the USB cable is connected to the computer (external device), DTR=1, RTS=1. At this time, Q1 is turned on, EN=RTS=1; Q2 is turned on, GPIO0=1; normal operation; 2) The moment the serial port is opened, DTR=0, RTS=0, that is, the emitter (E) of Q1 and Q2 is 0; due to the presence of R3 and R4, the base (B) of the transistors still has voltage momentarily, Q1 and Q2 are turned on, C=E, therefore GPIO=0; EN=0; entering reset mode and restarting to enter download mode.

[0031] It should be understood that this utility model configures the MCU to enter download mode with GPIO0=0. GPIO0C and EN are pulled up via R1 and R2 to power on and enter normal mode. The RTS and DTR pins of the CH340C, as well as R3 and R4, are connected to the base (B) of Q1 and Q2 respectively. The collector (C) of Q1 is connected to the EN (reset) pin of the MCU; the collector (C) of Q2 is connected to the GPIO0 (download configuration pin) of the MCU. The emitter (E) of Q1 is connected to the RTS pin; the emitter (E) of Q2 is connected to the DTR pin. The communication control pins of the CH340C are used to achieve automatic downloading via computer serial port software, reducing manual operation during downloading and significantly saving download time and effort, thus facilitating LCM debugging. In other words, the download timing is generated by controlling the RTS and DTR pins of the CH340C through a transistor, thereby achieving automatic downloading.

[0032] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.

Claims

1. An automatic serial port download circuit for an LCM test board, characterized in that, It includes a level conversion unit, a port connection unit, a main control unit, and a switch unit. The port connection unit and the switch unit are both connected to the main control unit. The level conversion unit is connected to one end of the port connection unit, and the other end of the port connection unit is connected to the switch unit. The port connection unit sends the communication status between the level conversion unit and the external device to the main control unit. The main control unit controls the port connection unit to enter the download mode according to the communication status, wherein the communication status includes power supply and data transmission.

2. The LCM test board serial port automatic download circuit according to claim 1, characterized in that, The port connection unit includes a current limiting module and an amplification module connected to the level conversion unit. One end of the amplification module is connected to the current limiting module, and the other end of the amplification module is connected to the main control unit.

3. The LCM test board serial port automatic download circuit according to claim 2, characterized in that, The level conversion unit includes a chip U4, a serial port module, and a USB module. The serial port module and the USB module are both connected to the chip U4. The level conversion unit is connected to the external device through the serial port module and / or the USB module.

4. The LCM test board serial port automatic download circuit according to claim 3, characterized in that, The current limiting module includes resistors R3 and R4, transistors Q1 and Q2. One end of resistor R3 is connected to pin DTR of chip U4 and the emitter of transistor Q2, and the other end of resistor R3 is connected to the base of transistor Q1. One end of resistor R4 is connected to pin RTS of chip U4 and the emitter of transistor Q1, and the other end of resistor R4 is connected to the base of transistor Q2. The collectors of transistors Q1 and Q2 are connected to the main control unit.

5. The LCM test board serial port automatic download circuit according to claim 4, characterized in that, The chip U4 is also connected to capacitors C3 and C4.

6. The LCM test board serial port automatic download circuit according to claim 5, characterized in that, The chip U4 is model CH340C.

7. The LCM test board serial port automatic download circuit according to claim 1, characterized in that, The switching unit includes resistor R1, resistor R2, capacitor C6, capacitor C7, switch SW1, and switch SW2. Resistor R1 is connected to one end of switch SW1, one end of capacitor C7, and the EN terminal of the main control unit. Resistor R2 is connected to one end of switch SW2, one end of capacitor C6, and the GPIO0 terminal of the main control unit. The other end of switch SW1 is connected to the other end of switch SW2 and grounded. The other ends of capacitor C6 and capacitor C7 are grounded respectively.

8. The LCM test board serial port automatic download circuit according to claim 7, characterized in that, Both the switch SW1 and the switch SW2 are model TS-1101-CW.

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