Totem-pole-based rapid high-end ideal diode

Abstract

The utility model discloses a totem-pole-based rapid high-end ideal diode, which comprises a PMOS (P-channel Metal Oxide Semiconductor) main tube, a comparator circuit and a totem-pole circuit which form an integral circuit, the comparator circuit is composed of two independent PNP auxiliary tubes or PNP pair tubes which have the same parameters and are packaged together and two resistors, and the totem pole circuit uses a complementary push-pull circuit composed of an NMOS tube and a PMOS tube. The designed circuit has low bias working current, the totem-pole circuit can provide high current driving capacity, and the switching speed of a PMOS main tube can be increased; a high-end load switch, a comparator and a totem pole circuit are used, the circuit is simple, has the function of preventing backflow, can protect a pre-stage circuit, and is very low in cost and high in practicability.

Description

TECHNICAL FIELD

[0001] The utility model relates to diode technical field, concretely is a kind of ideal diode based on totem pole quick type high-end. BACKGROUND

[0002] Diode has unidirectional conducting characteristic, has the function of preventing reverse flow, obtains more and more application, especially Schottky diode string into power supply has smaller pressure drop, is welcomed by more and more designers. Since the pressure drop of Schottky diode is still greater than MOS tube pressure drop, for some voltage-sensitive circuit, more inclined to use MOS tube with low impedance characteristics, reduce loss. High-end ideal diode technology implementation scheme based on MOS tube is as follows.

[0003] PMOS main tube+PNP pair tube technical scheme: as shown in Figure 1 PNP pair tube uses two PNP tubes of same manufacturer and same batch, ensures that the parameters of two PNP tubes are basically equal, or preferably PNP pair tube is packaged together, the parameters of two PNP tubes are almost equal, so that appropriate switching and reverse flow prevention function can be guaranteed. Since the BE junction of BJT tube is a PN junction in nature, equivalent to a diode, BJT tube BE junction can be replaced by diode, Figure 1 PNP pair tube V2, V3 constitutes comparator circuit, the base of V2, V3 tube is connected together, equivalent to two diode cathodes connected together (belonging to common cathode circuit, according to the principle of two-way diode conduction, diode anode voltage high priority conduction, another voltage low diode cut-off), therefore PNP pair tube V2, V3, which PNP tube's emitter voltage is high, which PNP tube's emission junction (corresponding to EB junction) is preferentially conducted, and the emission junction of the other PNP tube with low voltage is cut off.

[0004] (1) when VCC is forward conducted (Vout has no external power supply, VCC>Vout): V2 tube emission junction preferentially conducts, V2 tube emission junction (emitter and collector channel) conducts, the base voltage Y of V2 tube is VCC-V F (V F PNP tube emitter and base, diode and MOS tube body diode conduction voltage drop, assuming that the conduction voltage drops of the three are the same); V3 tube emission junction (emitter and collector channel) is cut off, V3 tube collector is pulled down to power supply negative pole due to resistance R2, and its voltage VB is 0V, PMOS main tube V1 is conducted, and output voltage Vout=VCC-V F (PMOS main tube V1 body diode channel preferentially conducts) becomes Vout≈VCC (PMOS main tube V1 drain-source channel is followed by conducted).

[0005] (2) When Vout is external power supply (Vout > VCC): V3 tube emitter junction priority to turn on (saturated conduction, emitter and collector channel), V3 tube base voltage Y = Vout - V F , V3 tube collector voltage V1G = Vout - V CE(sat) (V CE(sat) is the saturation conduction voltage drop of V3 tube, about 0.2V ~ 0.3V), PMOS main tube V1 gate, source voltage difference V1 GS = V1G - Vout = VB - Vout = -V CE(sat) , PMOS main tube V1 is off, no backflow current through the source to the drain channel of PMOS main tube V1; V2 tube emitter junction (emitter and collector channel) is off, V2 tube emitter voltage is VCC.

[0006] The auxiliary tube of the PMOS main tube + PNP pair technical solution is a PNP tube. The PNP tube is a current type device, which needs to draw a certain working current to work normally, so the power consumption is relatively high. The collector resistors R1 and R2 are kΩ order of magnitude. In order to reduce power consumption, R1 and R2 have relatively large values, generally tens of kΩ. Since the PNP tube V2 base current, the PNP tube V2 collector current, and the PNP tube V3 base current all pass through the resistor R1, R1 simultaneously acts as the PNP tube V2 base current limiting resistor, the PNP tube V2 collector resistor, and the PNP tube V3 base current limiting resistor. Since R1 and R2 have large values (tens of kΩ), the current flowing through the PNP tube V2 base and the PNP tube V3 base is very small, about microampere level. Although the PNP tube has the function of amplifying current, the amplification factor β = 100 or so, and the collector current I C = β × I B , IC is relatively small. In addition, R1 and R2 should not be too large. Since the resistance R CE of the PNP tube V3 is not very large when it is off or weakly on, if the resistance R2 is too large, the voltage (V3 tube collector voltage) obtained by voltage division of the resistance R2 is large, the gate voltage of V1 tube is large, which inevitably affects the conduction degree of V1 tube and reduces the conduction impedance and current conduction current capacity.

[0007] Although the PMOS main tube V1 is a voltage type device, since the PMOS tube has a parasitic capacitor C GS and a parasitic resistor, there will be RC circuit charging and discharging at the moment of switching on and off. If the small collector current I C of the V3 tube is used to drive the gate of the PMOS main tube V1, the switching speed of the PMOS main tube V1 is obviously not fast enough. If you want to speed up the switching speed, you must improve the driving ability of the switch and increase the driving current capacity.

[0008] PNP tube switch characteristics: PNP tube base, emitter and collector, emitter junction capacitance exists between PNP tube, off state and saturation conduction state of each other, the internal charge storage and release need a certain time, the collector output voltage will lag behind the input voltage. In order to reduce power consumption and get the output as low as possible, the PNP tube needs to be in saturation conduction state, and the charge storage effect of saturation conduction state is the main reason for the transmission delay of the circuit. In order to improve the switching speed, ECL circuit can be used to replace TTL circuit, ECL circuit will be designed as non saturated linear region in conduction state, so as to effectively improve the switching speed, which is at the cost of power consumption.

[0009] MOS tube and transistor BJT tube, MOS tube is unipolar device, no carrier accumulation time, MOS tube switching speed is fast, the main reason is that the opening time t ON and falling time t f is fast. Generally, the circuit will speed up the rising time t r and falling time t f , but in fact, the closing time t OFF is more important. MOS tube has higher switching speed, switching time is 10ns-100ns, and working frequency is higher.

[0010] Compared with bipolar junction transistor, it is generally believed that MOS tube conduction does not need current, as long as the gate source voltage is higher than a certain voltage. This is easy to do, but it also needs speed.

[0011] In the structure of MOS tube, it can be seen that there are parasitic capacitances C GS , C GD between the gate and the source, the gate and the drain, respectively, and the Miller effect exists. In the source ground amplification circuit, the equivalent input capacitance Ci=(1+Av)×(C GD +C GS ), and the driving of MOS tube is actually the charging and discharging of the equivalent input capacitance. The charging of the capacitor needs a current, because the capacitor can be regarded as a short circuit at the moment of charging, so the instantaneous current will be larger. Therefore, the size of the current can be controlled by the gate resistance, so as to control the opening and closing time of MOS tube, and the too fast will have too high voltage change rate (dV / dt).

[0012] When designing MOS tube drive, the first concern is the size of the instantaneous current, and the second is the level of conduction voltage: high end drive often uses NMOS tube, which needs gate voltage greater than source voltage when conducting. The source voltage of high end drive NMOS tube is the same as the drain voltage (VCC) when conducting, so the gate voltage is at least V TNIf in the same system, to get a higher voltage than VCC, to the special boost circuit. Many chip drivers are integrated charge pump circuit, external selection of appropriate capacitors, to get enough instantaneous current to drive the NMOS tube, used in high speed occasions.

[0013] From Figure 1 As can be seen from the (PMOS main pipe + PNP pair pipe technical solution), under the low power consumption characteristics, the PMOS main pipe V1 switching speed needs to be improved, a fast high-end ideal diode needs to be designed to improve the on and off speed of the PMOS main pipe V1, and therefore a fast high-end ideal diode based on totem pole is provided to solve the above problems. Practical new type content

[0014] The utility model discloses a kind of fast high-end ideal diodes based on totem pole, to solve the problems proposed in the above background art.

[0015] To achieve the above object, the utility model provides the following technical scheme: a kind of fast high-end ideal diode based on totem pole, including PMOS main pipe, comparator circuit and totem pole circuit, the PMOS main pipe, comparator circuit and totem pole circuit constitute integral circuit, the comparator circuit is composed of two independent PNP auxiliary pipe or PNP pair pipe with same parameter and be packaged together and two resistors, the totem pole circuit uses the complementary push-pull circuit of NMOS pipe and PMOS pipe.

[0016] Preferably, the comparator is used for comparing the size of input power supply VCC and output power supply Vout.

[0017] Preferably, the comparison signal output by the comparator is transmitted to the gate of the PMOS main pipe after passing through the totem pole circuit.

[0018] Compared with prior art, the utility model has the advantages that: the designed circuit not only has lower bias operating current, totem pole circuit can provide stronger current driving capability, can improve the switching speed of PMOS main pipe;Using high-end load switch, comparator and totem pole circuit, circuit is simple, has the function of preventing backflow, can protect front-stage circuit, cost is very low, and practicality is strong. DRAWINGS

[0019] Figure 1 PNP pair pipe is used for comparator to realize high-end ideal diode schematic diagram for prior art;

[0020] Figure 2 For the utility model based on totem pole fast high-end ideal diode schematic diagram;

[0021] Figure 3The forward bias simulation of the utility model is realized.

[0022] Figure 4 The reverse bias simulation of the utility model is realized. DETAILED DESCRIPTION

[0023] The technical solutions in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments of the utility model, all the other embodiments obtained by the person skilled in the art without creative labor fall within the protection scope of the utility model. EMBODIMENT

[0024] WITH REFERENCE TO Figures 1-3 In the first embodiment of the utility model, the embodiment provides a kind of high-end ideal diode based on totem pole fast type, including PMOS main pipe, comparator circuit and totem pole circuit, PMOS main pipe, comparator circuit and totem pole circuit constitute integral circuit, comparator circuit is composed of two independent PNP auxiliary pipe or PNP pair pipe V2, V3 with same parameter and be packaged together and two resistors R1, R2, totem pole circuit uses the complementary push-pull circuit of NMOS pipe (high end) and PMOS pipe (low end), can provide strong current driving capability.

[0025] Conduction current I of MOS pipe D Related to gate-source voltage V GS Generally speaking, V GS The greater, the stronger its conduction current capability.Totem pole circuit uses discrete component NMOS pipe (high end) + PMOS pipe (low end) to constitute complementary push-pull circuit, with current amplification effect, in output state, one transistor is always cut-off, and another transistor is always on, in analog amplifier circuit, switch to reduce the time of MOS pipe in amplification region, reduce heat generation;Since gain is about 1, so no miller effect occurs, frequency characteristic is very good, push-pull circuit can realize MOS pipe high-speed switching. It can also use integrated push-pull circuit drive chip to realize MOS pipe high-speed switching.NMOS pipe (high end), PMOS pipe (low end) are respectively upper and lower two output tubes, from the perspective of direct current, it is series connection, and the connection of two tubes is output end. Upper tube conduction lower tube cut-off output high level, lower tube conduction upper tube cut-off output low level, two output tubes are alternately operated in cut-off and saturation state, if circuit logic can be upper and lower two tubes are cut-off, then output is high resistance state. EMBODIMENT

[0026] WITH REFERENCE TO Figures 1-4This is the second embodiment of the present invention. This embodiment is based on the previous embodiment. Specifically, the comparator is used to compare the magnitudes of the input power supply VCC and the output power supply Vout. The comparison signal output by the comparator is transmitted to the gate of the PMOS main controller after passing through the totem pole circuit. The strong current driving capability of the totem pole circuit can be used to improve the switching speed of the PMOS main controller.

[0027] When the input power supply VCC is not less than the output power supply Vout, the comparator outputs a high-level comparison signal, i.e., VC≈0V. After the comparison signal passes through the totem-pole circuit, the gate VB of the PMOS main V1 is low, i.e., VB≈0V, and the PMOS main V1 is turned on. When the input power supply VCC is less than the output power supply Vout, the comparator outputs a low-level comparison signal, VC≈VCC. After the comparison signal passes through the totem-pole circuit, the gate of the PMOS main V1 is high, i.e., VB≈VCC, and the PMOS main V1 is turned off.

[0028] The comparator output comparison signal is transmitted to the gate of the PMOS main transistor after passing through the totem pole circuit. Example

[0029] Reference Figures 1-4 This is the third embodiment of the present invention, which is based on the above two embodiments and according to... Figure 2 The circuit schematic was simulated and tested using Multisim (version V14.0) software from National Instruments. The PMOS transistor selected was from ON Semiconductor, model NVTFS5124PLTAG, with a minimum turn-on threshold voltage of V. TP(MIN) =-1.5V, maximum value V TP(MAX) =-2.5V, typical value V not given. TP The conduction current can reach -6A, and the conduction impedance R DS(ON) =0.26Ω(V GS =-10V), R DS(ON) =0.38Ω (V GS =-4.5V). The NMOS transistor used is from NXP, model BSP030, with a minimum turn-on threshold voltage of V. TN(MIN) =1V, maximum value V TN(MAX) =2.8V, typical value V not given. TN The conduction current reaches 10A, and the conduction impedance R DS(ON) =30mΩ (V) GS =10V), R DS(ON) =50mΩ (V) GS= 4.5V). The PNP transistor is Generic, model 2N2905. The load resistor RL = 10Ω, and the specific simulation test is as follows.

[0030] Test one:

[0031] Forward bias simulation test of DC power supply (when the input power supply VCC is not less than the output power supply Vout): VCC = VCC1 = 12V (switch J1 is closed, switch J2 is open): V2 tube is turned on, V3 tube is turned off, the comparator output comparison signal VC is low, that is, VC ≈ 0V, the comparison signal VC passes through the totem pole circuit, the gate VB of the PMOS main tube V1 is low, that is, VB ≈ 111mV, the PMOS main tube V1 is turned on. When the PMOS main tube V1 is turned on, the output power supply Vout of the PMOS main tube V1 is 11.7V (test point PR2), and the on-voltage drop of the PMOS main tube V1 is 12V-11.7V = 0.3V, which is lower than the on-voltage drop V F of the diode. The positive output current of the power supply is 1.17A (test points PR1 and PR3), and the corresponding on-resistance R DS(ON) = 0.3V / 1.17A = 0.256Ω, which is not much different from the Datasheet data, and the simulation is shown in Figure 3 .

[0032] Test two:

[0033] Reverse bias simulation test of DC power supply (when the input power supply VCC is less than the output power supply Vout): After switch J1 is closed, switch J2 is also closed, and assuming Vout = 13V > VCC = 12V: V3 tube is turned on, V2 tube is turned off, the output comparison signal VC of the comparator = Vout-V CE(sat) ≈ Vout, NMOS tube V4 is turned on, and the comparison signal VC passes through the totem pole circuit. The Vout current passes through the low-impedance channel of the V4 tube to the gate of the PMOS main tube V1, and the gate VB is high, that is, VB = 11.9V, the PMOS main tube V1 is turned off, which prevents the Vout current from flowing back to VCC, protecting the VCC power supply front-end circuit. The reverse current of the PMOS main tube V1 is -178nA (test point PR1, which can be ignored), and it can be considered that there is no backflow current; the output current of the power supply VCC1 is -178nA (test point PR5, which can be ignored), as shown in Figure 4 .

[0034] On the basis of PMOS main pipe + PNP pair tube technical scheme, the circuit is improved, the PNP tube V2 is set to the inverted state, a fast high-end ideal diode is designed, the circuit is composed of PMOS main pipe, comparator, driving circuit and the like, the comparator circuit comprises PNP pair tube, resistance and the like, the circuit software simulation verification is carried out, and the simulation shows that the circuit has the functions of preventing backflow and protecting the input end power supply front-stage circuit; the circuit is very simple and has strong practicability.

[0035] Although the embodiments of the present application have been shown and described, it should be understood by those skilled in the art that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present application, and the scope of the present application is defined by the appended claims and their equivalents.

Claims

1. A totem pole based fast type high end ideal diode comprising of a PMOS master, a comparator circuit and a totem pole circuit, characterized by: The PMOS main pipe, the comparator circuit and the totem pole circuit constitute an overall circuit, the comparator circuit is composed of two independent PNP auxiliary pipes or a PNP pair pipe with the same parameters and packaged together and two resistors, and the totem pole circuit uses a complementary push-pull circuit composed of an NMOS pipe and a PMOS pipe.

2. A totem-pole based fast high-end ideal diode according to claim 1, characterized in that: The comparator is used for comparing the sizes of an input end power supply VCC and an output end power supply Vout.

3. A totem-pole based fast ideal diode according to claim 1, characterized in that: The comparison signal output by the comparator is transmitted to the gate of the PMOS main pipe after passing through the totem pole circuit.

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