Micro-inverse topological structure

Abstract

The utility model discloses a micro-inverse topological structure, which comprises a photovoltaic panel direct current input source, a transformer, a first metal oxide semiconductor (MOS) tube, a second MOS tube, a third silicon controlled rectifier, a fifth silicon controlled rectifier, a third MOS tube, a fourth MOS tube and a power grid side end, the other end of the primary side of the transformer is electrically connected with the negative electrode of a photovoltaic panel direct current input source through a first MOS tube, one end of the secondary side of the transformer is electrically connected with the other end of the secondary side of the transformer through a third silicon controlled rectifier and a third MOS tube, the third silicon controlled rectifier and the third MOS tube are connected in series, and a fifth silicon controlled rectifier and a fourth MOS tube are connected in series and then connected with the third silicon controlled rectifier and the third MOS tube in parallel. The two ends of the network side end are electrically connected with the cathode of the third silicon controlled rectifier and the cathode of the fifth silicon controlled rectifier respectively. According to the utility model, bidirectional flow of effective power is realized by controlling the first MOS tube Q1 and the second MOS tube Q2, so that a power grid can output active power and can also provide reactive power support.

Description

Technical Field

[0001] This utility model relates to the field of micro inverse topology technology, and in particular to a micro inverse topology structure. Background Technology

[0002] In traditional photovoltaic (PV) power generation systems, the common topology is typically designed for unidirectional power flow, meaning power can only flow from the DC side (PV module side) to the AC side (grid side). This topology is characterized by its ability to output active power only, without the capacity to absorb or consume power. Specifically, energy is converted from PV modules to AC power by an inverter and then injected into the grid, but the system cannot absorb energy from the grid or provide reactive power compensation.

[0003] However, with the widespread application of photovoltaic power generation systems and the continuous increase in grid demand, the traditional unidirectional power flow topology has gradually revealed its limitations. Modern power systems place higher demands on photovoltaic power generation systems, especially in terms of reactive power compensation. The grid needs photovoltaic systems to not only output active power but also provide reactive power support when necessary to improve grid voltage stability, power factor, and harmonic issues. Utility Model Content

[0004] Based on this, this utility model provides a micro-reverse topology to solve the problem that existing topologies are designed for unidirectional power flow and cannot absorb energy from the power grid or provide reactive power compensation.

[0005] This invention provides a micro-inverse topology structure, including:

[0006] The system includes a photovoltaic panel DC input source, a transformer, a first MOSFET, a second MOSFET, a third thyristor, a fifth thyristor, a third MOSFET, a fourth MOSFET, and a grid-side terminal. One end of the primary side of the transformer is electrically connected to the positive terminal of the photovoltaic panel DC input source, and the other end of the primary side is electrically connected to the negative terminal of the photovoltaic panel DC input source through the first MOSFET. One end of the secondary side of the transformer is electrically connected to the other end of the secondary side through the third thyristor and the third MOSFET. The third thyristor and the third MOSFET are connected in series, and the fifth thyristor and the fourth MOSFET are connected in series and then in parallel with the third thyristor and the third MOSFET. The two ends of the grid-side terminal are electrically connected to the negative terminals of the third thyristor and the fifth thyristor, respectively.

[0007] The drain of the first MOSFET is electrically connected to one end of the primary side of the transformer, the source of the first MOSFET is electrically connected to the negative terminal of the DC input source of the photovoltaic panel, the anode of the seventh diode is electrically connected to the source of the first MOSFET, the cathode of the seventh diode is electrically connected to the drain of the first MOSFET, one end of the primary side of the transformer is electrically connected to one end of the third capacitor, and the other end of the primary side of the transformer is electrically connected to the other end of the third capacitor.

[0008] The first capacitor is connected in parallel with the DC input source of the photovoltaic panel.

[0009] One end of the fifth capacitor is electrically connected to the drain of the second MOSFET, and the other end of the fifth capacitor is electrically connected to the other end of the secondary side of the transformer.

[0010] The source of the second MOSFET is electrically connected to one end of the secondary side of the transformer, the drain of the second MOSFET is electrically connected to the positive terminal of the third thyristor, the positive terminal of the second diode is electrically connected to the source of the second MOSFET, the negative terminal of the second diode is electrically connected to the drain of the second MOSFET, the two ends of the fourth capacitor are respectively electrically connected to the two ends of the secondary side of the transformer, and the end of the fourth capacitor that is electrically connected to the other end of the secondary side of the transformer is also grounded.

[0011] The positive terminal of the third thyristor is electrically connected to the drain of the second MOSFET, the negative terminal of the third thyristor is electrically connected to the drain of the third MOSFET, the source of the third MOSFET is electrically connected to the other end of the secondary side of the transformer, the positive terminal of the fourth diode is electrically connected to the negative terminal of the third thyristor, the negative terminal of the fourth diode is electrically connected to the positive terminal of the third thyristor, the positive terminal of the eighth diode is electrically connected to the source of the third MOSFET, and the negative terminal of the eighth diode is electrically connected to both the source and drain of the third MOSFET.

[0012] The positive terminal of the fifth thyristor is electrically connected to the positive terminal of the third thyristor, the negative terminal of the fifth thyristor is electrically connected to the drain of the fourth MOSFET, the source of the fourth MOSFET is electrically connected to the source of the third MOSFET, the positive terminal of the sixth diode is electrically connected to the negative terminal of the fifth thyristor, the negative terminal of the sixth diode is electrically connected to the positive terminal of the fifth thyristor, the positive terminal of the ninth diode is electrically connected to the source of the fourth MOSFET, and the negative terminal of the ninth diode is electrically connected to the source and drain of the fourth MOSFET.

[0013] The negative terminal of the third thyristor is electrically connected to the first terminal of the relay through an inductor, and the negative terminal of the fifth thyristor is electrically connected to the second terminal of the relay through an inductor.

[0014] A grid-side voltage sampler is also connected to the grid side.

[0015] Beneficial effects: This utility model achieves bidirectional flow of active power through the control of the first MOSFET Q1 and the second MOSFET Q2, enabling the power grid to not only output active power but also provide reactive power support, thereby improving the voltage stability, power factor and harmonic problems of the power grid.

[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0017] The accompanying drawings are provided for a better understanding of this solution and do not constitute a limitation on this utility model. Wherein:

[0018] Figure 1 It is based on the micro-inverse topology diagram provided by this utility model;

[0019] Figure 2 The AC voltage provided by this utility model and transient current target The waveform diagram. Detailed Implementation

[0020] The following description, in conjunction with the accompanying drawings, illustrates exemplary embodiments of the present invention, including various details to aid understanding. These embodiments should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0021] like Figure 1 As shown, this utility model provides a micro-inverse topology structure, including:

[0022] The system includes a photovoltaic panel DC input source, a transformer, a first MOSFET Q1, a second MOSFET Q2, a third thyristor D3, a fifth thyristor D5, a third MOSFET Q3, a fourth MOSFET Q4, and a grid-side terminal. One end of the primary side of the transformer is electrically connected to the positive terminal of the photovoltaic panel DC input source, and the other end of the primary side is electrically connected to the negative terminal of the photovoltaic panel DC input source through the first MOSFET Q1. One end of the secondary side of the transformer is electrically connected to the other end of the secondary side through the third thyristor D3 and the third MOSFET Q3. The third thyristor D3 and the third MOSFET Q3 are connected in series, and the fifth thyristor D5 and the fourth MOSFET Q4 are connected in series and then in parallel with the third thyristor D3 and the third MOSFET Q3. The two ends of the grid-side terminal are electrically connected to the negative terminals of the third thyristor D3 and the fifth thyristor D5, respectively.

[0023] The drain of the first MOSFET Q1 is electrically connected to one end of the primary winding of the transformer, the source of the first MOSFET Q1 is electrically connected to the negative terminal of the DC input source of the photovoltaic panel, the anode of the seventh diode D7 is electrically connected to the source of the first MOSFET Q1, the cathode of the seventh diode D7 is electrically connected to the drain of the first MOSFET Q1, one end of the primary winding of the transformer is electrically connected to one end of the third capacitor C3, and the other end of the primary winding of the transformer is electrically connected to the other end of the third capacitor C3.

[0024] The first capacitor C1 is connected in parallel with the DC input source of the photovoltaic panel.

[0025] One end of the fifth capacitor C5 is electrically connected to the drain of the second MOSFET Q2, and the other end of the fifth capacitor C5 is electrically connected to the other end of the secondary side of the transformer.

[0026] The source of the second MOSFET Q2 is electrically connected to one end of the secondary side of the transformer. The drain of the second MOSFET Q2 is electrically connected to the positive terminal of the third thyristor D3. The positive terminal of the second diode D2 is electrically connected to the source of the second MOSFET Q2, and the negative terminal of the second diode D2 is electrically connected to the drain of the second MOSFET Q2. The two ends of the fourth capacitor C4 are respectively electrically connected to the two ends of the secondary side of the transformer. The end of the fourth capacitor C4 that is electrically connected to the other end of the secondary side of the transformer is also grounded.

[0027] The positive terminal of the third thyristor D3 is electrically connected to the drain of the second MOSFET Q2, the negative terminal of the third thyristor D3 is electrically connected to the drain of the third MOSFET Q3, the source of the third MOSFET Q3 is electrically connected to the other end of the secondary side of the transformer, the positive terminal of the fourth diode D4 is electrically connected to the negative terminal of the third thyristor D3, the negative terminal of the fourth diode D4 is electrically connected to the positive terminal of the third thyristor D3, the positive terminal of the eighth diode D8 is electrically connected to the source of the third MOSFET Q3, and the negative terminal of the eighth diode D8 is electrically connected to the source and drain of the third MOSFET Q3.

[0028] The positive terminal of the fifth thyristor D5 is electrically connected to the positive terminal of the third thyristor D3, the negative terminal of the fifth thyristor D5 is electrically connected to the drain of the fourth MOSFET Q4, the source of the fourth MOSFET Q4 is electrically connected to the source of the third MOSFET Q3, the positive terminal of the sixth diode D6 is electrically connected to the negative terminal of the fifth thyristor D5, the negative terminal of the sixth diode D6 is electrically connected to the positive terminal of the fifth thyristor D5, the positive terminal of the ninth diode D9 is electrically connected to the source of the fourth MOSFET Q4, and the negative terminal of the ninth diode D9 is electrically connected to the source and drain of the fourth MOSFET Q4.

[0029] The negative terminal of the third thyristor D3 is electrically connected to the first terminal a of the relay through an inductor, and the negative terminal of the fifth thyristor D5 is electrically connected to the second terminal b of the relay through an inductor.

[0030] A grid-side voltage sampler is also connected to the grid side.

[0031] Based on the target value of transient current and AC voltage RMS value, calculate transient output power P sun , .

[0032] This invention can be based on the transient output power P sun Flexible switching of power flow direction, when At this time, the first MOSFET Q1 is turned on and the second MOSFET Q2 is turned off, and the power flows from the DC side to the AC side;

[0033] when When the second MOSFET Q2 is turned on, the first MOSFET Q1 is turned off, and the power flows from the AC side to the DC side.

[0034] like Figure 2 As shown, when AC voltage From negative to positive and At this time, the gate signal that turns on the third thyristor D3 and the fourth MOSFET Q4 is given. Control the first MOSFET Q1 to turn on. Close after time Time; when it occurs When the first MOSFET Q1 is turned off, the second MOSFET Q2 is turned on. Close after time time.

[0035] When AC voltage From positive to negative and At this time, a gate signal is given to turn on the fifth thyristor D5 and the third MOSFET Q3. If at this time... Control the first MOSFET Q1 to turn on. Close after time Time; when it occurs When the first MOSFET Q1 is turned off, the second MOSFET Q2 is turned on. Close after time time;

[0036] When AC voltage The value starts to increase from the negative peak and is greater than When the first MOSFET Q1 and the second MOSFET Q2 are turned off, wait 80us and allow the inductor on the transformer to discharge before turning off the third thyristor D3 and the fourth MOSFET Q4.

[0037] in, This indicates the turn-off time of the first MOSFET Q1. This indicates the on-time of the first MOSFET Q1. This indicates the turn-off time of the second MOSFET Q2. This indicates the on-time of the second MOSFET Q2.

[0038] when At that time, the turn-on and turn-off times of the first MOSFET Q1 are calculated using a critical point strategy.

[0039] ;

[0040] ;

[0041] ;

[0042] in, This represents one complete switching cycle of the first MOSFET Q1. Indicates transient current target The absolute value of the value This represents the primary inductance of the transformer, where n represents the ratio of the number of turns on the primary side to the number of turns on the secondary side. Indicates the DC input voltage. This represents the voltage at capacitor C5;

[0043] when At that time, the turn-on and turn-off times of the second MOSFET Q2 are calculated using a critical point strategy.

[0044] ;

[0045] ;

[0046] ;

[0047] in, This represents one complete switching cycle of the second MOSFET Q2. This indicates the value of the secondary inductance of the transformer.

[0048] According to AC voltage Changes and transient output power P sun The positive and negative signs are precisely controlled to turn the MOSFET and the third and fifth thyristors D3 and D5 on and off. This precise timing control reduces switching losses and improves system efficiency.

[0049] When power needs to be transferred from the PV side of the photovoltaic panel to the grid side, the first MOSFET Q1 is turned on, and the current in the transformer's magnetizing inductor stores energy and increases linearly. When the first MOSFET Q1 is turned off, the energy on the magnetizing inductor has no discharge path on the primary side, so it automatically flows through the secondary side discharge path. The current flowing through the secondary side discharge path charges the fifth capacitor C5, causing the voltage at the fifth capacitor C5 to rise. Since the voltage of the fifth capacitor C5 is clamped by the AC voltage, the output current will flow through the AC voltage path. When power needs to flow from the AC side to the DC side, the second MOSFET Q2 is turned on, storing energy in the transformer's magnetizing inductor. When the second MOSFET Q2 is turned off, the current on the magnetizing inductor flows through the path of the first capacitor C1, charging the first capacitor C1.

[0050] Only the transient output power P is needed sun The positive and negative values ​​directly control the on and off states of the first MOSFET Q1 and the second MOSFET Q2. The logic is simple and clear, reducing the complexity of the control system and the demand for computing resources.

[0051] By judging the power flow direction in real time and switching the on and off states of the first MOSFET Q1 and the second MOSFET Q2, the system can quickly respond to power changes, improving the dynamic response capability and stability of the system.

[0052] The above description is merely a specific embodiment of this utility model, but the protection scope of this utility model is not limited thereto. Any changes or substitutions within the technical scope disclosed in this utility model should be included within the protection scope of this utility model. Therefore, the protection scope of this utility model should be determined by the protection scope of the claims.

Claims

1. A micro-inversion topology, characterized in that, include: The system includes a photovoltaic panel DC input source, a transformer, a first MOSFET, a second MOSFET, a third thyristor, a fifth thyristor, a third MOSFET, a fourth MOSFET, and a grid-side terminal. One end of the primary side of the transformer is electrically connected to the positive terminal of the photovoltaic panel DC input source, and the other end of the primary side is electrically connected to the negative terminal of the photovoltaic panel DC input source through the first MOSFET. One end of the secondary side of the transformer is electrically connected to the other end of the secondary side through the third thyristor and the third MOSFET. The third thyristor and the third MOSFET are connected in series, and the fifth thyristor and the fourth MOSFET are connected in series and then in parallel with the third thyristor and the third MOSFET. The two ends of the grid-side terminal are electrically connected to the negative terminals of the third thyristor and the fifth thyristor, respectively.

2. A micro-inverted topology according to claim 1, characterized in that: The drain of the first MOSFET is electrically connected to one end of the primary side of the transformer, the source of the first MOSFET is electrically connected to the negative terminal of the DC input source of the photovoltaic panel, the anode of the seventh diode is electrically connected to the source of the first MOSFET, the cathode of the seventh diode is electrically connected to the drain of the first MOSFET, one end of the primary side of the transformer is electrically connected to one end of the third capacitor, and the other end of the primary side of the transformer is electrically connected to the other end of the third capacitor.

3. A micro-inverter topology according to claim 2, wherein: The first capacitor is connected in parallel with the DC input source of the photovoltaic panel.

4. A micro-inverted topology according to any one of claims 1 to 3, wherein: One end of the fifth capacitor is electrically connected to the drain of the second MOSFET, and the other end of the fifth capacitor is electrically connected to the other end of the secondary side of the transformer.

5. A micro-inverter topology according to claim 4, wherein: The source of the second MOSFET is electrically connected to one end of the secondary side of the transformer, the drain of the second MOSFET is electrically connected to the positive terminal of the third thyristor, the positive terminal of the second diode is electrically connected to the source of the second MOSFET, the negative terminal of the second diode is electrically connected to the drain of the second MOSFET, the two ends of the fourth capacitor are respectively electrically connected to the two ends of the secondary side of the transformer, and the end of the fourth capacitor that is electrically connected to the other end of the secondary side of the transformer is also grounded.

6. A micro-inverter topology according to claim 5, wherein: The positive terminal of the third thyristor is electrically connected to the drain of the second MOSFET, the negative terminal of the third thyristor is electrically connected to the drain of the third MOSFET, the source of the third MOSFET is electrically connected to the other end of the secondary side of the transformer, the positive terminal of the fourth diode is electrically connected to the negative terminal of the third thyristor, the negative terminal of the fourth diode is electrically connected to the positive terminal of the third thyristor, the positive terminal of the eighth diode is electrically connected to the source of the third MOSFET, and the negative terminal of the eighth diode is electrically connected to both the source and drain of the third MOSFET.

7. A micro-inverter topology according to claim 6, wherein: The positive terminal of the fifth thyristor is electrically connected to the positive terminal of the third thyristor, the negative terminal of the fifth thyristor is electrically connected to the drain of the fourth MOSFET, the source of the fourth MOSFET is electrically connected to the source of the third MOSFET, the positive terminal of the sixth diode is electrically connected to the negative terminal of the fifth thyristor, the negative terminal of the sixth diode is electrically connected to the positive terminal of the fifth thyristor, the positive terminal of the ninth diode is electrically connected to the source of the fourth MOSFET, and the negative terminal of the ninth diode is electrically connected to the source and drain of the fourth MOSFET.

8. A micro-inverter topology according to claim 7, wherein: The negative terminal of the third thyristor is electrically connected to the first terminal of the relay through an inductor, and the negative terminal of the fifth thyristor is electrically connected to the second terminal of the relay through an inductor.

9. A micro-inverter topology according to claim 1, wherein: A grid-side voltage sampler is also connected to the grid side.

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