Storage module

Abstract

The utility model provides a storage module. The storage module comprises a Loongson processor, a bridge chip, an FPGA chip, a first storage unit interface module, a second storage unit interface module, a gigabit network controller and a VPX connector, the Loongson processor is electrically connected with the bridge piece and the first storage unit interface module, the bridge piece is further electrically connected with the gigabit network controller, the VPX connector and the FPGA chip, the gigabit network controller is further electrically connected with the VPX connector, and the second storage unit interface module is electrically connected with the FPGA chip. According to the scheme of the utility model, the Loongson processor is adopted as a main processor of the storage module, and the Loongson processor is adopted as a high-performance domestic multi-core processor, so that the processing speed, the data throughput and the multi-task processing capability of the storage module can be remarkably improved; and by matching with the bridge chip and the FPGA chip, various data transmission interfaces and storage capacities can be expanded outwards, reliable network communication capability is provided for a system, high-speed data transmission of the storage module is ensured, and the requirement of large-capacity data storage is met.

Description

Technical Field

[0001] This utility model relates to the field of data storage technology, and in particular to a storage module. Background Technology

[0002] Radar data storage modules are an indispensable part of radar systems. Radar systems need to acquire, store, and process large amounts of target information in real time, such as aircraft position, speed, and altitude, so that command personnel can understand the target situation promptly and make relevant decisions. Radar data storage modules need to have high capacity, high-speed storage, and data integrity to ensure data accuracy and reliability. However, traditional storage modules mostly use Intel or AMD x86 architecture processors or ARM architecture processors. With technological advancements and changing application scenarios, the limitations of these processors have become increasingly apparent. For example, they suffer from insufficient computing power, low energy efficiency, poor compatibility, and inadequate support for emerging technologies, making it difficult to meet the demands of storing and processing the ever-increasing radar data. Utility Model Content

[0003] This invention provides a storage module designed to address the problems of insufficient computing power, low energy efficiency, and poor compatibility in related technologies, which make it difficult to meet the needs of large-capacity data storage and processing.

[0004] To address the aforementioned technical problems, this utility model provides a Loongson processor, a bridge chip, an FPGA chip, a first storage unit interface module, a second storage unit interface module, a gigabit network controller, and a VPX connector. The Loongson processor is electrically connected to the bridge chip and the first storage unit interface module, respectively. The bridge chip is also electrically connected to the gigabit network controller, the VPX connector, and the FPGA chip, respectively. The gigabit network controller is also electrically connected to the VPX connector, and the second storage unit interface module is electrically connected to the FPGA chip.

[0005] Furthermore, the first storage unit interface module includes a first memory slot unit and a second memory slot unit, which are electrically connected to the Loongson processor via a memory bus. Both the first and second memory slot units are used to connect DDR4 memory chips.

[0006] Furthermore, the second storage unit interface module includes a first hard disk connector, a second hard disk connector, a third hard disk connector, a fourth hard disk connector, a fifth hard disk connector, a sixth hard disk connector, a seventh hard disk connector, and an eighth hard disk connector that are electrically connected to the FPGA chip.

[0007] Furthermore, it also includes multiple network transformers, each of which is electrically connected to the Gigabit Ethernet controller and the VPX connector via an MDI bus. Furthermore, it also includes a ninth hard drive connector, which is electrically connected to the bridge plate via a SATA bus.

[0008] Furthermore, it also includes a third memory slot unit, which is electrically connected to the FPGA chip. The third memory slot unit is used for electrical connection with DDR3 memory units.

[0009] Furthermore, it also includes a CPLD chip, which is electrically connected to the Loongson processor. It also includes a panel control connector, which is electrically connected to the CPLD chip.

[0010] As described above, this utility model uses a Loongson processor as the main processor of the storage module. As a high-performance domestic multi-core processor, the Loongson processor, with its superior computing performance and advanced instruction set support, significantly improves the storage module's processing speed, data throughput, and multitasking capabilities. It also boasts high energy efficiency and broad compatibility, enhancing system durability and interface diversity. The Loongson processor, combined with a bridge chip and FPGA chip, can expand various data transmission interfaces and storage capacity, providing reliable network communication capabilities, ensuring high-speed data transmission for the storage module, and meeting the needs of large-capacity data storage. Furthermore, the Loongson processor is a domestically produced component, which helps ensure data processing security. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the structure of the first type of storage module according to an embodiment of the present utility model;

[0012] Figure 2 This is a schematic diagram of the structure of a second type of storage module according to an embodiment of the present utility model;

[0013] Figure 3 This is a circuit diagram of a power supply module according to an embodiment of the present invention. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. Throughout the description, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model. Furthermore, the technical features involved in the various embodiments of the present utility model described below can be combined with each other as long as they do not conflict with each other.

[0015] Before describing in detail the radar signal processing system provided in the embodiments of this application, the abbreviations or custom terms that appear below will be explained as follows:

[0016] PCIE (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard); SATA (Serial ATA); MDI (Media Dependent Interface, an uplink port); CPLD (Complex Programmable Logic Device); VGA (Video Graphic Array).

[0017] In related technologies, storage modules suffer from insufficient computing power, low energy efficiency, and poor compatibility, making it difficult to meet the needs of large-capacity data storage and processing. Therefore, this utility model provides a storage module.

[0018] like Figure 1 The diagram shown is a structural schematic of a first type of storage module provided in this embodiment of the present invention. The storage module includes: a Loongson processor 10, a bridge chip 20, an FPGA chip 30, a first storage unit interface module 40, a second storage unit interface module 50, a gigabit network controller 60, and a VPX connector 70. The Loongson processor 10 is electrically connected to the bridge chip 20 and the first storage unit interface module 40, respectively. The bridge chip 20 is also electrically connected to the gigabit network controller 60, the VPX connector 70, and the FPGA chip 30, respectively. The gigabit network controller 60 is also electrically connected to the VPX connector 70, and the second storage unit interface module 50 is electrically connected to the FPGA chip 30.

[0019] Specifically, in this embodiment, the storage module uses the Loongson processor 10 as the main processor. Taking the Loongson 3A6000 processor as an example, as a high-performance domestic quad-core processor, it achieves a high clock speed of 2.5GHz thanks to the powerful Loongson independent instruction set, providing a solid hardware foundation for the development of domestic storage modules. The Loongson 3A6000 processor adopts an advanced multi-core architecture and high-performance processing units, enabling it to perform excellently in data processing, algorithm calculation, and parallel task execution, thereby significantly improving the response speed, data throughput, and multi-task processing capabilities of the storage module. At the same time, the Loongson 3A6000 processor emphasizes energy efficiency optimization, providing high performance while reducing power consumption and heat generation, thus improving system durability. Furthermore, the Loongson 3A6000 processor has broad compatibility and good scalability, supporting diverse storage devices and interfaces.

[0020] The storage module is composed of a Loongson processor 10, a bridge chip 20, an FPGA chip 30, a storage unit interface module, and a VPX connector 70. Since all components can be domestically produced, this storage module can achieve complete domestic production, replacing similar foreign products and enabling a high degree of autonomy and control over the storage system, effectively ensuring data security. The Loongson processor 10 is connected to the bridge chip 20 via an HTx16 high-speed bus, which in turn connects to the VPX connector 70, providing two USB 2.0 interfaces, one PCIe 3.0 x8 bus, and one VGA interface. It also connects to a gigabit network controller 60 via the bridge chip 20, providing gigabit Ethernet ports and expansion gigabit Ethernet ports. The Loongson processor 10 connects to the first storage unit interface module 40 via an internal channel, enabling memory expansion and increasing data storage capacity. The bridge chip 20 is also connected to the FPGA chip 30 via a PCIe 3.0 x8 bus, which in turn connects to the second storage unit interface module 50, enabling hard drive expansion and providing large-capacity storage space for data storage. In this embodiment, the bridge chip 20 can be a Loongson 7A2000 bridge chip, the gigabit network controller 60 can be a Netcom WX1860AL4 gigabit network controller, and the FPGA chip 30 can be a Fudan Micro JFM7K325T FPGA.

[0021] like Figure 2 The diagram shown is a structural schematic of the second type of storage module provided in this embodiment of the present invention. Please refer to [link / reference]. Figure 1 and Figure 2 The first storage unit interface module B includes a first memory slot unit and a second memory slot unit, which are electrically connected to the Loongson processor A via a memory bus. Both the first and second memory slot units are used to connect DDR4 memory chips.

[0022] Specifically, in this embodiment, the Loongson 3A6000 processor is connected to the memory slot unit via the DDR4 memory bus. This embodiment uses two memory slot units to provide two memory channels to connect to the DDR4 memory unit, thereby providing a memory capacity of 16GB.

[0023] Further, please see Figure 1 and Figure 2 The second storage unit interface module 50 includes a first hard disk connector I, a second hard disk connector J, a third hard disk connector K, a fourth hard disk connector L, a fifth hard disk connector M, a sixth hard disk connector N, a seventh hard disk connector O, and an eighth hard disk connector P, all electrically connected to the FPGA chip E. The storage module also includes a third memory slot unit V, which is electrically connected to the FPGA chip E.

[0024] Specifically, in this embodiment, the second storage unit interface module 50 includes multiple hard disk connectors, so as to... Figure 2 Taking the eight hard drive connectors in the system as an example, each connector, such as the mSATA connector, is connected to the FPGA chip E via the SATA bus, thereby enabling storage hard drive expansion. Furthermore, the FPGA chip E can process multiple data streams in parallel. When multiple hard drives are connected, it can simultaneously read and write multiple data streams, which helps improve the overall performance of the storage system, reduce latency, and increase data transfer rates. The programmable nature of the FPGA chip E allows the system to be easily expanded as the number of storage devices increases. Users can add more hard drive connectors as needed without worrying about limitations of the underlying system hardware. In addition, the FPGA chip E is also connected to a third memory slot unit V to connect DDR3 memory chips, expanding the memory available for the FPGA chip E.

[0025] Further, please see Figure 1 and Figure 2 The storage module also includes multiple network transformers, each of which is electrically connected to the Gigabit Ethernet controller D and VPX connector G via the MDI bus. The storage module also includes a ninth hard drive connector H, which is electrically connected to the bridge chip C via the SATA bus.

[0026] Specifically, in this embodiment, the Gigabit Ethernet controller D is also connected to multiple network transformers. Taking the four network transformers shown in the figure as an example, each network transformer is connected to the Gigabit Ethernet controller D and the VPX connector G through an MDI bus to provide a Gigabit Ethernet port. Simultaneously, the network transformers provide electrical isolation, physically isolating the Gigabit Ethernet controller D from the external network, reducing interference and high-voltage risks introduced by external power supply or equipment failure. The bridge plate C is also connected to the ninth hard drive connector H to connect hard drives for expanding the system's hard drive capacity.

[0027] Further, please see Figure 2 The storage module also includes a CPLD chip F, which is electrically connected to the Loongson processor A. The storage module also includes a panel control connector (not shown in the figure), which is electrically connected to the CPLD chip F.

[0028] Specifically, in this embodiment, the CPLD chip F can be an Anlu EF3L90CG400B CPLD, which can be connected to the Loongson 3A6000 processor through N (6 in this embodiment) GPIOs for GPIO communication, thereby performing signal control and storage module management. In addition, the CPLD chip F can also be connected to the panel control connector to provide multiple GPIOs, allowing users to input commands or control the system through the human-machine interface, thereby realizing the control and monitoring of the equipment.

[0029] In addition, the storage module also includes a power module Q, which supplies power to the various devices and connectors, for example... Figure 3 The circuit diagram shown is for power supply of the power module. The CPLD chip F can control the power-on sequence of each power level. In addition, a runBMC daughter card connector can be set to connect the runBMC daughter card. The runBMC can integrate various voltage sensors to monitor and detect the voltage values ​​of each level in real time, such as the power supply voltage level of the Loongson processor. The runBMC daughter card connector is connected to the Loongson processor A.

[0030] The storage module provided in this embodiment uses a Loongson processor as its main processor. Taking the Loongson 3A6000 processor as an example, as a high-performance domestic quad-core processor, it achieves a high clock speed of 2.5GHz thanks to the powerful Loongson independent instruction set, providing a solid hardware foundation for the development of domestic storage modules. The Loongson 3A6000 processor adopts an advanced multi-core architecture and high-performance processing units, enabling it to perform excellently in data processing, algorithm calculation, and parallel task execution, thereby significantly improving the storage module's response speed, data throughput, and multi-task processing capabilities. Simultaneously, the Loongson 3A6000 processor emphasizes energy efficiency optimization, providing high performance while reducing power consumption and heat generation, thus improving system durability. Furthermore, the Loongson 3A6000 processor has broad compatibility and good scalability, supporting diverse storage devices and interfaces. Through deep adaptation with the Loongson 3A6000 processor, the storage module ensures the stability and efficiency of data transmission. Users do not need to worry about compatibility issues when using this storage module and can enjoy a smooth and stable data storage and retrieval experience. Thanks to its fully independent and controllable hardware design, this storage module offers higher reliability in data protection and information security, which is of paramount importance for fields requiring high levels of confidentiality, such as defense and finance.

[0031] It should be noted that the various embodiments in this utility model are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0032] It should also be noted that, in the present invention, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0033] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined in the present invention may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A memory module, characterized by, include: Loongson processor, bridge chip, FPGA chip, first storage unit interface module, second storage unit interface module, gigabit network controller and VPX connector; The Loongson processor is electrically connected to the bridge chip and the first storage unit interface module, respectively. The bridge chip is also electrically connected to the gigabit network controller, the VPX connector and the FPGA chip, respectively. The gigabit network controller is also electrically connected to the VPX connector, and the second storage unit interface module is electrically connected to the FPGA chip.

2. The storage module of claim 1, wherein, The first storage unit interface module includes a first memory slot unit and a second memory slot unit, which are electrically connected to the Loongson processor via memory buses.

3. The storage module of claim 2, wherein, Both the first memory slot unit and the second memory slot unit are used to connect DDR4 memory chips.

4. The storage module of claim 1, wherein, The second storage unit interface module includes a first hard disk connector, a second hard disk connector, a third hard disk connector, a fourth hard disk connector, a fifth hard disk connector, a sixth hard disk connector, a seventh hard disk connector, and an eighth hard disk connector that are electrically connected to the FPGA chip.

5. The storage module of claim 1, wherein, It also includes multiple network transformers, each of which is electrically connected to the gigabit network controller and the VPX connector via an MDI bus.

6. The storage module of claim 1, wherein, It also includes a ninth hard disk connector, which is electrically connected to the bridge plate via a SATA bus.

7. The storage module of claim 1, wherein, It also includes a third memory slot unit, which is electrically connected to the FPGA chip.

8. The storage module of claim 7, wherein, The third memory slot unit is used for electrical connection with the DDR3 memory unit.

9. The storage module of claim 1, wherein, It also includes a CPLD chip, which is electrically connected to the Loongson processor.

10. The memory module of claim 9, wherein, It also includes a panel control connector, which is electrically connected to the CPLD chip.

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